KR102606859B1 - Semiconductor device and semiconductor device package including the same - Google Patents

Abstract

The embodiment includes: a first conductivity type semiconductor layer; an active layer disposed on the first conductive semiconductor layer; and a second conductive semiconductor layer disposed on the active layer, wherein the active layer includes a first active layer and a second active layer disposed between the first active layer and the second conductive semiconductor layer. The first active layer and the second active layer include a first region having a recess and a second region between the recesses, and the thickness of the second active layer in the first region is the thickness of the first active layer in the first region. Disclosed is a semiconductor device including a thicker region, wherein the second active layer in the first region includes a region thicker than the thickness of the second active layer in the second region, and a semiconductor device package including the same.

Description

Semiconductor device and semiconductor device package including the same {SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE PACKAGE INCLUDING THE SAME}

The embodiment relates to a semiconductor device and a semiconductor device package including the same.

Semiconductor devices containing compounds such as GaN and AlGaN have many advantages, such as having a wide and easily adjustable band gap energy, and can be used in a variety of ways, such as semiconductor devices, light receiving devices, and various diodes.

In particular, light-emitting devices such as light emitting diodes and laser diodes using group 3-5 or group 2-6 compound semiconductor materials have been developed into red, green, and green colors through the development of thin film growth technology and device materials. Various colors such as blue and ultraviolet rays can be realized, and efficient white light can also be realized by using fluorescent materials or combining colors. Compared to existing light sources such as fluorescent lights and incandescent lights, it has low power consumption, semi-permanent lifespan, and fast response speed. , has the advantages of safety and environmental friendliness.

In addition, when light-receiving devices such as photodetectors or solar cells are manufactured using group 3-5 or group 2-6 compound semiconductor materials, the development of device materials absorbs light in various wavelength ranges to generate photocurrent. By doing so, light of various wavelengths, from gamma rays to radio wavelengths, can be used. In addition, it has the advantages of fast response speed, safety, environmental friendliness, and easy control of device materials, so it can be easily used in power control, ultra-high frequency circuits, or communication modules.

Therefore, semiconductor devices can replace the transmission module of optical communication means, the light emitting diode backlight that replaces the cold cathode fluorescence lamp (CCFL) that constitutes the backlight of LCD (Liquid Crystal Display) display devices, and fluorescent or incandescent light bulbs. Applications are expanding to include white light-emitting diode lighting devices, automobile headlights and traffic lights, and sensors that detect gas or fire. Additionally, the applications of semiconductor devices can be expanded to high-frequency application circuits, other power control devices, and communication modules.

Embodiments provide a semiconductor device that can improve the color rendering index.

Embodiments provide a semiconductor device capable of improving light output.

An embodiment provides a semiconductor device capable of lowering the driving voltage.

The problem to be solved in the embodiment is not limited to this, and it will also include means of solving the problem described below and purposes and effects that can be understood from the embodiment.

A semiconductor device according to an embodiment of the present invention includes a first conductivity type semiconductor layer; an active layer disposed on the first conductive semiconductor layer; and a second conductive semiconductor layer disposed on the active layer, wherein the active layer includes a first active layer and a second active layer disposed between the first active layer and the second conductive semiconductor layer. The first active layer and the second active layer include a first region having a recess and a second region between the recesses, and the thickness of the second active layer in the first region is the thickness of the first active layer in the first region. and a thicker region, and the second active layer in the first region includes a region thicker than the thickness of the second active layer in the second region.

The first active layer may include a plurality of first well layers and a plurality of first barrier layers, and the second active layer may include a plurality of second well layers and a plurality of second barrier layers.

The first barrier layer may have a ratio of the thickness of the first region to the thickness of the second region of 1:2 to 1:10.

The second barrier layer may have a ratio of the thickness of the first region to the thickness of the second region of 2:1 to 10:1.

In the first region, the second barrier layer may be thicker than the first barrier layer.

The second well layer may emit light in the 450nm to 460nm wavelength range.

The ratio of the thickness of the first well layer and the thickness of the first barrier layer may be 1:1 to 1:2.5.

The ratio of the thickness of the second well layer and the thickness of the second barrier layer may be 1:1 to 1:3.

The first barrier layer and the second barrier layer may be doped with an n-type dopant.

The second barrier layer may have a section whose thickness increases toward the center of the recess.

As the second barrier layer becomes farther from the first active layer, the size of the recess may become smaller.

and an electron blocking layer disposed between the active layer and the second conductive semiconductor layer, wherein the electron blocking layer has a ratio of the thickness in the first region to the thickness in the second region of 0.8:1 to 1:1. You can.

The thickness of the second barrier layer closest to the first active layer may be thicker than the remaining second barrier layers.

According to the embodiment, the color rendering index of the light emitting device can be improved.

Additionally, the light output of the light emitting device can be improved and the driving voltage can be lowered.

The various and beneficial advantages and effects of the present invention are not limited to the above-described content, and may be more easily understood through description of specific embodiments of the present invention.

1 is a conceptual diagram of a light-emitting structure according to an embodiment of the present invention,
Figure 2 is a plan view showing recesses of various sizes according to an embodiment of the present invention;
Figure 3 is a graph showing the relationship between color rendering index and light output;
4A is a partial cross-sectional view of a light-emitting structure according to an embodiment of the present invention,
Figure 4b is an enlarged view of parts A and B of Figure 4a,
Figure 5 is a photograph showing a cross section of a light emitting structure according to an embodiment of the present invention,
6 is a partial cross-sectional view of a light emitting structure according to another embodiment of the present invention,
7 is a partial cross-sectional view of a light emitting structure according to another embodiment of the present invention,
8 is a partial cross-sectional view of a light emitting structure according to another embodiment of the present invention,
9 is a flowchart for explaining a method of manufacturing a light-emitting structure according to an embodiment of the present invention;
10 is a conceptual diagram of a semiconductor device according to an embodiment of the present invention;
11 is a conceptual diagram of a semiconductor device package according to an embodiment of the present invention.

The present embodiments may be modified in other forms or various embodiments may be combined with each other, and the scope of the present invention is not limited to each embodiment described below.

Even if matters described in a specific embodiment are not explained in other embodiments, they may be understood as descriptions related to other embodiments, as long as there is no explanation contrary to or contradictory to the matter in the other embodiments.

For example, if a feature for configuration A is described in a specific embodiment and a feature for configuration B is described in another embodiment, the description is contrary or contradictory even if an embodiment in which configuration A and configuration B are combined is not explicitly described. Unless otherwise stated, it should be understood as falling within the scope of the rights of the present invention.

In the description of the embodiment, when an element is described as being formed “on or under” another element, or under) includes both elements that are in direct contact with each other or one or more other elements that are formed (indirectly) between the two elements. Additionally, when expressed as "on or under," it can include not only the upward direction but also the downward direction based on one element.

Hereinafter, with reference to the attached drawings, embodiments of the present invention will be described in detail so that those skilled in the art can easily implement the present invention.

Figure 1 is a conceptual diagram of a light emitting structure according to an embodiment of the present invention, and Figure 2 is a plan view showing recesses of various sizes according to an embodiment of the present invention.

Referring to Figure 1, the light emitting structure according to an embodiment of the present invention includes a first conductive semiconductor layer 30, an active layer 50 disposed on the first conductive semiconductor layer 30, and an active layer ( It includes a second conductive semiconductor layer 70 disposed on 50). V-shaped recesses (V-pits) may be formed in at least one of the first conductive semiconductor layer 30, the active layer 50, and the second conductive semiconductor layer 70.

The substrate 10 includes a conductive substrate or an insulating substrate. The substrate 10 may be a material suitable for growing semiconductor materials or a carrier wafer. The substrate 10 may be formed of a material selected from sapphire (Al ₂ O ₃ ), SiC, GaAs, GaN, ZnO, Si, GaP, InP, and Ge, but is not limited thereto.

A buffer layer 20 may be disposed between the first conductive semiconductor layer 30 and the substrate 10. The buffer layer 20 can alleviate lattice mismatch between the light emitting structure and the substrate 10.

The buffer layer 20 may be a combination of group III and group V elements or may include any one of GaN, InN, AlN, InGaN, AlGaN, InAlGaN, and AlInN. The buffer layer 20 may be doped with a dopant, but is not limited to this.

The buffer layer 20 can be grown as a single crystal on the substrate 10, and the buffer layer 20 grown as a single crystal can improve the crystallinity of the first conductive semiconductor layer 30 grown on the buffer layer 20. .

The first conductivity type semiconductor layer 30 may be implemented with a compound semiconductor such as group III-V or group II-VI, and may be doped with a first dopant. The first conductive semiconductor layer 30 is a semiconductor material having the composition formula In _x1 Al _y1 Ga _{1 -x1-y1} N (0≤x1≤1, 0≤y1≤1, 0≤x1+y1≤1), e.g. For example, it may be selected from GaN, AlGaN, InGaN, InAlGaN, etc. And, the first dopant may be an n-type dopant such as Si, Ge, Sn, Se, or Te. When the first dopant is an n-type dopant, the first conductive semiconductor layer 30 doped with the first dopant may be an n-type semiconductor layer.

The active layer 50 is a layer where electrons (or holes) injected through the first conductive semiconductor layer 30 and holes (or electrons) injected through the second conductive semiconductor layer 70 meet. The active layer 50 transitions to a lower energy level as electrons and holes recombine, and can generate light with a corresponding wavelength.

The active layer 50 may have any one of a single well structure, a multi-well structure, a single quantum well structure, a multi quantum well (MQW) structure, a quantum dot structure, or a quantum wire structure. The structure is not limited to this.

In general, lattice defects such as dislocations (D) may occur in the first conductivity type semiconductor layer 30 due to lattice mismatch between the substrate 10 and the first conductivity type semiconductor layer 30. Semiconductor devices may have increased leakage current due to the potential (D) and become vulnerable to external static electricity.

In the active layer 50, a recess R1 caused by the dislocation D may be formed. The recess (R1) relieves the stress between the first conductive semiconductor layer 30 and the active layer 50, and the dislocation (D) is connected to the active layer 50 and the second conductive semiconductor layer 70. By preventing extension, the quality of semiconductor devices can be improved.

The recess (R1) can improve electrostatic discharge (ESD) yield by preventing leakage current due to the potential (D). However, there is a problem in that the area where the recess is formed does not contribute to light emission, resulting in a decrease in luminous intensity. The size of the recess can be formed in various ways.

The second conductive semiconductor layer 70 is formed on the active layer 50 and may be implemented with a compound semiconductor such as group III-V or group II-VI. Dopants may be doped. The second conductive semiconductor layer 70 is a semiconductor material with a composition formula of In _x5 Al _y2 Ga _{1 -x5- y2} N (0≤x5≤1, 0≤y2≤1, 0≤x5+y2≤1) or AlInN. , AlGaAs, GaP, GaAs, GaAsP, and AlGaInP. When the second dopant is a p-type dopant such as Mg, Zn, Ca, Sr, Ba, etc., the second conductive semiconductor layer 70 doped with the second dopant may be a p-type semiconductor layer.

An electron blocking layer (EBL) 60 may be disposed between the active layer 50 and the second conductive semiconductor layer 70. The electron blocking layer 60 blocks the flow of electrons supplied from the first conductive semiconductor layer 30 to the second conductive semiconductor layer 70, allowing electrons and holes to recombine within the active layer 50. The probability can be increased. The energy band gap of the electron blocking layer 60 may be larger than that of the active layer 50 and/or the second conductivity type semiconductor layer 70.

The electron blocking layer 60 is a semiconductor material having the composition formula In _x1 Al _y1 Ga _{1 -x1- y1} N (0≤x1≤1, 0≤y1≤1, 0≤x1+y1≤1), for example, AlGaN. , InGaN, InAlGaN, etc., but is not limited thereto.

Since the electron blocking layer 60 is formed on the active layer 50 having a recess, it may have a recess corresponding to the shape of the recess.

Figure 3 is a graph showing the relationship between color rendering index and light output.

Referring to FIG. 3, it can be seen that the color rendering index (CRI) and light output have an inverse relationship. Color Rendering Index (CRI) is an index that evaluates how well the light from a light source makes the unique color of an object appear as its true natural color.

As the wavelength of the semiconductor device increases, the color rendering index may increase while the light output may decrease. In particular, at a peak wavelength of 450 nm or less, light output increases along with an increase in the color rendering index, but from a peak wavelength of 450 nm, the color rendering index increases but the light output may decrease.

Therefore, there is a need to develop a semiconductor device that can increase light output along with an increase in color rendering index at a peak wavelength of 450 nm or more, or from 450 nm to 460 nm.

Optical output is related to the dominant wavelength of the semiconductor device. This is because the efficiency of phosphor technology currently in the commercialization stage decreases below 450 nm.

In order to have a peak wavelength of 450 nm or more in a semiconductor device, the energy band gap of the active layer 50 must be adjusted. For example, if the active layer 50 is an InGaN well layer/GaN barrier layer, the energy band gap can be adjusted by adjusting the In composition of the well layer. However, if the composition of In is increased, there is a problem that the film quality of the active layer 50 deteriorates and the light output decreases.

To improve the film quality of the active layer 50, the thickness of the barrier layer may be increased. When there are multiple barrier layers, film quality can be improved by increasing the thickness of all of the multiple barrier layers. However, there is a problem that the operating voltage increases when the barrier layer becomes thick.

As another method to improve the film quality of the active layer 50, a method of growing the barrier layer at high temperature can be considered. When the barrier layer is grown at a high temperature, crystallinity can be improved and the film quality of the active layer 50 can be improved. However, when the barrier layer is grown at a high temperature, there is a problem in that the size of the V-shaped recess formed in the active layer 50 is reduced or disappears.

If the size of the recess decreases or disappears, the size of the plurality of recesses becomes uneven, which reduces the advantageous effect and reduces the yield. Additionally, it is difficult for holes to be injected into the side of the recess, which may reduce light output. Therefore, a technology is needed to grow the barrier layer at high temperature to increase the quality of the film while maintaining the recess.

FIG. 4A is a partial cross-sectional view of a light-emitting structure according to an embodiment of the present invention, FIG. 4B is an enlarged view of portions A and B of FIG. 4A, and FIG. 5 is a cross-section of a light-emitting structure according to an embodiment of the present invention. This is a picture showing.

Referring to FIGS. 4A and 4B , the active layer 50 may be disposed on the trigger layer 40 . The indium (In) composition of the trigger layer 40 may be higher than the indium composition of the first conductive semiconductor layer 30. Generally, indium (In) has a large lattice size. Therefore, the more indium the gallium nitride (GaN) layer contains, the more easily a recess due to lattice mismatch can be formed. The trigger layer 40 can convert a potential into a recess 41 to grow a plurality of recesses to a uniform size.

The active layer 50 may include a first active layer 51 and a second active layer 52. The first active layer 51 may be a layer disposed adjacent to the first conductive semiconductor layer 30, and the second active layer 52 may be disposed between the first active layer 51 and the second conductive semiconductor layer 70. It could be a layer.

The first active layer 51 and the second active layer 52 may include a first region (P1) having a plurality of recesses (R1) and a second region (P2) between the plurality of recesses (R1). there is.

The first active layer 51 may include a plurality of first well layers 51a and a plurality of first barrier layers 51b arranged alternately. The second active layer 52 may include a plurality of second well layers 52a and a plurality of second barrier layers 52b arranged alternately.

Since the first active layer 51 is formed on the recess 41 formed in the trigger layer 40, a recess R1 is formed in the first region P1 and a relatively flat region is formed in the second region P2. It can be. Likewise, the second active layer 52 is formed on the recess R1 of the first active layer 51, so a recess R1 is formed in the first area P1 and the second area P2 is relatively flat. A region can be formed.

The thickness of the first area P1 of the first active layer 51 may be smaller than the thickness of the second area P2. The ratio of the thickness of the first region P1 to the thickness of the second region P2 in the first active layer 51 may be 1:2 to 1:10. When the first barrier layer 51b of the first active layer 51 is grown at a low temperature, the thickness of the first region P1 becomes smaller than the thickness of the second region P2, so that the shape of the recess R1 can be maintained. there is. Here, the thickness of the first region P1 may be the distance in the thickness direction of the light emitting structure.

The first active layer 51 may hardly participate in light emission. That is, the holes injected from the second conductive semiconductor layer 70 may not be injected to the first active layer 51 because they are relatively heavy. Accordingly, the first active layer 51 may not participate in light emission or may generate relatively weak light. In an embodiment, the first active layer 51 may serve to maintain the shape of the recess R1.

The thickness of the first barrier layer 51b in the first area P1 may be thinner than the thickness in the second area P2. The thickness of the first well layer 51a is the same as that of the first barrier layer 51b, and the thickness in the first area P1 may be thinner than the thickness in the second area P2. Alternatively, the thickness of the first well layer 51a may not be significantly different between the first area P1 and the second area P2. In the embodiment, the shape of the recess can be maintained by growing the first barrier layer 51b at a low temperature and controlling the thickness in the first region P1 to be thin.

The first barrier layer 51b may have a ratio of the thickness of the first region P1 to the thickness of the second region P2 of 1:2 to 1:10. If the thickness ratio is less than 1:2, the thickness in the first region P1 may increase and the size of the recess R1 may gradually become smaller. If the size of the recess R1 in the first active layer 51 begins to decrease, the recess R1 may disappear as the second active layer 52 grows. If the thickness ratio is greater than 1:10, the thickness in the first region P1 becomes too thin and the first barrier layer 51b may be broken in some sections.

The ratio of the thickness of the first well layer 51a and the thickness of the first barrier layer 51b may be 1:1 to 1:2.5. For example, the thickness of the first well layer 51a may be 2 nm to 5 nm, and the thickness of the first barrier layer 51b may be 2 nm to 12.5 nm.

Since the second active layer 52 is disposed between the first active layer 51 and the second conductive semiconductor layer 70, it can participate in most light emission. According to an embodiment, the active layer 50 contains In to generate light in a long wavelength range of 450 nm to 460 nm, so the quality of the film may be relatively poor. Therefore, the quality of the film can be improved by growing the second barrier layer 52b at a high temperature.

The first region of the second barrier layer 52b may gradually become narrower toward the second conductive semiconductor layer 70 (reduce from P1 to P3). When the second barrier layer 52b is grown at a high temperature, the wafer is bent, so the first region P1 may become relatively thick. Accordingly, the thickness of the first region P1 in the second active layer 52 may be thicker than the thickness of the second region P2.

Specifically, the thickness of the second barrier layer 52b in the first area P1 may be thicker than the thickness of the second area P2. Similar to the thickness of the second barrier layer 52b, the second well layer 52a may be thicker in the first area P1 than in the second area P2. Alternatively, the thickness of the second well layer 52a may not be significantly different between the first region P1 and the second region P2.

In the first area P1, the thickness of the second barrier layer 52b may be thicker than the thickness of the first barrier layer 51b. This is because the second barrier layer 52b is grown at a higher temperature than the first barrier layer 51b. However, the thickness of the second active layer 52a in the first region P1 may not be significantly different from the thickness of the first active layer 51a. This is because the first active layer 51a and the second active layer 52a are grown at substantially similar temperatures. Accordingly, the thickness of the second active layer 52 in the first region P1 may be thicker than the thickness of the first active layer 51.

The second barrier layer 52b may have a section whose thickness increases toward the center of the recess R1 (closer to the potential propagation path D). That is, the second barrier layer 52b can gradually grow thicker toward the center of the recess R1. Additionally, the size of the recess R1 of the second barrier layer 52b may become smaller as the distance from the first active layer 51 increases.

The ratio of the thickness of the first region P1 to the thickness of the second region P2 in the second barrier layer 52b may be 2:1 to 10:1. If the thickness ratio is smaller than 2:1, the thickness of the second barrier layer 52b may decrease and the film quality may deteriorate, and if the thickness ratio is larger than 10:1, the size of the recess (R1) may be excessively reduced. there is.

In the second active layer 52, the barrier layer 52b closest to the first active layer 51 may be thicker than the thickness of the remaining barrier layers. That is, the thickness of the barrier layer may be thickest in the section where the growth of the first active layer 51 ends and the growth of the second active layer 52 begins.

The ratio of the thickness of the second well layer 52a and the thickness of the second barrier layer 52b may be 1:1 to 1:3. The thickness of the second well layer 52a may be 2 nm to 5 nm, and the thickness of the second barrier layer 52b may be 2 nm to 15 nm.

According to an embodiment, the first well layer 51a and the second well layer 52a may have the same thickness. However, it is not necessarily limited to this, and the second well layer 52a may be thicker than the first well layer 51a. In this case, the thickness of the second active layer 52a, which participates in light emission, increases, so the light emission efficiency may increase.

The first barrier layer 51b and the second barrier layer 52b may be doped with an n-type dopant. As the thickness of the first barrier layer 51b and the second barrier layer 52b increases, the operating voltage may decrease. Therefore, the operating voltage can be reduced by doping the first and second barrier layers 51b and 52b with a dopant. The doping concentration may be 1×10 ¹⁶ /cm ³ to 1×10 ¹⁹ /cm ³ but is not necessarily limited thereto.

According to an embodiment, the first barrier layer 51b is grown at a low temperature to maintain the recess R1, and the second barrier layer 52b is grown at a high temperature to improve the film quality of the second active layer 52. . Therefore, light in a long wavelength band can be generated, and light output can be improved.

Referring to FIG. 5, it can be seen that the thickness of the first barrier layer 51b gradually decreases from the second region (P2) to the first region (P1). Additionally, it can be seen that the shape of the recess is maintained in the first active layer.

On the other hand, it can be seen that the thickness of the second barrier layer 52b gradually increases from the second region (P2) to the first region (P1). In addition, it can be seen that the thickness of the second barrier layer 52b increases toward the top of the second active layer 51 (d3>d2>d1).

Figure 6 is a partial cross-sectional view of a light-emitting structure according to another embodiment of the present invention, Figure 7 is a partial cross-sectional view of a light-emitting structure according to another embodiment of the present invention, and Figure 8 is a light-emitting structure according to another embodiment of the present invention. This is a partial cross-section of the structure.

Referring to FIG. 6 , the electron blocking layer 60 and the second conductive semiconductor layer 70 disposed on the active layer 50 may be disposed inside the recess R1 of the active layer 50 . Accordingly, holes injected from the second conductive semiconductor layer 70 may penetrate the electron blocking layer 60 and be injected into the active layer 50.

The thickness of the first active layer 51 and the thickness of the second active layer 52 may be appropriately adjusted so that the recess does not disappear when the second active layer 52 is grown.

The electron blocking layer 60 may be doped with a P-type dopant to improve hole injection. When doped with a P-type dopant, the resistance can be lowered and current injection can be increased. The P-type dopant may be one or more selected from the group consisting of Mg, Zn, Ca, Sr, and Ba.

In the second region (P2), the concentration of P-type dopant is high, so hole injection is relatively easy, but in the first region (P1), the concentration of Al is relatively high and the concentration of P-type dopant is low, making hole injection difficult. there is. That is, the resistance of the first area (P1) may be higher than that of the second area (P2). As the thickness of the first region P1 becomes thinner, doping with the P-type dopant may become more difficult. Accordingly, the electron blocking layer 60 can be grown at high temperature to increase its thickness within the recess. As a result, the doping concentration of the dopant may increase. For example, the electron blocking layer 60 may be grown at 790°C to 1230°C and controlled so that the thickness ratio of the first region (P1) and the second region (P2) is 0.8:1 to 1:1.

Referring to FIG. 7, film quality may be improved by controlling only the thickness of the second barrier layer 52b of the second active layer 52. According to the embodiment, since the second barrier layer 52b is not grown at a high temperature, the problem of the second barrier layer 52b growing excessively in the first region P1 and the recess shrinking can be solved.

Additionally, as shown in FIG. 8, the first to third active layers 51, 52, and 53 may be set in three sections and the barrier layers of the first to third active layers 51, 52, and 53 may be grown under different temperature conditions. there is. For example, the barrier layer of the first section 51 is grown at 200°C to 230°C, the barrier layer of the second section 52 is grown at 230°C to 260°C, and the barrier layer of the third section 53 is grown at 230°C to 260°C. Can be grown at 260°C to 270°C.

According to an embodiment, rapid growth of the barrier layer within the recess can be suppressed by gradually increasing the growth temperature. Therefore, a decrease in the size of the recess within the active layer can be suppressed.

Figure 9 is a flowchart for explaining a method of manufacturing a light-emitting structure according to an embodiment of the present invention.

Referring to FIG. 9, the method of manufacturing the light emitting structure includes forming a first conductive semiconductor layer 30, an active layer 50, an electron blocking layer 60, and a second conductive semiconductor layer 70 on a substrate 10. can be formed sequentially. In particular, the active layer 50 can be divided into a step of growing the first active layer 51 (S10) and a step of growing the second active layer 52 (S20).

In the step of growing the first active layer 51, the first well layer 51a may be formed at 700°C to 800°C, and the first barrier layer 51b may be grown at 780°C to 1030°C. Since the growth temperature of the first barrier layer 51b is relatively low, the first barrier layer 51b can be grown to a thin thickness in the first region P1.

To lower the operating voltage, the first barrier layer 51b may be doped with silicon. The doping concentration may be 1×10 ¹⁶ /cm ³ to 1×10 ¹⁹ /cm ³ but is not necessarily limited thereto.

In the step of growing the second active layer 52, the second well layer 52a may be formed at 700°C to 800°C, and the second barrier layer 52b may be grown at 790°C to 1230°C. That is, the growth temperature of the second barrier layer 52b can be set higher than the growth temperature of the first barrier layer 51b.

Accordingly, the crystallinity of the second barrier layer 52b may be improved. Additionally, the second barrier layer 52b may grow thicker than the first barrier layer 51b in the first region P1. Alternatively, the wafer may bend at the growth temperature of the second barrier layer 52b and the first region P1 may become relatively thick. When growing the second barrier layer 52b, more growth gas may be supplied than when growing the first barrier layer 51b, but it is not necessarily limited to this.

The second barrier layer 52b may be doped with silicon. The doping concentration may be 1×10 ¹⁶ /cm ³ to 1×10 ¹⁹ /cm ³ but is not necessarily limited thereto.

10 is a conceptual diagram of a semiconductor device according to an embodiment of the present invention.

Referring to FIG. 10 , a semiconductor device according to an embodiment may include a substrate 10, a buffer layer 20, a light emitting structure 20, and first and second electrodes 81 and 82. Since the substrate 10, the buffer layer 20, and the light emitting structure 20 have already been described in detail previously, further description will be omitted.

The first electrode 81 may be electrically connected to the exposed area of the first conductive semiconductor layer 30, and the second electrode 82 may be disposed on the second conductive semiconductor layer.

The first and second electrodes 34 and 36 are made of indium tin oxide (ITO), indium zinc oxide (IZO), indium zinc tin oxide (IZTO), indium aluminum zinc oxide (IAZO), indium gallium zinc oxide (IGZO), IGTO (indium gallium tin oxide), AZO (aluminum zinc oxide), ATO (antimony tin oxide), GZO (gallium zinc oxide), IZON (IZO Nitride), AGZO (Al-Ga ZnO), IGZO (In-Ga ZnO) , ZnO, IrOx, RuOx, NiO, RuOx/ITO, Ni/IrOx/Au, or Ni/IrOx/Au/ITO, Ag, Ni, Cr, Ti, Al, Rh, Pd, Ir, Sn, In, Ru, It may be formed including at least one of Mg, Zn, Pt, Au, and Hf, but is not limited to these materials.

In Figure 10, a horizontal semiconductor device is shown, but it is not necessarily limited thereto. Semiconductor devices according to embodiments may include vertical and flip chip structures.

Figure 11 is a cross-sectional view showing a semiconductor device package according to an embodiment.

Referring to FIG. 11, a semiconductor device package according to an embodiment includes a body 1, a first lead electrode 3 and a second lead electrode 3 installed on the body 1, and first and second lead electrodes. (3) The power source may include a semiconductor device 100 and a molding member 4 surrounding the semiconductor device 100.

The body 1 may be formed of a silicon material, a synthetic resin material, or a metal material, and an inclined surface may be formed around the semiconductor device 100.

The first lead electrode 3 and the second lead electrode 3 are electrically separated from each other and provide power to the semiconductor device 100.

In addition, the first and second lead electrodes 103 and 105 can increase light efficiency by reflecting light generated from the semiconductor device 100 and serve to discharge heat generated from the semiconductor device 100 to the outside. You can also do this.

The semiconductor device 100 may be installed on any one of the first lead electrode 3, the second lead electrode 3, and the body 1, and the first and second lead electrodes may be connected by a wire method, die bonding method, etc. It may be electrically connected to (3), but is not limited to this. For example, one side of the semiconductor device 100, for example, the back of the semiconductor device 100, is in electrical contact with the top surface of the first lead electrode 3, and the other side of the semiconductor device 100 is connected to a second lead electrode ( 3) can be electrically connected to

The semiconductor device 100 of the embodiment may be any one of the horizontal semiconductor device, flip semiconductor device, and vertical semiconductor device described above, but is not limited thereto.

The molding member 4 may surround the semiconductor device 100 and protect the semiconductor device 100. Additionally, the molding member 4 includes a phosphor and can change the wavelength of light emitted from the semiconductor device 100.

The semiconductor device package according to the embodiment includes a COB (Chip On Board) type, the top surface of the body 1 is flat, and a plurality of semiconductor devices 100 may be installed in the body 1.

Semiconductor devices can be used as a light source for a lighting system, a light source for an image display device, or a light source for a lighting device. In other words, the semiconductor device can be applied to various electronic devices that are placed in a case and provide light. For example, when using a mixture of semiconductor devices and RGB phosphors, white light with excellent color rendering (CRI) can be implemented.

The above-described semiconductor device is composed of a light-emitting device package and can be used as a light source for a lighting system. For example, it can be used as a light source for an image display device or a lighting device.

When used as a backlight unit for a video display device, it can be used as an edge-type backlight unit or a direct-type backlight unit. When used as a light source for a lighting device, it can be used as a luminaire or bulb type. It can also be used as a light source for a mobile terminal. It may be possible.

Semiconductor devices include laser diodes in addition to the light emitting diodes described above.

The laser diode, like the light emitting device, may include a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer of the above-described structure. In addition, the electro-l㎛inescence phenomenon, in which light is emitted when a p-type first conductivity type semiconductor and an n-type second conductivity type semiconductor are bonded and a current is passed, is used. There are differences in the directionality and phase of light. In other words, a laser diode can emit light with one specific wavelength (monochromatic beam) with the same phase and in the same direction by using a phenomenon called stimulated emission and constructive interference. Therefore, it can be used in optical communications, medical equipment, and semiconductor processing equipment.

An example of a light receiving element is a photodetector, which is a type of transducer that detects light and converts the intensity into an electrical signal. Such photodetectors include photocells (silicon, selenium), light output devices (cadmium sulfide, cadmium selenide), photodiodes (e.g., PDs with a peak wavelength in the visible blind spectral region or true blind spectral region), and photovoltaic devices (PDs). Examples include transistors, photomultiplier tubes, photoelectron tubes (vacuum, gas-encapsulated), and IR (Infra-Red) detectors, but embodiments are not limited thereto.

Additionally, semiconductor devices such as photodetectors can generally be manufactured using direct bandgap semiconductors, which have excellent light conversion efficiency. Alternatively, photodetectors have various structures, and the most common structures include a pin-type photodetector using a p-n junction, a Schottky-type photodetector using a Schottky junction, and a MSM (Metal Semiconductor Metal) type photodetector. there is.

A photodiode, like a light emitting device, may include a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer of the structure described above, and may have a pn junction or pin structure. The photodiode operates by applying a reverse bias or zero bias, and when light is incident on the photodiode, electrons and holes are created and a current flows. At this time, the size of the current may be approximately proportional to the intensity of light incident on the photodiode.

A photovoltaic cell, or solar cell, is a type of photodiode that can convert light into electric current. The solar cell, like the light emitting device, may include a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer having the above-described structure.

In addition, it can be used as a rectifier in electronic circuits through the rectification characteristics of a general diode using a p-n junction, and can be applied to ultra-high frequency circuits and oscillator circuits.

In addition, the above-described semiconductor device is not necessarily implemented only as a semiconductor and may further include a metal material in some cases. For example, a semiconductor device such as a light receiving device may be implemented using at least one of Ag, Al, Au, In, Ga, N, Zn, Se, P, or As, and may be implemented using a p-type or n-type dopant. It may also be implemented using doped semiconductor materials or intrinsic semiconductor materials.

Although the above description focuses on examples, this is only an example and does not limit the present invention, and those skilled in the art will understand that the examples are as follows without departing from the essential characteristics of the present example. You will see that various variations and applications are possible. For example, each component specifically shown in the examples can be modified and implemented. And these variations and differences in application should be construed as being included in the scope of the present invention as defined in the appended claims.

10: substrate
30: First conductive semiconductor layer
50: active layer
51: first active layer
51a: first well layer
51b: first barrier layer
52: second active layer
52a: second well layer
52b: second barrier layer
60: Electronic blocking layer
70: Second conductive semiconductor layer

Claims (15)

A first conductive semiconductor layer;
an active layer disposed on the first conductive semiconductor layer; and
It includes a second conductive semiconductor layer disposed on the active layer,
The active layer includes a first active layer and a second active layer disposed between the first active layer and the second conductive semiconductor layer,
The first active layer and the second active layer include a first region having a recess and a second region between the recesses,
The thickness of the second active layer in the first area is thicker than the thickness of the first active layer in the first area,
A semiconductor device wherein the second active layer in the first region is thicker than the thickness of the second active layer in the second region.
According to paragraph 1,
The first active layer includes a plurality of first well layers and a plurality of first barrier layers,
The second active layer is a semiconductor device including a plurality of second well layers and a plurality of second barrier layers.
According to paragraph 2,
The first barrier layer is a semiconductor device in which the ratio of the thickness of the first region to the thickness of the second region is 1:2 to 1:10.
According to paragraph 2,
The second barrier layer is a semiconductor device wherein the ratio of the thickness of the first region to the thickness of the second region is 2:1 to 10:1.
According to paragraph 4,
A semiconductor device wherein the second barrier layer in the first region is thicker than the first barrier layer.
According to paragraph 4,
The second well layer is a semiconductor device that emits light in the 450nm to 460nm wavelength range.
According to paragraph 2,
A semiconductor device wherein the ratio of the thickness of the first well layer to the thickness of the first barrier layer is 1:1 to 1:2.5.
According to paragraph 2,
A semiconductor device wherein the ratio of the thickness of the second well layer to the thickness of the second barrier layer is 1:1 to 1:3.
According to paragraph 2,
A semiconductor device in which the first barrier layer and the second barrier layer are doped with an n-type dopant.
According to paragraph 2,
The second barrier layer has a section whose thickness increases toward the center of the recess.
According to clause 10,
A semiconductor device in which the size of a recess formed in the second barrier layer of the first region becomes smaller as the distance from the first active layer increases.
According to paragraph 1,
It includes an electron blocking layer disposed between the active layer and the second conductive semiconductor layer,
A semiconductor device wherein the electron blocking layer has a ratio of a thickness in the first region to a thickness in the second region of 0.8:1 to 1:1.
According to paragraph 1,
A semiconductor device wherein the second barrier layer closest to the first active layer is thicker than the remaining second barrier layers.
body and,
Includes a semiconductor element disposed inside the body,
The semiconductor device is,
A first conductive semiconductor layer;
an active layer disposed on the first conductive semiconductor layer; and
It includes a second conductive semiconductor layer disposed on the active layer,
The active layer includes a first active layer and a second active layer disposed on the first active layer,
The first active layer and the second active layer include a first region where a plurality of recesses are disposed, and a second region between the plurality of recesses,
A semiconductor device package in which the thickness of the second active layer in the first region is thicker than the thickness of the first active layer.
A display device including the semiconductor device according to claim 1.

Images