KR102632201B1 - Semiconductor device - Google Patents

Abstract

Examples include a substrate; a buffer layer disposed on the substrate; a first conductive semiconductor layer disposed on the buffer layer and including an insulating layer; an active layer disposed on the first conductive semiconductor layer; It includes a second conductive semiconductor layer disposed on the active layer, and primary ions are applied to the substrate, the buffer layer, the first conductive semiconductor layer, the second conductive semiconductor layer, and the active layer to generate secondary Ions are released, and the secondary ions include aluminum, a first dopant, and oxygen, the ionic strength of oxygen includes a maximum oxygen intensity peak with the largest ionic strength, and the ionic strength of aluminum is equal to the maximum oxygen intensity peak. the first nearest aluminum intensity peak; and a second aluminum intensity peak disposed spaced apart from the first aluminum intensity peak in the first direction, wherein the doping concentration of the first dopant is disposed between the first aluminum intensity peak and the second aluminum intensity peak. and a first concentration peak having a maximum concentration, and the first direction is a direction from the maximum oxygen intensity peak to the first aluminum intensity peak.

Description

Semiconductor device {SEMICONDUCTOR DEVICE}

The embodiment relates to a semiconductor device.

Semiconductor devices containing compounds such as GaN and AlGaN have many advantages, such as having a wide and easily adjustable band gap energy, and can be used in a variety of ways, such as light emitting devices, light receiving devices, and various diodes.

In particular, light-emitting devices such as light emitting diodes and laser diodes using group 3-5 or group 2-6 compound semiconductor materials have been developed into red, green, and green colors through the development of thin film growth technology and device materials. Various colors such as blue and ultraviolet rays can be realized, and efficient white light can also be realized by using fluorescent materials or combining colors. Compared to existing light sources such as fluorescent lights and incandescent lights, it has low power consumption, semi-permanent lifespan, and fast response speed. , has the advantages of safety and environmental friendliness.

In addition, when light-receiving devices such as photodetectors or solar cells are manufactured using group 3-5 or group 2-6 compound semiconductor materials, the development of device materials absorbs light in various wavelength ranges to generate photocurrent. By doing so, light of various wavelengths, from gamma rays to radio wavelengths, can be used. In addition, it has the advantages of fast response speed, safety, environmental friendliness, and easy control of device materials, so it can be easily used in power control, ultra-high frequency circuits, or communication modules.

Therefore, semiconductor devices can replace the transmission module of optical communication means, the light emitting diode backlight that replaces the cold cathode fluorescence lamp (CCFL) that constitutes the backlight of LCD (Liquid Crystal Display) display devices, and fluorescent or incandescent light bulbs. Applications are expanding to include white light-emitting diode lighting devices, automobile headlights and traffic lights, and sensors that detect gas or fire. Additionally, the applications of semiconductor devices can be expanded to high-frequency application circuits, other power control devices, and communication modules.

In particular, light-emitting devices that emit light in the ultraviolet wavelength range have a curing or sterilizing effect and can be used for curing, medical purposes, and sterilization.

Recently, research on ultraviolet light-emitting devices has been active, but there is a problem of deterioration of optical properties due to deterioration of crystal quality and bending.

The embodiment provides a semiconductor device with improved crystal quality of the semiconductor layer.

The embodiment provides a semiconductor device with reduced low-current defects.

Embodiments provide a semiconductor device with improved light output.

The problem to be solved in the embodiments of the present invention is not limited to this, and also includes purposes and effects that can be understood from the means of solving the problem or embodiments described below.

A semiconductor device according to an embodiment of the present invention includes a substrate; a first conductive semiconductor layer disposed on the substrate and including an insulating layer; an active layer disposed on the first conductive semiconductor layer; and a second conductive semiconductor layer disposed on the active layer, wherein the substrate, the first conductive semiconductor layer, the active layer, and the second conductive semiconductor layer emit secondary ions when primary ions are applied. , the secondary ions include aluminum, a first dopant, and oxygen, the ionic intensity of the oxygen secondary ion includes a maximum oxygen intensity peak with the largest ionic intensity, and the aluminum secondary ion intensity is the intensity of the oxygen secondary ion. A plurality of peaks of aluminum secondary ion intensity include a first aluminum intensity peak closest to the maximum oxygen intensity peak and a second aluminum intensity peak spaced apart from the first aluminum intensity peak in a first direction. intensity peak; a third aluminum intensity peak spaced apart from the second aluminum intensity peak in the first direction; and a fourth aluminum intensity peak spaced apart from the third aluminum intensity peak in the first direction, wherein the first direction is a direction from the maximum oxygen intensity peak toward the first aluminum intensity peak, and the first aluminum intensity peak is spaced apart from the third aluminum intensity peak in the first direction. The conductive semiconductor layer includes a first region disposed between the third aluminum intensity peak and the maximum oxygen intensity peak, and the second conductive semiconductor layer is spaced apart from the fourth aluminum intensity peak in the first direction. Comprising a second region, the active layer includes a third region between the third aluminum intensity peak and the fourth aluminum intensity peak, and the first dopant secondary ion is present in the first conductive semiconductor layer and the active layer. , and a first concentration peak having the highest concentration in the second conductivity type semiconductor layer, wherein the first concentration peak is located in a region between the first aluminum intensity peak and the second aluminum intensity peak, The insulating layer includes a fourth region located between the first concentration peak and the second aluminum intensity peak.

The aluminum secondary ion intensity includes a first sub-region including the first aluminum intensity peak; a second sub-region spaced apart from the first sub-region in a first direction and including the first aluminum intensity peak; and a third sub-region disposed between the second sub-region and the first sub-region, wherein the third sub-region has an aluminum secondary ion intensity between the first aluminum intensity peak and the second aluminum intensity peak. The aluminum secondary ion intensity and intensity ratio may be 1:100 or less.

The aluminum secondary ion intensity of the first sub-region may be lower than the aluminum secondary ion intensity of the first aluminum intensity peak, and specifically, 75% to 100% of the aluminum secondary ion intensity of the first aluminum intensity peak. You can.

The aluminum secondary ion intensity of the second sub-region may be lower than the aluminum secondary ion intensity of the second aluminum intensity peak, and specifically, 90% to 100% of the aluminum secondary ion intensity of the second aluminum intensity peak. You can.

The aluminum secondary ion intensity includes a third aluminum intensity peak spaced apart from the second aluminum intensity peak in the first direction; and a fourth aluminum intensity peak spaced apart from the third aluminum intensity peak in the first direction, wherein the third aluminum intensity peak has an aluminum secondary ion intensity equal to the aluminum secondary ion intensity of the fourth aluminum intensity peak. It can be lower.

The fourth aluminum intensity peak may be the maximum aluminum intensity peak.

The aluminum secondary ion intensity of the second aluminum intensity peak may be the same as the aluminum ion intensity of the third aluminum intensity peak.

The aluminum secondary ion intensity may include a fourth sub-region spaced apart from the third sub-region in the first direction and including the third aluminum intensity peak; and a fifth sub-region disposed between the third sub-region and the fourth sub-region, wherein the fifth sub-region has an aluminum ion intensity between the second aluminum intensity peak and the third aluminum intensity peak. The ionic strength and intensity ratio may be 1:0.01 or less.

The thickness difference between the first concentration peak and the first aluminum intensity peak may be a ratio of the thickness difference between the first concentration peak and the second aluminum intensity peak of 1:50 to 1:130.

The first dopant secondary ion has a second concentration peak having a maximum doping concentration in a region spaced apart from the first concentration peak in the first direction; a third concentration peak having a maximum doping concentration between the second concentration peak and the first concentration peak; It may further include a fourth concentration peak having a maximum doping concentration in a region spaced apart from the second concentration peak in the first direction.

The doping concentration of the third concentration peak may be lower than the doping concentration of the second concentration peak.

The secondary ion further includes indium, the indium secondary ion intensity includes a first indium intensity peak with a maximum intensity, and the fourth concentration peak is spaced apart from the first indium intensity peak in a second direction, , the second direction may be opposite to the first direction.

The aluminum secondary ion intensity, the oxygen secondary ion intensity, the first dopant secondary ion intensity, and the indium secondary ion intensity may be spectra measured by TOF-SIMS.

The primary ions include O2+, Cs+, and Bi+, and the TOF-SIMS measurement conditions may include an acceleration voltage of 2 keV and an irradiation current of 3 pA.

It further includes a buffer layer disposed between the substrate and the first conductive semiconductor layer, wherein the substrate includes oxygen atoms, the first conductive semiconductor layer and the buffer layer include an Al element, and the insulating layer includes It may contain Si element.

According to an embodiment of the present invention, a semiconductor device with improved crystal quality is provided by arranging the doping concentration peak of the first dopant between the aluminum secondary ion intensity peaks.

Embodiments provide a semiconductor device with reduced low-current defects and improved light output.

The various and beneficial advantages and effects of the present invention are not limited to the above-described content, and may be more easily understood through description of specific embodiments of the present invention.

1 is a conceptual diagram of a semiconductor device according to an embodiment of the present invention;
Figure 2 is a diagram showing the energy band gap of a semiconductor device according to an embodiment of the present invention;
Figure 3a is an enlarged view of portion K in Figure 1;
Figure 3b is a top view of the insulating layer in Figure 3a;
Figure 4a is SIMS (Secondary Ion Mass Spectroscopy) data of a semiconductor device according to an embodiment of the present invention;
Figure 4b is an enlarged view of part J in Figure 4a,
Figure 5 is a diagram showing the secondary ion strengths of oxygen and aluminum,
Figure 6 is a diagram showing the doping concentration of the first dopant;
Figure 7 is an enlarged view of part A in Figure 4,
Figure 8 is a diagram showing the secondary ion intensity of indium in Figure 7,
Figure 9 is a diagram showing the doping concentration of the first dopant in Figure 7;
10 is a conceptual diagram of a semiconductor device package according to an embodiment of the present invention.

The present embodiments may be modified in other forms or several embodiments may be combined with each other, and the scope of the present invention is not limited to each embodiment described below.

Even if matters described in a specific embodiment are not explained in other embodiments, they may be understood as descriptions related to other embodiments, as long as there is no contrary or contradictory description in the other embodiments.

For example, if a feature for configuration A is described in a specific embodiment and a feature for configuration B is described in another embodiment, the description is contrary or contradictory even if an embodiment in which configuration A and configuration B are combined is not explicitly described. Unless otherwise stated, it should be understood as falling within the scope of the rights of the present invention.

In the description of the embodiment, when an element is described as being formed “on or under” another element, or under) includes both elements that are in direct contact with each other or one or more other elements that are formed (indirectly) between the two elements. Additionally, when expressed as "on or under," it can include not only the upward direction but also the downward direction based on one element.

Hereinafter, with reference to the attached drawings, embodiments of the present invention will be described in detail so that those skilled in the art can easily implement the present invention.

FIG. 1 is a conceptual diagram of a semiconductor device according to an embodiment of the present invention, FIG. 2 is a diagram showing the energy band gap of a semiconductor device according to an embodiment of the present invention, FIG. 3A is an enlarged view of portion K in FIG. 1, Figure 3b is a top view of the insulating layer in Figure 3a.

1 to 3, the semiconductor device according to the embodiment includes a substrate 110, a buffer layer 115, a first conductivity type semiconductor layer 120 disposed on the buffer layer 115, and a first conductivity type semiconductor. A first electrode 161 electrically connected to the active layer 130 disposed on the layer 120, the second conductive semiconductor layer 150 disposed on the active layer 130, and the first conductive semiconductor layer 120. ) and a second electrode 162 electrically connected to the second conductive semiconductor layer 150.

First, the substrate 110 may include an insulating substrate. The substrate 110 may be a material suitable for growing semiconductor materials or a carrier wafer. By way of example, the substrate 110 may be made of a material such as sapphire (Al2O3), silicon (Si), GaN, or SiC.

The buffer layer 115 may be disposed on the substrate 110 . The buffer layer 115 can alleviate lattice mismatch between the substrate 110, the first conductivity type semiconductor layer 120, the active layer 130, and the second conductivity type semiconductor layer 150. The buffer layer 115 may be made of AlN. This buffer layer 115 can be grown on the substrate 110 to improve crystallinity of the first conductive semiconductor layer 120.

The first conductive semiconductor layer 120 may be implemented with a compound semiconductor such as group III?-V or group II?-VI, and may be doped with a first dopant. The first conductivity type semiconductor layer 120 is a semiconductor material having a composition formula of Inx1Aly1Ga1-x1-y1N (0=x1≤=1, 0≤=y1≤=1, 0≤=x1+y1≤=1), for example. For example, it can be selected from GaN, AlGaN, InGaN, InAlGaN, etc.

The first dopant may be an n-type dopant such as Si, Ge, Sn, Se, or Te. When the first dopant is an n-type dopant, the first conductive semiconductor layer 120 doped with the first dopant may be an n-type semiconductor layer. Additionally, hereinafter, the first dopant will be described as Si.

The first conductive semiconductor layer 120 includes an insulating layer 121, a first sub-semiconductor layer 122, a second sub-semiconductor layer 123, a third sub-semiconductor layer 124, and a first superlattice layer 125. ) and a second superlattice layer 126.

The insulating layer 121 may be disposed below the first conductive semiconductor layer 120. In other words, the insulating layer 121 may be located on the buffer layer 115. This insulating layer 121 may be made of amorphous nitride. In an embodiment, the insulating layer 121 may be made of SiNx.

Additionally, the insulating layer 121 may include a hole (h). For example, the insulating layer 121 may include a plurality of holes (h). The above-described hole (h) may penetrate the insulating layer 121 and the upper surface of the buffer layer 115 may be exposed within the hole (h). For example, the first sub-semiconductor layer 122, the buffer layer 115, etc. may be disposed in the hole h. And these holes (h) may have various shapes and sizes.

More specifically, a buffer layer 115 made of a material such as air, a different material from the substrate 110, or AlN may be partially disposed in the hole h of the insulating layer 121. Accordingly, a dislocation (DL) similar to the dislocation (DL) existing in the buffer layer 115 may be disposed to extend upward in the hole (h). That is, the dislocation DL may exist in the hole h. This potential DL may extend upward within the first sub-semiconductor layer 122 disposed on the insulating layer 121. A detailed description of the first sub-semiconductor layer 122 will be described later. Additionally, the first sub-semiconductor layer 122 may include a first overlapping region that overlaps the hole h in the vertical direction and a second overlapping region that overlaps the insulating layer 121 . Additionally, the defect density of the first overlapping area may be greater than the bond density of the second overlapping area. By this configuration, the insulating layer 121 prevents the dislocation DL of the buffer layer 115 from extending upward through the first sub-semiconductor layer 122, thereby improving the crystal quality of the first sub-semiconductor layer 122. can do. In addition, the compressive stress applied from the insulating layer 121 to the first sub-semiconductor layer 122 or from the insulating layer 121 to the lower buffer layer 115 is strengthened to form the first sub-semiconductor layer 122 or Tensile stress applied to the buffer layer 115 can be reduced and the semiconductor device can be prevented from bending. Accordingly, the luminous flux of the semiconductor device can be improved and low current can be improved.

The first sub-semiconductor layer 122 may be disposed on the insulating layer 121. The first sub-semiconductor layer 122 may be an unintentionally doped semiconductor layer. In an embodiment, the first sub-semiconductor layer 122 may be GaN. Additionally, the first sub-semiconductor layer 122 may be doped with the above-described first dopant, but is not limited thereto.

Additionally, as described above, the first sub-semiconductor layer 122 prevents the entire dislocation of the buffer layer 115 from extending upward due to lateral growth, thereby eliminating the dislocation. The first sub-semiconductor layer 122 may have a thickness of 1200 nm to 1400 nm, but is not limited thereto.

The second sub-semiconductor layer 123 may be disposed on the first sub-semiconductor layer 122. The second sub-semiconductor layer 123 may include Al. By way of example, the second sub-semiconductor layer 123 may be made of AlGaN. Accordingly, the second sub-semiconductor layer 123 can block dislocations moving from the bottom to the top by providing tensile stress. Additionally, the second sub-semiconductor layer 123 may be doped with the first dopant described above. The second sub-semiconductor layer 123 may have a thickness of 15 nm to 20 nm.

The third sub-semiconductor layer 124 may be disposed on the second sub-semiconductor layer 123. The third sub-semiconductor layer 124 may be made of GaN. Additionally, it may be doped with the first dopant described above.

In an embodiment, the third sub-semiconductor layer 124 may include a 3-1 sub-semiconductor layer 124a and a 3-2 sub-semiconductor layer 124b. The 3-1 sub-semiconductor layer 124a may be located below the 3-2 sub-semiconductor layer 124b. At this time, the 3-1 sub-semiconductor layer 124a may be made of GaN, and the 3-2 sub-semiconductor layer may be made of AlGaN. Accordingly, the energy band gap of the 3-1 sub-semiconductor layer 124a may be larger than that of the 3-2 sub-semiconductor layer 124b. Accordingly, the third sub-semiconductor layer 124 provides an energy offset to trap electrons moving toward the active layer 130 in the 3-2 sub-semiconductor layer 124b to prevent electrons from overflowing. there is.

The first superlattice layer 125 may be disposed on the third sub-semiconductor layer 124. This first superlattice layer 125 may include first sub-layers 125a and second sub-layers 125b arranged alternately. The first sub-layer 125a may include indium. For example, the first sub-layer 125a may be InN and the second sub-layer 125b may be GaN, but the present invention is not limited thereto.

Both the first sub-layer 125a and the second sub-layer 125b may be InGaN. At this time, the InGaN composition of the first sub-layer 125a and the InGaN composition of the second sub-layer 125b may be different from each other. For example, the indium (In) composition of the first sub-layer 125a may be higher than the indium (In) composition of the second sub-layer 125b.

The first sub-layer 125a may have a thickness of 2 nm to 4 nm, and the second sub-layer 125b may have a thickness of 20 nm to 40 nm. That is, the first sub-layer 125a may be thinner than the second sub-layer 125b.

The first superlattice layer 125 may be a semiconductor layer grown at low temperature to form a concavo-convex portion with a V-shaped cross-section. The uneven portion relieves the stress of the first conductive semiconductor layer 120 and the active layer 130 and prevents dislocations from extending to the active layer 130 and the second conductive semiconductor layer 150. The quality of semiconductor devices can be improved.

Additionally, the surface roughness of the active layer may increase and the applied stress may increase. Therefore, light output may decrease.

On the other hand, it can be confirmed that in the semiconductor device according to the embodiment, the first superlattice layer 125 is disposed on the first conductive semiconductor layer 120, thereby reducing groove-shaped defects while maintaining the density of the uneven portion. . That is, according to the embodiment, the first superlattice layer 125 is disposed on the first conductive semiconductor layer 120, thereby determining the surface morphology of the semiconductor layer and the stress of the active layer 130 before growth of the active layer 130. can be controlled. Therefore, the optical and electrical properties of the semiconductor device can be improved.

The first sub-layer 125a and the second sub-layer 125b may be doped with a first dopant. The first dopant may be an n-type dopant such as Si, Ge, Sn, Se, or Te. When the first dopant is an n-type dopant, the first sub-layer 125a and the second sub-layer 125b doped with the first dopant may be n-type semiconductor layers.

The doping concentration of the first sub-layer 125a may be higher than that of the second sub-layer 125b. If both the first sub-layer 125a and the second sub-layer 125b are sufficiently doped with the first dopant, it may be advantageous for electrostatic discharge (ESD), but the reverse voltage (VR) may drop significantly. Therefore, in the embodiment, the width of the depletion region is minimized by further doping the first dopant into the first sub-layer 125a, which is thinner than the second sub-layer 125b, so if the reverse voltage (VR) level is not significantly lowered, Electrostatic discharge (ESD) can be improved by increasing capacitance. Here, the reverse voltage refers to the voltage measured at the semiconductor device when a low current in the reverse direction is applied to the semiconductor device. As the absolute value of the reverse voltage increases, the reliability of the semiconductor device increases. For example, the doping concentration of the first sub-layer 125a may be 2Х1018 cm-3 to 3Х1018 cm-3, and the doping concentration of the second sub-layer 125b may be 0.5Х1018 cm-3 to 1.5Х1018 cm-3, but must be It is not limited to this.

The second superlattice layer 126 may include third sub-layers 126a and fourth sub-layers 126b arranged alternately. The third sub-layer 126a may include InGaN, and the fourth sub-layer 126b may include AlGaN or GaN. The second superlattice layer 126 may serve to relieve stress of the active layer 130 and distribute current.

The fourth sub-semiconductor layer 127 may be disposed on the second superlattice layer 126. The fourth sub-semiconductor layer 127 may be doped with a first dopant. The first dopant may be an n-type dopant such as Si, Ge, Sn, Se, or Te. For example, the fourth sub-semiconductor layer 127 may be made of InGaN. In addition, the doping concentration of the first dopant in the fourth sub-semiconductor layer 127 is higher than that of the lower second superlattice layer 126, thereby increasing the movement speed of the first carriers. Accordingly, the fourth sub-semiconductor layer 127 can improve electron injection efficiency and light output by increasing the movement speed of the first carriers injected into the upper active layer 130.

The active layer 130 may be disposed between the first conductive semiconductor layer 120 and the second conductive semiconductor layer 150. The active layer 130 is a layer where electrons (or holes) injected through the first conductive semiconductor layer 120 and holes (or electrons) injected through the second conductive semiconductor layer 150 meet. The active layer 130 may transition to a low energy level and generate light as electrons and holes recombine.

According to an embodiment, the surface roughness is improved by the first superlattice layer 125 before the active layer 130 is grown, so the stress applied to the active layer 130 can be alleviated and light output can be improved.

The active layer 130 may include any one of a single well structure, a multi-well structure, a single quantum well structure, a multi quantum well (MQW) structure, a quantum dot structure, or a quantum wire structure, and the active layer 130 )'s structure is not limited to this. By way of example, the active layer may generate blue light in the 450nm wavelength range, but is not necessarily limited thereto.

The second conductive semiconductor layer 150 is formed on the active layer 130 and may be implemented with a compound semiconductor such as group III?-V, group II?-VI, etc., and is formed on the active layer 130. A second dopant may be doped. The second conductive semiconductor layer 150 is made of a semiconductor material with a composition formula of Inx5Aly2Ga1-x5-y2N (0=x5≤=1, 0≤=y2≤=1, 0≤=x5+y2≤=1) or AlInN, It can be formed from a material selected from AlGaAs, GaP, GaAs, GaAsP, and AlGaInP. When the second dopant is a p-type dopant such as Mg, Zn, Ca, Sr, Ba, etc., the second conductive semiconductor layer 150 doped with the second dopant may be a p-type semiconductor layer.

A blocking layer (not shown) may be disposed between the active layer 130 and the second conductive semiconductor layer 150. The blocking layer (not shown) blocks the flow of electrons supplied from the first conductive semiconductor layer 120 to the second conductive semiconductor layer 150, allowing electrons and holes to recombine within the active layer 130. You can increase your chances of doing it. The energy band gap of the blocking layer (not shown) may be larger than that of the active layer 130 and/or the second conductivity type semiconductor layer 150.

A blocking layer (not shown) may be disposed between the active layer 130 and the second conductive semiconductor layer 150. And the blocking layer (not shown) is a semiconductor material with a composition formula of Inx1Aly1Ga1-x1-y1N (0=x1≤=1, 0≤=y1≤=1, 0≤=x1+y1≤=1), for example. It may include AlGaN, InGaN, and InAlGaN.

More specifically, the blocking layer (not shown) may include a first sub-blocking layer and a second sub-blocking layer. The first sub-blocking layer may include AlN, and the second sub-blocking layer may include InGaN. Accordingly, the aluminum composition of the first sub-blocking layer may be greater than that of the second sub-blocking layer. With this configuration, the resistance of the first sub-blocking layer is relatively higher than that of the second sub-blocking layer, thereby improving current distribution.

Additionally, the first sub-blocking layer may have a thickness of 0.5 nm to 1.5 nm, and the second sub-blocking layer may have a thickness of 0.5 nm to 1.5 nm. That is, the thickness of the first sub-blocking layer and the second sub-blocking layer may be the same.

There may be a plurality of first sub-blocking layers and a plurality of second sub-blocking layers, and they may be arranged alternately. At this time, the thickness of the blocking layer (not shown) may be 4.5 nm to 8.5 nm. And the thickness of the above-described second conductive semiconductor layer 150 may be 40 nm to 50 nm. In an embodiment, the thickness of the blocking layer (not shown) and the thickness of the second conductivity type semiconductor layer 150 may be 1:4.7 to 1:11. With this configuration, hole injection efficiency can be improved by a tunnel effect through a blocking layer (not shown), thereby increasing light output.

The first electrode 161 and the second electrode 162 are made of indium tin oxide (ITO), indium zinc oxide (IZO), indium zinc tin oxide (IZTO), indium aluminum zinc oxide (IAZO), and indium gallium zinc oxide (IGZO). ), IGTO (indium gallium tin oxide), AZO (aluminum zinc oxide), ATO (antimony tin oxide), GZO (gallium zinc oxide), IZON (IZO Nitride), AGZO (Al-Ga ZnO), IGZO (In-Ga ZnO), ZnO, IrOx, RuOx, NiO, RuOx/ITO, Ni/IrOx/Au, or Ni/IrOx/Au/ITO, Ag, Ni, Cr, Ti, Al, Rh, Pd, Ir, Sn, In, It may be formed including at least one of Ru, Mg, Zn, Pt, Au, and Hf, but is not limited to these materials.

Figure 4a is SIMS (Secondary Ion Mass Spectroscopy) data of a semiconductor device according to an embodiment of the present invention, Figure 4b is an enlarged view of portion J in Figure 4a, and Figure 5 shows the secondary ion intensities of oxygen and aluminum. Figure 6 is a diagram showing the doping concentration of the first dopant, Figure 7 is an enlarged view of portion A in Figure 4, Figure 8 is a diagram showing the secondary ion intensity of indium in Figure 7, and Figure 9 is a diagram showing the doping concentration of the first dopant in FIG. 7.

First, the secondary ion strengths of indium (In), aluminum (Al), oxygen (O), and first dopant of the substrate, buffer layer, first conductive semiconductor layer, active layer, and second conductive semiconductor layer increase in the thickness direction. can change. Here, the thickness direction is the direction from the first conductivity type semiconductor layer to the second conductivity type semiconductor layer. And the first dopant (dopant 1) may be silicon (Si).

And SIMS data may be analysis data by Time-of-Flight Secondary Ion Mass Spectrometry (TOF-SIMS).

This SIMS data can be used to irradiate primary ions to the surface of a target and analyze the secondary ions released. At this time, the primary ion may be selected from O2+, Cs+ Bi+, etc. For example, the acceleration voltage may be adjusted within 1 keV to 30 keV, the irradiation current may be adjusted within 0.1 pA to 5.0 pA, and the irradiation area may be 30㎛Х30㎛, but is not necessarily limited thereto. In the example, the acceleration voltage is 2 keV, the irradiation current is 3 pA, and the irradiation area is 30 μmХ30 μm.

And SIMS data is collected by gradually etching the secondary ion mass spectrum from the surface of the second conductive semiconductor layer 150 (point at depth 0, SF) toward the first conductive semiconductor layer 120. You can. In other words, the SIMS data in the embodiment is the mass spectrum of secondary ions emitted from the above-described substrate, buffer layer, first conductivity type semiconductor layer, active layer, and second conductivity type semiconductor layer.

In addition, the results of SIMS analysis can be interpreted as a spectrum of the secondary ion strength or doping concentration of the material, which may include noise occurring within 0.9 times or more to 1.1 times in the interpretation of the secondary ion strength or doping concentration. You can. Accordingly, the description “equal to/identical to” may refer to noise that is 0.9 times or more to 1.1 times the intensity of a specific secondary ion or doping concentration.

In SIMS data, indium (In), aluminum (Al), and oxygen (O) can be calculated as spectral data for ionic strength, and the first dopant can be calculated as spectral data for doping concentration. That is, when referring to FIGS. 3 to 9, the first dopant may mean a unit of concentration (Atoms/cm3), and indium, aluminum, and oxygen may mean a unit of secondary ion strength (Counts/sec.) .

The method of calculating the doping concentration data of the first dopant is not particularly limited. Additionally, in this embodiment, the vertical axis (Y-axis) is converted to a logarithmic scale.

The ionic strength according to the embodiment may increase or decrease depending on measurement conditions. However, if the intensity of the primary ion increases, the intensity graph of the secondary ion (aluminum ion) may increase overall, and if the intensity of the primary ion decreases, the intensity graph of the secondary ion (aluminum ion) may decrease overall. Therefore, the change in ionic intensity in the thickness (depth) direction may be similar even if the measurement conditions are changed.

And hereinafter, the description of ionic strength or doping concentration is a description of the ion of the secondary ion. For example, the doping concentration of the first dopant means the concentration of the secondary ion of the first dopant, the ionic strength of aluminum means the strength of the aluminum secondary ion, and the ionic strength of oxygen means the ionic strength of the oxygen secondary ion. This means that the ionic strength of indium refers to the ionic strength of indium secondary ions.

Referring to FIGS. 4 to 6, the secondary ion intensity of oxygen may include the maximum oxygen intensity peak (O1) having the highest secondary ion intensity. This maximum oxygen intensity peak (O1) may be the point where the secondary ion intensity of oxygen is the highest within the semiconductor device. This maximum oxygen intensity peak (O1) may be a region within the substrate.

The secondary ionic strength of aluminum may include multiple ionic strength peaks. Specifically, the aluminum secondary ion intensity may include the first aluminum intensity peak (P1) closest to the maximum oxygen intensity peak (O1).

Additionally, the aluminum secondary ion intensity may include a second aluminum intensity peak (P2) spaced apart from the first aluminum intensity peak (P1) in the first direction (D1). Here, the first direction D1 may be a direction from the maximum oxygen intensity peak O1 to the first aluminum intensity peak P1.

And the aluminum secondary ion intensity may include a third aluminum intensity peak (P3) and a fourth aluminum intensity peak (P4) that are spaced apart from the second aluminum intensity peak (P2) in the first direction (D1). At this time, the fourth aluminum intensity peak (P4) may be spaced apart from the third aluminum intensity peak (P3) in the first direction (D1). Additionally, this first direction may be the same as the direction from the maximum oxygen intensity peak (O1) to the fourth aluminum intensity peak (P4), which is the maximum aluminum intensity peak. In addition, the first direction D1 may be a direction from the maximum oxygen intensity peak O1 to the first concentration peak S1 where the doping concentration of the first dopant is maximum. Additionally, the first direction may refer to the same direction as the above-described thickness direction, but may also mean the opposite direction depending on the structure of the semiconductor device. Here, the peak can be defined as a point having a local maximum point.

Specifically, the first aluminum intensity peak (P1) may be the peak closest to the maximum oxygen intensity peak (O1).

The second aluminum intensity peak (P2) may be spaced apart from the first aluminum intensity peak (P1) in the first direction (D1). That is, the first aluminum intensity peak (P1) may be located between the second aluminum intensity peak (P2) and the maximum oxygen intensity peak (O1).

The secondary ion intensity of the second aluminum intensity peak (P2) may be greater than the secondary ion intensity of the first aluminum intensity peak (P1).

The third aluminum intensity peak (P3) may be spaced apart from the second aluminum intensity peak (P2) in the first direction (D1). The third aluminum intensity peak (P3) may be the same as the second aluminum intensity peak (P2). By this configuration, the second aluminum intensity peak (P2) and the third aluminum intensity peak (P3) apply the same tensile stress in the first direction (D1), thereby preventing crystal deterioration through uniform stress. there is. This third aluminum intensity peak P3 may be located in one area within the third sub-semiconductor layer.

The fourth aluminum intensity peak P4 may be spaced apart from the third aluminum intensity peak P3 in the first direction D1. The aluminum secondary ion intensity at the fourth aluminum intensity peak (P4) may be greater than the aluminum secondary ion intensity at the first aluminum intensity peak (P1), the second aluminum intensity peak (P2), and the third aluminum intensity peak (P3). there is. For example, the fourth aluminum intensity peak P4 may have the maximum aluminum secondary ion intensity within the semiconductor device. This fourth aluminum intensity peak (P4) may be located in one area of the second conductivity type semiconductor layer, and will be described later.

And in embodiments, the aluminum secondary ionic strength may include a plurality of distinct regions. First, the aluminum secondary ionic strength will include the first sub-region (L1), the second sub-region (L2), the third sub-region (L3), the fourth sub-region (L4) and the fifth sub-region (L5). You can.

First, the first sub-region L1 may include the first aluminum intensity peak P1. This first sub-region (L1) may have an aluminum secondary ion intensity similar to the first aluminum intensity peak (P1). Specifically, the aluminum secondary ion intensity in the first sub-region (L1) may have an ion intensity within 25% of the first aluminum intensity peak (P1). This first sub-area L1 may be an area corresponding to the buffer layer.

Additionally, the second sub-region L2 may be spaced apart from the first sub-region L1 in the first direction D1 and may include a second aluminum intensity peak P2. The second sub-region L2 may have an aluminum ion intensity similar to the second aluminum intensity peak. Specifically, the aluminum secondary ion intensity in the second sub-region (L2) may have an ion intensity within 10% of the second aluminum intensity peak (P2). This second sub-region L2 may be an area corresponding to the second sub-semiconductor layer.

The third sub-area L3 may be located between the first sub-area L1 and the second sub-area L2. The aluminum secondary ion intensity of the third sub-region L3 may be lower than the aluminum secondary ion intensity at the second aluminum intensity peak (P2) and the aluminum secondary ion intensity at the first aluminum intensity peak (P1). This third sub-region (L3) may be a region where the aluminum secondary ion intensity is 0.01 times or less compared to the aluminum secondary ion intensity at the second aluminum intensity peak (P2) and the aluminum ion intensity at the first aluminum intensity peak (P1). there is.

Specifically, the intensity ratio of the aluminum secondary ion intensity in the third sub-region L3 to the aluminum secondary ion intensity at the second aluminum intensity peak P2 may be less than 1:100. Additionally, the aluminum secondary ion intensity in the third sub-region L3 may be less than the intensity ratio of the aluminum ion intensity at the first aluminum intensity peak P1 of 1:100.

With this configuration, the stress of the first aluminum intensity peak P1 is not maintained in the first direction D1 in the lower region of the semiconductor device adjacent to the substrate, thereby reducing the occurrence of dislocations in the semiconductor layer.

The fourth sub-region L4 may be spaced apart from the third sub-region L3 in the first direction D1 and may include a third aluminum intensity peak P3. The fourth sub-region L4 may have an aluminum secondary ion intensity similar to the third aluminum intensity peak P3. Specifically, the aluminum secondary ion intensity in the fourth sub-region L4 may be within 10% of the aluminum secondary ion intensity of the third aluminum intensity peak P3. This fourth sub-region L4 may correspond to the 3-2 sub-semiconductor layer.

The fifth sub-area L5 may be located between the third sub-area L3 and the fourth sub-area L4. In the fifth sub-region L5, the aluminum secondary ion intensity may be lower than the aluminum secondary ion intensity at the second aluminum intensity peak (P2) and the aluminum secondary ion intensity at the third aluminum intensity peak (P1). And the fifth sub-region L5 may correspond to the 3-1 sub-semiconductor layer.

This fifth sub-region (L5) is a region where the aluminum secondary ion intensity is 0.01 times or less compared to the aluminum secondary ion intensity at the second aluminum intensity peak (P2) and the aluminum secondary ion intensity at the third aluminum intensity peak (P3). You can. Accordingly, the aluminum secondary ion intensity of the fifth sub-region L5 is lower than the second aluminum intensity peak (P2) and the third aluminum intensity peak (P3), thereby reducing the dislocation density, and bowing ( It is possible to prevent cracks from occurring due to bowing.

According to an embodiment, the first conductive semiconductor layer 120 may include a first region disposed between the third aluminum intensity peak (P3) and the maximum oxygen intensity peak (O1). This first area may include the above-described first sub-area L1, second sub-area L3, third sub-area L3, and fifth sub-area L5. More specifically, the above-described first sub-semiconductor layer 122 may include a third sub-region L3. And, as described above, the second sub-semiconductor layer 123 may include a second sub-region L2 including the second aluminum peak P2. And among the third sub-semiconductor layers 124, the 3-1 sub-semiconductor layer 124a includes the fifth sub-region L5, and the 3-2 sub-semiconductor layer 124b includes the third aluminum intensity peak (P3). ) may include a fourth sub-area (L4) including. And the insulating layer 121 disposed below the first sub-semiconductor layer 122 is the first conductive semiconductor layer 120, the active layer 130, and the second conductive semiconductor layer 150, as will be described later. It may include a fourth region located between the first concentration peak where dopant secondary ions are highest and the second aluminum intensity peak.

And the second conductive semiconductor layer 150 may include a second region spaced apart from the fourth aluminum intensity peak P4 in the first direction D1 (see FIG. 7). And the active layer 130 may include a third region disposed between the third aluminum intensity peak (P3) and the fourth aluminum intensity peak (P4). At this time, the above-described first region may include Mg, and the third region may include Si, which is the first dopant.

The doping concentration of the first dopant may include a first concentration peak (S1), a second concentration peak (S2), a third concentration peak (S3), and a fourth concentration peak (S4) depending on the level of the doping concentration.

The first concentration peak (S1) may be a point where the doping concentration of the first dopant is the highest within the semiconductor device (among the semiconductor layers). The first concentration peak (S1) may be located between the above-described first aluminum intensity peak (P1) and the second aluminum intensity peak (P2). In other words, it may be located within the third sub-area L3. And the thickness difference (d1) between the first concentration peak (S1) and the first aluminum intensity peak (P1) has a ratio of the thickness difference (d2) between the first concentration peak (S1) and the second aluminum intensity peak (P2) of 1: It may be 50 to 1:130. When the ratio of the thickness difference is less than 1:50, the thickness having a doping concentration similar to the first concentration peak (S1) increases, and low-current defects due to current leakage increase and the light output decreases. exist. And when the ratio of the thickness difference is greater than 1:130, the thickness of the region with a low aluminum concentration compared to the first aluminum intensity peak and the second aluminum intensity peak increases, and the thickness with a doping concentration similar to the first concentration peak (S10) increases. As the stress caused by the first aluminum intensity peak (P1) cannot be easily removed due to the compressive stress, the bending phenomenon due to the stress increases during the growth of the upper semiconductor layer, resulting in cracks and a decrease in light output. .

The second concentration peak S2 may be a point where the doping concentration of the first dopant is the highest in a region spaced apart from the first concentration peak S1 in the first direction D1. And the doping concentration of the first dopant of the second concentration peak (S2) may be lower than the doping concentration of the first dopant of the first concentration peak (S1).

And the third concentration peak (S3) is located between the first concentration peak (S1) and the second concentration peak (S2), and the concentration of the first dopant in the region between the first concentration peak (S1) and the second concentration peak (S2) This may be the point where the doping concentration is highest. The doping concentration of the first dopant of the third concentration peak (S3) may be lower than the doping concentration of the first dopant of the second concentration peak (S4).

The fourth concentration peak (S4) may be a point where the doping concentration of the first dopant is the highest in a region spaced apart from the second concentration peak (S2) in the first direction (D1). This fourth concentration peak (S4) may be located in an area adjacent to the active layer within the first conductive semiconductor layer. That is, the fourth concentration peak (S4) is located to correspond to one region of the fourth sub-semiconductor layer, and thus, the fourth concentration peak (S4) is positioned to increase the movement speed of the first carrier. ) may have the highest doping concentration of the first dopant in a region spaced apart from the first direction D1. Accordingly, electron injection efficiency can be improved and light output can be improved.

At this time, the doping concentration of the first dopant may include a first concentration region (R1) and a second concentration region (R2). The first concentration region R1 may include a third concentration peak S3, and the second concentration region R2 may include a second concentration peak S2.

First, the first concentration region R1 may correspond to the above-described fifth sub-region L5. Additionally, the first concentration region R1 can maintain a relatively uniform doping concentration of the first dopant of the second concentration peak S2. As an example, the doping concentration of the first dopant in the first concentration region (R1) may be within 10% of the doping concentration of the first dopant in the second concentration peak (S2). With this configuration, the concentration of the first carrier can be uniformly injected into the active layer.

The second concentration region (R2) is disposed spaced apart from the first concentration region (R1) and moves from the first concentration peak (S1) to the second concentration peak (S2) in the first direction (D1) and/or the second direction (D2). It may include a plurality of sections in which the doping concentration of the first dopant increases and decreases. Here, the second direction D2 may be opposite to the first direction D1. For example, the second direction D2 may be a direction from the first aluminum intensity peak to the maximum oxygen intensity peak. And there can be multiple high and low points at the point where the increasing section and decreasing section meet. At this time, the high point (S21) and the low point (S22) of the doping concentration of the first dopant may be formed at a doping concentration within 10% error based on the doping concentration of the first dopant of the second concentration peak (S2). And The second concentration region R2 may have a relatively uniform doping concentration of the first dopant and may correspond to the fourth sub-region L4 including the third aluminum intensity peak P3 described above. That is, the fourth sub-region L4 includes the third aluminum intensity peak P3. 2 The concentration region R2 may have a high energy band gap by increasing the intensity of the aluminum secondary ion. As a result, the second concentration region R2 prevents the light generated in the active layer from being absorbed in the first concentration region R1. Light extraction efficiency can be improved by allowing the first carriers to be easily injected through electrolysis. In addition, the occurrence of cracks due to stress can be easily prevented by uniformly maintaining a high concentration of the first carriers.

Referring to FIGS. 7 to 9 , the indium secondary ion intensity may include a first indium intensity peak (N2). And the indium secondary ion intensity may further include a plurality of second indium intensity peaks (N11) and a third indium intensity peak (N3) spaced apart in the second direction (D2) based on the first indium intensity peak (N2). You can.

At this time, the first indium intensity peak (N2) and the third indium intensity peak (N3) may have higher ionic strengths than the second indium intensity peak (N11). Also, the first indium intensity peak (N2) may have a higher ionic intensity than the third indium intensity peak (N3). This first indium intensity peak (N2) is the point where the indium secondary ion intensity is maximum within the semiconductor layer of the semiconductor device and may be the maximum indium intensity peak. Additionally, the third indium intensity peak N3 may be the highest indium ion peak in a region spaced apart from the maximum indium intensity peak (first indium intensity peak N2) in the second direction D2. Additionally, the second indium intensity peak N11 may be the highest indium ion peak in a region spaced apart from the third indium intensity peak N3 in the second direction, and may be plural. At this time, a plurality of second indium intensity peaks N11 may correspond to the above-described first sub-layer 125a.

And the doping concentration of the first dopant may further include a fifth concentration peak (S51) and a sixth concentration peak (S61).

First, the fourth concentration peak (S4) may be the point where the doping concentration of the first dopant is maximum. And the sixth concentration peak (S61) is the point having the highest doping concentration of the first dopant in the region between the fourth concentration peak (S4) and the third concentration peak (S3), and the fifth concentration peak (S51) is the point having the highest doping concentration of the first dopant. The area between the 6 concentration peak (S61) and the third concentration peak (S3) may be a point having the highest doping concentration of the first dopant.

That is, the fourth concentration peak (S4) and the sixth concentration peak (S61) have a higher doping concentration of the first dopant than the fifth concentration peak (S51), and the fourth concentration peak (S4) has a higher doping concentration than the sixth concentration peak (S61). ) The doping concentration of the first dopant may be greater than ).

Specifically, the second indium intensity peak N11 may correspond to the first sub-layer as described above. Accordingly, there may be a plurality of second indium intensity peaks N11 depending on the number of first sub-layers in the first superlattice layer 125. In addition, in the doping concentration of the first dopant, a plurality of fifth concentration peaks (S51) correspond to a plurality of first sub-layers, and a plurality of second indium intensity peaks (N11) are formed between the plurality of second indium intensity peaks (N11). ) can be placed.

Additionally, the indium secondary ion strength may have a plurality of first valleys N12. Additionally, the doping concentration of the first dopant may also include a plurality of second valleys S52. At this time, the first valley N12 may have a section whose intensity increases in the first direction D1.

At least a portion of the second indium intensity peak N11 and the fifth concentration peak S51 may be located at the same location. Likewise, at least a portion of the first valley N12 and the second valley S52 may be disposed at the same location.

Additionally, the fifth concentration peak (S51) may be disposed at the same thickness (depth) as the second indium intensity peak (N11). The second indium intensity peak N11 may be alternately disposed with the first valley N12, and the fifth concentration peak S51 may be alternately disposed with the second valley S52. At this time, the first valley N12 and the second valley S52 may be disposed at the same thickness (depth).

And the fifth concentration peak (S51) may have a higher doping concentration than the second valley (S52). According to this configuration, the relatively thin first sub-layer is intensively doped with the first dopant, thereby preventing the reverse voltage level from dropping excessively and improving ESD.

That is, the indium secondary ion intensity emitted from the plurality of first sub-layers has a plurality of second indium intensity peaks N11, and the doping concentration of the first dopant emitted from the plurality of first sub-layers has a plurality of fifth indium intensity peaks (N11). It has a concentration peak (S51), and the plurality of second indium intensity peaks (N11) and the plurality of fifth concentration peaks (S51) are disposed between the third indium intensity peak (N3) and the fourth concentration peak (S4). You can.

And the third indium intensity peak N3 may be located within the second superlattice layer 126. That is, the indium secondary ion intensity in the second superlattice layer 126 may include a third indium intensity peak (N3). In particular, there may be a plurality of third indium intensity peaks N3, and the number of third indium intensity peaks N3 may be equal to the number of third sub-layers 126a of the second superlattice layer 126.

Additionally, the indium secondary ion intensity in the active layer 130 may include a first indium intensity peak (N2). Additionally, there may be a plurality of first indium intensity peaks N2, and the number of first indium intensity peaks N2 may be equal to the number of well layers in the active layer 130.

The fourth concentration peak (S4) may be located in the area closest to the active layer 130 in the first conductive semiconductor layer 120. Specifically, the fourth concentration peak (S4) may be disposed between the first indium intensity peak (N2) and the third indium intensity peak (N3). The fourth concentration peak S4 may have a relatively higher doping concentration of the first dopant than other adjacent regions in order to increase the movement speed of the first carrier. Accordingly, the movement speed of the first carriers injected into the active layer 130 increases, thereby improving electron injection efficiency and improving light output.

Additionally, a third valley (S62) may be located between the fourth concentration peak (S4) and the sixth concentration peak (S61). The third valley S62 may have a lower doping concentration of the first dopant than the fourth concentration peak S4 and the sixth concentration peak S61. This third valley (S62) may be placed at the same location as the third indium intensity peak (N3). As a result, the third indium intensity peak (N3) is located between the sixth concentration peak (S61) and the fourth concentration peak (S4), thereby relieving the stress of the active layer in the second superlattice layer and facilitating current distribution. .

And the doping concentration of the first dopant may further include a third concentration region (R3) and a fourth concentration region (R4).

As described above, the first concentration region R1 may include the third concentration peak S3, and the second concentration region R2 may include the second concentration peak S2.

And the third concentration region (R3) may include a fifth concentration peak (S51) and a second valley (S52). The third concentration region R3 may include a plurality of sections in which the doping concentration of the first dopant increases and decreases in the first direction D1 and/or the second direction D2, with an increasing section and a decreasing section. The above-described fifth concentration peak (S51) and second valley (S52) may be located at the point where the sections meet.

The third concentration region R3 may be spaced apart from the second sub-region R2 in the first direction D1, and may have a plurality of sections in which the indium secondary ion intensity increases and decreases along the first direction D1. It includes a plurality of sections, and the plurality of increasing sections and the plurality of decreasing sections can each be in contact with each other. Accordingly, in the third concentration region R3, the indium secondary ion intensity may include a plurality of peaks N11 and valleys N12 as described above. Here, as described above, the plurality of peaks N11 refers to the second indium intensity peak N11, and the valley N12 refers to the first valley N12.

In addition, the first dopant doping concentration of the third concentration region R3 may include a plurality of increasing sections and a plurality of decreasing sections along the first direction D1, and a plurality of increasing sections and decreasing sections. Each of the sections can be in contact with each other. Accordingly, the doping concentration of the first dopant may include a plurality of peaks S51 and valleys S12 in the third concentration region R3. Here, the plurality of peaks correspond to the above-described fifth concentration peak (S51), and the valley corresponds to the second valley (S52).

In addition, the high point of the doping concentration of the first dopant in the third concentration region (R3) may be located between a section where the indium secondary ion intensity of the third concentration region (R3) increases and a section where it decreases along the first direction. there is.

The plurality of peaks N11 of indium secondary ion intensity in the third concentration region R3 may include relatively uniform ion intensity within 10%. Accordingly, it is possible to relieve stress occurring due to a difference between the lattice constant of the substrate and/or the first sub-region R1 and the lattice constant of the active layer.

A fourth concentration region R4 may be disposed between the first indium intensity peak N2 and the third concentration region R3. The fourth concentration region R4 may include a plurality of sections in which the indium secondary ion intensity decreases and a plurality of sections in which the indium secondary ion intensity increases along the first direction, and a plurality of sections in which the indium secondary ion intensity increases. Each section may include a peak point including a high point and/or a low point in an adjacent area.

The low point of the fourth concentration region R4 may be higher than the high point of the third concentration region R3 and may be lower than the first indium intensity peak N2 in the active layer. Accordingly, it is possible to relieve stress caused by a difference in lattice constant between the substrate and the active layer and/or between the active layer and the third concentration region R3.

In addition, in the fourth concentration region (R4), the interval between the high and low points of the indium secondary ion intensity adjacent to each other may be narrower than the interval between the high and low points of the indium secondary ion intensity adjacent to each other in the third concentration region (R3). there is. Accordingly, dislocations extending from the third concentration region R3 to the active layer can be reduced, and the crystal quality of the active layer can be improved to improve the optical output and electrical characteristics of the light emitting device.

Additionally, the fourth concentration region R4 may include a section where the indium secondary ion intensity is lowered in an area adjacent to the active layer 130. Accordingly, the stress occurring between the substrate and the active layer can be alleviated and the dislocation can be improved. Here, lowering the indium secondary ion intensity may mean that the indium secondary ion intensity at a plurality of high points and/or low points is gradually lowered, and may include a gradual lowering.

10 is a conceptual diagram of a semiconductor device package according to an embodiment of the present invention.

Referring to FIG. 10, the semiconductor device package includes a body 2 in which a groove 3 is formed, a semiconductor device 10 disposed in the body 2, and a semiconductor device 10 disposed in the body 2 and electrically connected to the semiconductor device 10. It may include a pair of lead frames 5a and 5b that are connected. The semiconductor device 10 may include all of the above-described configurations.

The body 2 may include a material or coating layer that reflects ultraviolet light. The body 2 can be formed by stacking a plurality of layers 2a, 2b, 2c, 2d, and 2e. The plurality of layers 2a, 2b, 2c, 2d, and 2e may be made of the same material or may include different materials.

The groove 3 becomes wider as it moves away from the semiconductor device, and a step 3a may be formed on the inclined surface.

The semiconductor device 10 may be placed on the first lead frame 5a and connected to the second lead frame 5b by a wire. At this time, the first lead frame 5a and the second lead frame 5b may be arranged to surround the side surface of the semiconductor device 10.

The light-transmitting layer 4 may cover the groove 3. The light transmitting layer 4 may be made of glass, but is not necessarily limited thereto. The light transmitting layer 4 is not particularly limited as long as it is made of a material that can effectively transmit ultraviolet light. The interior of the groove 3 may be empty space.

Semiconductor devices can be applied to various types of light source devices. For example, a light source device may be a concept that includes a lighting device, a display device, and a vehicle lamp. In other words, the semiconductor device can be applied to various electronic devices that are placed in a case and provide light.

The lighting device may include a light source module including a substrate and the semiconductor device of the embodiment, a heat dissipation unit that dissipates heat from the light source module, and a power supply unit that processes or converts an electrical signal provided from the outside and provides it to the light source module. Additionally, the lighting device may include a lamp, head lamp, or street lamp.

The display device may include a bottom cover, a reflector, a light emitting module, a light guide plate, an optical sheet, a display panel, an image signal output circuit, and a color filter. The bottom cover, reflector, light emitting module, light guide plate, and optical sheet may constitute a backlight unit.

The reflector is disposed on the bottom cover, and the light emitting module can emit light. The light guide plate is disposed in front of the reflector and guides the light emitted from the light emitting module to the front, and the optical sheet includes a prism sheet, etc. and may be disposed in front of the light guide plate. A display panel may be disposed in front of the optical sheet, an image signal output circuit may supply an image signal to the display panel, and a color filter may be disposed in front of the display panel.

When used as a backlight unit of a display device, a semiconductor device can be used as an edge-type backlight unit or a direct-type backlight unit.

The semiconductor device may be a laser diode in addition to the light emitting diode described above.

The laser diode, like the light emitting device, may include a first conductive semiconductor layer 120, an active layer 130, a second conductive semiconductor layer 150, and a blocking layer (not shown) of the above-described structure. there is. In addition, the electro-luminescence phenomenon, in which light is emitted when a p-type first conductivity type semiconductor and an n-type second conductivity type semiconductor are bonded and an electric current flows, is used, but the directionality of the emitted light is different. There is a difference in phase. In other words, a laser diode can emit light with one specific wavelength (monochromatic beam) with the same phase and in the same direction by using a phenomenon called stimulated emission and constructive interference. Therefore, it can be used in optical communications, medical equipment, and semiconductor processing equipment.

An example of a light receiving element is a photodetector, which is a type of transducer that detects light and converts the intensity into an electrical signal. Such photodetectors include photocells (silicon, selenium), light output devices (cadmium sulfide, cadmium selenide), photodiodes (e.g., PDs with a peak wavelength in the visible blind spectral region or true blind spectral region), and photovoltaic devices (PDs). Examples include transistors, photomultiplier tubes, photoelectron tubes (vacuum, gas-encapsulated), IR (Infra-Red) detectors, etc., but embodiments are not limited thereto.

Additionally, semiconductor devices such as photodetectors can generally be manufactured using direct bandgap semiconductors, which have excellent light conversion efficiency. Alternatively, photodetectors have various structures, and the most common structures include a pin-type photodetector using a p-n junction, a Schottky-type photodetector using a Schottky junction, and a MSM (Metal Semiconductor Metal) type photodetector. there is.

A photodiode, like a light emitting device, may include a first conductivity type semiconductor layer, an active layer, a blocking layer, and a second conductivity type semiconductor layer of the structure described above, and may have a pn junction or pin structure. The photodiode operates by applying a reverse bias or zero bias, and when light is incident on the photodiode, electrons and holes are created and a current flows. At this time, the size of the current may be approximately proportional to the intensity of light incident on the photodiode.

A photovoltaic cell, or solar cell, is a type of photodiode that can convert light into electric current. The solar cell, like the light emitting device, may include a first conductivity type semiconductor layer, an active layer, a blocking layer, and a second conductivity type semiconductor layer having the above-described structure.

In addition, it can be used as a rectifier in electronic circuits through the rectification characteristics of a general diode using a p-n junction, and can be applied to ultra-high frequency circuits and oscillator circuits.

In addition, the above-described semiconductor device is not necessarily implemented only as a semiconductor and may further include a metal material in some cases. For example, a semiconductor device such as a light receiving device may be implemented using at least one of Ag, Al, Au, In, Ga, N, Zn, Se, P, or As, and may be implemented using a p-type or n-type dopant. It may also be implemented using doped semiconductor materials or intrinsic semiconductor materials.

Although the above description focuses on the examples, this is only an example and does not limit the present invention, and those skilled in the art will be able to You will see that various variations and applications are possible. For example, each component specifically shown in the examples can be modified and implemented. And these variations and differences in application should be construed as being included in the scope of the present invention as defined in the appended claims.

Claims (15)

Board;
a first conductive semiconductor layer disposed on the substrate and including an insulating layer;
an active layer disposed on the first conductive semiconductor layer; and
It includes a second conductive semiconductor layer disposed on the active layer,
The substrate, the first conductive semiconductor layer, the active layer, and the second conductive semiconductor layer emit secondary ions when primary ions are applied,
The secondary ions include aluminum, a first dopant, and oxygen,
The ionic strength of the oxygen secondary ion includes the maximum oxygen intensity peak with the largest ionic strength,
The aluminum secondary ion intensity includes a plurality of peaks greater than the intensity of the oxygen secondary ion,
The plurality of peaks of aluminum secondary ion intensity include a first aluminum intensity peak closest to the maximum oxygen intensity peak, a second aluminum intensity peak spaced apart from the first aluminum intensity peak in a first direction; a third aluminum intensity peak spaced apart from the second aluminum intensity peak in the first direction; And a fourth aluminum intensity peak spaced apart from the third aluminum intensity peak in the first direction,
The first direction is a direction from the maximum oxygen intensity peak to the first aluminum intensity peak,
The first conductive semiconductor layer includes a first region disposed between the third aluminum intensity peak and the maximum oxygen intensity peak,
The second conductive semiconductor layer includes a second region spaced apart from the fourth aluminum intensity peak in the first direction,
the active layer includes a third region between the third aluminum intensity peak and the fourth aluminum intensity peak,
The first dopant secondary ion includes a first concentration peak having the highest concentration in the first conductivity type semiconductor layer, the active layer, and the second conductivity type semiconductor layer,
The first concentration peak is located in a region between the first aluminum intensity peak and the second aluminum intensity peak,
The semiconductor device wherein the insulating layer includes a fourth region located between the first concentration peak and the second aluminum intensity peak.
According to paragraph 1,
The aluminum secondary ion intensity includes a first sub-region including the first aluminum intensity peak; a second sub-region spaced apart from the first sub-region in a first direction and including the first aluminum intensity peak; and a third sub-area disposed between the second sub-area and the first sub-area,
The third sub-region is a semiconductor device in which the aluminum secondary ion intensity and the intensity ratio of the aluminum secondary ion intensities of the first aluminum intensity peak and the second aluminum intensity peak are 1:100 or less.
According to paragraph 2,
The semiconductor device wherein the aluminum secondary ion intensity of the first sub-region is 75% to 100% of the aluminum secondary ion intensity of the first aluminum intensity peak.
According to paragraph 2,
The aluminum secondary ion intensity of the second sub-region is 90% to 100% of the aluminum secondary ion intensity of the second aluminum intensity peak.
According to paragraph 2,
The aluminum secondary ion intensity includes a third aluminum intensity peak spaced apart from the second aluminum intensity peak in the first direction; And a fourth aluminum intensity peak disposed spaced apart from the third aluminum intensity peak in the first direction,
A semiconductor device in which the aluminum secondary ion intensity of the third aluminum intensity peak is smaller than the aluminum secondary ion intensity of the fourth aluminum intensity peak.
According to clause 5,
A semiconductor device wherein the fourth aluminum intensity peak is the maximum aluminum intensity peak.
According to clause 5,
A semiconductor device in which the second aluminum intensity peak has an aluminum secondary ion intensity equal to the aluminum secondary ion intensity of the third aluminum intensity peak.
According to clause 5,
The aluminum secondary ion intensity may include a fourth sub-region spaced apart from the third sub-region in the first direction and including the third aluminum intensity peak; and a fifth sub-area disposed between the third sub-area and the fourth sub-area,
The fifth sub-region is a semiconductor device wherein the aluminum secondary ion intensity and the intensity ratio of the aluminum secondary ion intensities of the second aluminum intensity peak and the third aluminum intensity peak are 1:0.01 or less.
According to paragraph 1,
A semiconductor device wherein the thickness difference between the first concentration peak and the first aluminum intensity peak is a ratio of the thickness difference between the first concentration peak and the second aluminum intensity peak of 1:50 to 1:130.
According to paragraph 1,
The first dopant secondary ion has a second concentration peak having a maximum doping concentration in a region spaced apart from the first concentration peak in the first direction; a third concentration peak having a maximum doping concentration between the second concentration peak and the first concentration peak; The semiconductor device further includes a fourth concentration peak having a maximum doping concentration in a region spaced apart from the second concentration peak in the first direction.
According to clause 10,
A semiconductor device wherein the doping concentration of the third concentration peak is smaller than the doping concentration of the second concentration peak.
According to clause 10,
The secondary ion further includes indium,
The indium secondary ion intensity includes a first indium intensity peak with an intensity maximum,
The fourth concentration peak is spaced apart from the first indium intensity peak in a second direction,
The second direction is opposite to the first direction.
According to clause 12,
The semiconductor device wherein the aluminum secondary ion intensity, the oxygen secondary ion intensity, the first dopant secondary ion intensity, and the indium secondary ion intensity are spectra measured by TOF-SIMS.
According to clause 13,
The primary ions include O2+, Cs+, and Bi+,
The TOF-SIMS measurement conditions for a semiconductor device include an acceleration voltage of 2 keV and an irradiation current of 3 pA.
According to paragraph 1,
Further comprising a buffer layer disposed between the substrate and the first conductive semiconductor layer,
The substrate contains oxygen atoms,
The first conductive semiconductor layer and the buffer layer include Al element,
A semiconductor device wherein the insulating layer includes Si element.

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