WO2024171357A1 - Optical circuit - Google Patents

Abstract

The purpose of the present invention is to provide an optical circuit capable of suppressing decreases in production yield that are caused by the adhesion of a by-product having a low vapor pressure.　An optical circuit (200) according to the present disclosure is a waveguide-type optical circuit in which etching for forming a core is performed in the manufacturing process thereof, the circuit comprising a dummy waveguide (204a, 204b) that is formed on the same plane as the core (203a, 203b) and so as to be adjacent to the side surfaces of the core relative to the optical axis direction, and is composed of the same material as the core. The width of the dummy waveguide (204a, 204b) in a direction orthogonal to the optical axis direction in the same plane may be set to be different from the width of the core (203a, 203b) in a direction orthogonal to the optical axis direction in the same plane.

Description

Optical Circuit

This disclosure relates to optical circuits, and more specifically to waveguide-type optical circuits that require etching during the manufacturing process.

As a circuit element for multiplexing the three primary colors of visible light applied to glasses-type terminals, projectors, etc., an RGB coupler module using a quartz-based planar lightwave circuit (hereinafter referred to as PLC) has been attracting attention (see, for example, Non-Patent Document 1). In conventional quartz-based PLCs, silica (SiO ₂ ) doped with germanium (Ge) is usually used for the core. However, it is generally known that Ge-doped SiO ₂ has a characteristic that the refractive index is easily changed by the incidence of light in the ultraviolet to visible light bands. For this reason, conventional quartz-based PLCs for the visible light band have limited input light intensity and wavelength band.

On the other hand, in recent years, it has been reported that a quartz-based PLC using _SiO2 doped with zirconium (Zr) as the core (hereinafter referred to as Zr-core PLC) may be able to handle visible light with shorter wavelengths or higher light intensity (see, for example, Non-Patent Document 2), and the realization of a Zr-core PLC for the visible light band is expected. However, Zr-doped _SiO2 is known to be a difficult-to-etch material that is difficult to dry etch, such as reactive ion etching (see, for example, Non-Patent Document 3), and there is a problem that the manufacturability (yield, etc.) of the quartz-based PLC is low.

In general, a quartz-based PLC is manufactured by forming a core on a flat substrate such as Si by patterning using photolithography or etching using reactive ion etching, and then burying the core with a cladding having a lower refractive index than the core. In such a manufacturing process, when the core is made of Zr-doped _SiO2 , by-products (fluorides, etc.) with low vapor pressure generated during the above etching adhere to the sides of the core and the etching mask, resulting in a decrease in the dimensional accuracy of the core and variation in shape, and as a result, it is known that the manufacturing yield of Zr-core PLCs decreases.

1 is a diagram showing a schematic diagram of a state in which the width of the core 103 changes due to a by-product 106 during etching for forming the core 103 in the manufacturing process of the Zr-core PLC, where (a) shows the state in which the by-product 106 is generated immediately after the start of etching, and (b) shows the state in which the width of the core 103 changes due to the adhesion of the by-product 106. In addition, in FIG. 1, an underclad 102 is formed on a substrate 101, a core 103 which is Zr-doped SiO ₂ is formed on the underclad 102, and an etching mask 104 is formed on the core 103, and an ion beam 105 is irradiated from above in the z direction to etch (pattern) the core 103 into a desired shape. As shown in FIG. 1, during etching for forming the core 103 in the manufacturing process of the Zr-core PLC, a by-product 106 with a low vapor pressure (difficult to vaporize) is generated by the etching. The by-products 106 adhere to the side surfaces of the core 103 and the etching mask 104, increasing the effective width of the etching mask 104 and causing variation in the shape of the core 103. In addition, the amount of the by-products 106 produced varies depending on the in-plane distribution of the etching rate and the position in the chamber where etching is performed, so that the circuit characteristics of the manufactured optical circuit also vary within the wafer surface.

Due to these manufacturing issues, Zr-core PLCs for visible light have not yet been put to practical use.

A. Nakao, et al. , “Integrated waveguide-type red-green-blue beam combiners for compact projection-type displays”, Optics Communications 330, pp 45-48 (2014) Y. Fujiwara, et al. , “Silica-based planar lightwave circuits with high resistance against blue light for visible-light application”, Jpn. J. Appl. Phys. 61, SK1021 (2022) Tomohiro Kitagawa et al., "Dry Etching Gases for High Dielectric Materials," Taiyo Nippon Sanso Technical Report, No. 24 (2005)

This disclosure was made in consideration of the above-mentioned problems, and its purpose is to provide an optical circuit that can suppress the decrease in manufacturing yield caused by by-products.

In response to the above-mentioned problems, the present disclosure provides a waveguide-type optical circuit in which etching is performed to form a core during the manufacturing process, and which includes a dummy waveguide that is formed on the same plane as the core and adjacent to the side of the core in the optical axis direction, and is made of the same material as the core.

1A and 1B are schematic diagrams showing how the width of core 103 changes due to by-products 106 during etching to form core 103 in the manufacturing process of a Zr-core PLC, in which (a) shows the state in which by-products 106 are generated immediately after etching begins, and (b) shows the state in which the width of core 103 changes due to the adhesion of by-products 106. 1A and 1B are diagrams conceptually illustrating a structure of an optical circuit 200 according to a first embodiment of the present disclosure, in which (a) is a top view and (b) is a cross-sectional view taken along the line IIb-IIb. 1A and 1B are schematic diagrams showing the appearance of by-product adhesion during etching for forming cores 203 a, b of an optical circuit 200 according to a first embodiment of the present disclosure, in which (a) shows the appearance of by-product 106 generated immediately after etching begins, and (b) shows the appearance after by-product 106 has adhered. This figure shows the results of a comparative evaluation of the optical transmittance of each of the directional couplers 402a-402f arranged on the main surface (the surface on which the chip is placed) of the wafer 401, with and without dummy waveguides 204a, b, where (a) is a top view of the wafer 401 that shows the positions at which the directional couplers 402a-402f are arranged, and (b) shows the optical transmittance of each of the directional couplers 402a-402f. 1 is a top view conceptually illustrating a structure of an optical circuit 500 according to a first embodiment of the present disclosure. 11 is a diagram showing the relationship between the gap width between a core 203a and a dummy waveguide 204a and the angle of the formed side surface of the core 203a. FIG. 2 is a diagram showing the relationship between the gap width between a core 203a and a dummy waveguide 204a and the optical transmittance in the optical circuit 200 according to the present disclosure. FIG. FIG. 8 is a top view conceptually illustrating the structure of an optical circuit 800 according to a second embodiment of the present disclosure. 1 is a diagram illustrating a transmission spectrum of the optical circuit 800. FIG. FIG. 11 is a top view illustrating a schematic structure of a multiplexer 1000 according to a third embodiment of the present disclosure.

Various embodiments of the present disclosure will be described in detail below with reference to the drawings. The same or similar reference symbols indicate the same or similar elements, and duplicate descriptions may be omitted. Materials and numerical values are for illustrative purposes and are not intended to limit the technical scope of the present disclosure. The following description is an example, and some configurations may be omitted or modified, or additional configurations may be added, as long as they do not deviate from the gist of an embodiment of the present disclosure.

The optical circuit according to the present disclosure includes a dummy waveguide for suppressing adhesion of by-products to the sides of the core and the etching mask formed on the core during etching to form the core described above. With this configuration, in the etching to form the core in the manufacturing process of the optical circuit according to the present disclosure, many of the by-products with low vapor pressure generated by the etching adhere to the dummy waveguide and the sides of the etching mask formed on the dummy waveguide. This reduces the amount of by-products that adhere to the core and the sides of the etching mask formed on the core, making it possible to suppress variation in the shape of the core and distribution of the circuit characteristics within the wafer surface.

First Embodiment
Hereinafter, a first embodiment of an optical circuit according to the present disclosure will be described in detail with reference to the drawings.

2 is a diagram conceptually illustrating the structure of optical circuit 200 according to the first embodiment of the present disclosure, where (a) is a top view and (b) is a cross-sectional view taken along the IIb-IIb cross-sectional line. Note that while optical circuit 200 is depicted as a directional coupler in FIG. 1, this is for illustrative purposes only, and optical circuit 200 is not limited to being a directional coupler. As shown in FIG. 1, the optical circuit 200 according to this embodiment includes a support substrate 201, an underclad 202 formed on the support substrate 201, cores 203a, b formed on the underclad 202, dummy waveguides 204a, b having the same thickness (length in the z direction) as the cores 203a, b, formed on the same plane as the cores 203a, b and adjacent to the side of the cores 203a, b in the optical axis direction (x direction), and made of the same material as the cores 203a, b, and an overclad 205 that covers the periphery of the cores 203a, b and the dummy waveguides 204a, b.

As an example, but not limited to, in this embodiment, the width (length in the y direction) of the cores 203a and b is 1 μm, the thickness (length in the z direction) of the cores 203a and b is 2.3 μm, the width (gap width) between the cores 203a and b is 1.1 μm, and the coupling length is 500 μm. In addition, the relative refractive index difference between the cores 203a and b and the clad (underclad 202 and overclad 205) is 1.1%. As described above, the thickness of the dummy waveguides 204a and b is the same as the thickness of the cores 203a and b, but the width of the dummy waveguides 204a and b may be set to any width depending on the circuit design of the optical circuit to be manufactured. For example, in the case of a directional coupler as shown in FIG. 2, the width of each of the dummy waveguides 204a and b may be set to be different from the width of each of the cores 203a and b so that optical coupling to the dummy waveguides 204a and b is suppressed. For example, in this embodiment, the width of each of the dummy waveguides 204a and 204b in the optical coupling section is 10 μm. The gap width between the core 203a and the dummy waveguide 204a and the gap width between the core 203b and the dummy waveguide 204b are 4 μm. The dummy waveguides 204a and 204b are configured to have a bent tapered structure along the bent waveguide in front of the optical coupling section in order to avoid a sudden change in the effective refractive index due to the dummy waveguides 204a and 204b and to reduce optical loss. For example, in this embodiment, the arc length of the bent tapered structure is 200 μm.

In the optical circuit 200 according to this embodiment having such a configuration, when etching (e.g., dry etching such as reactive etching) is performed to form the cores 203a, b, the dummy waveguides 204a, b suppress the adhesion of by-products to the sides of the cores 203a, b and the etching mask formed on the cores 203a, b. This makes it possible to suppress variations in the shapes of the cores 203a, b and the in-plane distribution of the circuit characteristics.

3 is a diagram showing a schematic diagram of by-product adhesion during etching for forming the cores 203a, b of the optical circuit 200 according to the first embodiment of the present disclosure, in which (a) shows the state in which the by-product 106 is generated immediately after the start of etching, and (b) shows the state after the by-product 106 has adhered. Note that in FIG. 3, the cores 203a, b and the dummy waveguides 204a, b are depicted at a stage before they are formed, so that the core layer 301 that will become the cores 203a, b and the dummy waveguides 204a, b is depicted on the underclad 202, and etching masks 302a-d are depicted on the core layer 301. Also, in FIG. 3, etching masks 302b, c are etching masks formed on the portions that will later become the cores 203a, b, and etching masks 302a, d are etching masks formed on the portions that will later become the dummy waveguides 204a, b.

As shown in Figure 3, in the etching for forming the cores 203a, b in the manufacturing process of the optical circuit 200 according to this embodiment, many of the by-products generated adhere to the side surfaces of the dummy waveguides 204a, b and the etching masks 302a, d. This reduces the amount of by-products that adhere to the side surfaces of the cores 203a, b and the etching masks 302b, c, and as a result, the variation in the shapes of the cores 203a, b is suppressed.

Figure 4 shows the results of a comparative evaluation of the light transmittance of each of the directional couplers 402a-402f arranged on the main surface of the wafer 401 (the surface on which the chips are placed) with and without dummy waveguides 204a, b, where (a) is a top view of the wafer 401 that shows the schematic positions of the directional couplers 402a-402f, and (b) shows the light transmittance of each of the directional couplers 402a-402f. Note that in Figure 6, the wafer 401 has a diameter of 6 inches, and the transmittance evaluated is the transmittance for light with a wavelength of 450 nm, as an example. The directional couplers 402a-402f are all of the same design, and are arranged at intervals of approximately 2 cm along the center line 403 of the wafer. As shown in Figure 6(b), it was found that the optical circuit 200 according to the present disclosure has smaller variations in the optical transmittance of the directional couplers 402a-402f arranged within the plane of the wafer 401 than the optical circuit according to the conventional technology in which the dummy waveguides 204a, b are not formed. Therefore, from this result, it can be said that the optical circuit 200 in which the dummy waveguides 204a, b are formed has the effect of suppressing the in-plane distribution of the circuit characteristics.

In the above description, the material of the cores 203a and 203b is described as Zr-doped _SiO2 , but this is not intended to be limiting, and the same effect can be achieved even if a similar difficult-to-etch material is used. For example, the material of the cores 203a and 203b can be hafnium (Hf)-doped _SiO2 or lithium niobate ( _LiNbO3 ).

In the above description, the optical circuit 200 is described as a directional coupler, but the optical circuit 200 may be any optical circuit of a waveguide type, such as a multimode interferometer (hereinafter referred to as MMI), an arrayed waveguide grating (hereinafter referred to as AWG), or a mode coupler.

Furthermore, in the above description, the dummy waveguides 204a, b are described as being formed on each side of the cores 203a, b in the optical axis direction (two in total), but the number and positions of the dummy waveguides may be set arbitrarily according to the design. For example, as in the optical circuit 500 shown in FIG. 5, in addition to the two dummy waveguides 204a, b formed on each side of the cores 203a, b in the optical axis direction, two more dummy waveguides 504a, b may be additionally arranged between the S-shaped curved parts of the cores 203a, b (slab-like structure). In the etching for forming the cores 203a, b in the manufacturing process of the optical circuit 500, the area where the etching is performed is substantially reduced, so that the amount of by-products generated can also be reduced. On the other hand, since the optical circuit 500 has a structure that easily propagates leak light, it is desirable to further include a light-shielding structure (not shown).

FIG. 6 is a diagram showing the relationship between the gap width between the core 203a and the dummy waveguide 204a and the angle of the side of the formed core 203a. Here, the angle of the side of the core refers to the angle between the bottom surface of the core 203a (the surface in contact with the underclad 202) and the side of the core 203a, and if the angle of the side is 90°, it means that the side of the core 203a is perpendicular to the surface on which it is installed. As shown in FIG. 6, it can be seen that the angle of the side of the formed core 203a tends to move away from 90° as the gap width between the core 203a and the dummy waveguide 204a increases. In other words, it can be said that the smaller the gap width between the core 203a and the dummy waveguide 204a (the closer the core 203a and the dummy waveguide 204a are), the smaller the effect of the adhesion of the above-mentioned by-products.

On the other hand, it is generally known that the smaller the gap width, the more likely optical coupling occurs between the core 203a and the dummy waveguide 204a. This optical coupling causes optical loss, so from the standpoint of efficiency, it is not desirable for the gap width between the core 203a and the dummy waveguide 204a to be excessively small.

FIG. 7 is a diagram showing the relationship between the gap width between the core 203a and the dummy waveguide 204a and the light transmittance in the optical circuit 200 according to the present disclosure. In addition, FIG. 7 shows the results when the width of the core 203a is 1 μm, the thickness of the core 203a is 2.3 μm, the width of the dummy waveguide 204a is 10 μm, and the wavelengths of the light to be evaluated for transmittance are 445 nm, 520 nm, and 650 nm. As shown in FIG. 7, there is a tendency for the transmittance to drop sharply at a gap width of 2 μm or less at wavelengths of 445 nm and 520 nm, and at a gap width of 3 μm or less at a wavelength of 650 nm. Thus, there is a lower limit to the gap width between the core 203a and the dummy waveguide 204a that should be set from the viewpoint of efficiency, and it is desirable to install the dummy waveguide 204a so that the gap width is not smaller than the lower limit. The existence of a lower limit for this gap width also applies to the gap width between the core 203b and the dummy waveguide 204b.

Second Embodiment
Hereinafter, the second embodiment of the present disclosure will be described in detail with reference to the drawings.

8 is a top view conceptually illustrating the structure of an optical circuit 800 according to a second embodiment of the present disclosure. As shown in FIG. 8, the optical circuit 800 according to this embodiment has a structure in which the dummy waveguides 204a, b in the optical circuit 200 described above are replaced with dummy waveguides 804a, b. Each of these dummy waveguides 804a, b includes a first dummy structure 801a, b whose longitudinal direction is arranged parallel to the optical axis direction of the cores 203a, b, and a second dummy structure 802a, b whose longitudinal direction is arranged perpendicular to the longitudinal direction of the first dummy structure 801a, b. In addition, the width (length W in FIG. 8) of each of the first dummy structures 801a, b and the second dummy structure 802a, b is set to be smaller than the wavelength of the shortest wavelength of the light propagating through the cores 203a, b. For example, if the shortest wavelength of light propagating through the cores 203a,b is 445 nm, the width of each of the first dummy structures 801a,b and the second dummy structures 802a,b may be 0.3 μm.

In this way, the width of each of the first dummy structures 801a, b and the second dummy structures 802a, b is set to be very thin (e.g., 0.3 μm). Therefore, the first dummy structures 801a, b have low rigidity, and there is concern that problems due to insufficient strength, such as collapse, may occur. The second dummy structures 802a, b are provided to compensate for the low rigidity of the first dummy structures 801a, b. Therefore, the number of second dummy structures 802a, b arranged may be set arbitrarily depending on the rigidity of the first dummy structures 801a, b.

Even with the optical circuit 800 having such a configuration, as with the optical circuit 200 described in the first embodiment, adhesion of by-products to the sides of the cores 203a, b and the etching masks 302b, c during the etching for forming the cores 203a, b in the manufacturing process is suppressed. As a result, it is possible to suppress variation in the shapes of the cores 203a, b and distribution of the circuit characteristics within the wafer surface.

Furthermore, in the optical circuit 800, as described above, the width of each of the first dummy structures 801a, b and the second dummy structures 802a, b is set to be smaller than the wavelength of the shortest wavelength of light propagating through the cores 203a, b. This has the effect of suppressing optical loss in the dummy waveguides 804a, b, and as a result, it is possible to set the gap width between the core 203a and the dummy waveguide 804a small. For example, in the optical circuit 800, the gap width between the core 203a and the dummy waveguide 804a can be 1 μm.

FIG. 9 is a diagram illustrating the transmission spectrum of the optical circuit 800. As shown in FIG. 9, it was confirmed that in the optical circuit 800 according to the present disclosure, even when the gap width between the core 203a and the dummy waveguide 804a was set to a small value of 1 μm, no excessive optical loss occurred.

Note that, like the optical circuit 200 in the first embodiment, the optical circuit 800 is depicted as a directional coupler, but the optical circuit 800 may be any optical circuit of a waveguide type, such as an MMI, an AWG, or a mode coupler.

Similarly to the optical circuit 200 in the first embodiment, the material of the core 103 of the optical circuit 800 may be Zr-doped SiO ₂ , hafnium (Hf)-doped SiO ₂ , lithium niobate (LiNbO ₃ ), or the like.

Third Embodiment
Hereinafter, the third embodiment of the present disclosure will be described in detail with reference to the drawings.

FIG. 10 is a top view showing a schematic structure of the multiplexer 1000 in this embodiment. The multiplexer 1000 in this embodiment has a structure in which two optical circuits 200 with dummy waveguides described in the first embodiment above are connected in cascade. As shown in FIG. 10, the multiplexer 1000 in this embodiment has three optical input ports 1001a-c and three optical output ports 1002a-c.

Multiple light beams (three wavelengths in this example) with different wavelengths are input to the multiplexer 1000 and optically coupled by the two optical circuits 200. The light is finally multiplexed and output from the optical output port 1002b from the top right, causing the multiplexer 1000 to function as a multi-wavelength coupler. In addition, the optical output ports 1002a and 1002c can be used as output ports for monitoring the light source by adjusting the coupling rate of the multiplexer 1000.

Furthermore, by setting the wavelength of the light input to the multiplexer 1000 to 445±20 nm corresponding to blue, 523.5±20 nm corresponding to green, and 630±20 nm corresponding to red, the multiplexer 1000 can also be used as a compact RGB multiplexer.

In the above explanation, the multiplexer 1000 is described as having two optical circuits 200 connected in cascade, but this is for illustrative purposes only, and there may be two or more optical circuits 200 connected.

As described above, the optical circuit according to the present disclosure is capable of suppressing adhesion of low vapor pressure by-products to the sides of the core and the sides of the etching mask formed on the core during the etching process for forming the core. The optical circuit according to the present disclosure, which has such characteristics, is expected to be applied to quartz-based PLCs that use hard-to-etch materials for the core, as an optical circuit with high manufacturing yield.

Claims (6)

A waveguide-type optical circuit in which etching is performed to form a core in a manufacturing process,
An optical circuit comprising: a dummy waveguide formed on the same plane as the core and adjacent to a side surface of the core in the optical axis direction, the dummy waveguide being made of the same material as the core. The optical circuit of claim 1, wherein the width of the dummy waveguide in the direction perpendicular to the optical axis direction in the same plane is set to be different from the width of the core in the direction perpendicular to the optical axis direction in the same plane. The dummy waveguide is
a first dummy structure having a longitudinal direction parallel to an optical axis direction of the core;
a second dummy structure disposed in a direction perpendicular to the longitudinal direction of the first dummy structure;
Equipped with
2. The optical circuit according to claim 1, wherein the width of each of the first dummy structure and the second dummy structure is set to be smaller than the wavelength of the shortest wavelength of light propagating through the core. The optical circuit according to any one of claims 1 to 3, wherein the optical circuit is a directional coupler, a multimode interferometer, an arrayed waveguide grating, or a mode coupler. 5. A multiplexer comprising at least two optical circuits cascaded together according to claim 4,
the optical circuit is a directional coupler;
Three or more input ports to which light having different wavelengths is input;
an output port to which the light multiplexed by each of the directional couplers is output;
A multiplexer comprising: The multiplexer according to claim 5, wherein the wavelengths of the light having different wavelengths are three wavelengths: 445±20 nm, 523.5±20 nm, and 630±20 nm.

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