JPH11204686A - Semiconductor plastic package - Google Patents

Abstract

(57) [Summary] [PROBLEMS] To obtain a semiconductor plastic package excellent in heat dissipation, heat resistance after moisture absorption, and the like. A semiconductor plastic package of a ball grid array using a metal core printed wiring board, wherein a part of the metal core is exposed on a part of the surface, and a semiconductor chip fixed thereon is provided. The surrounding circuit conductors are connected by wire bonding, the front and back circuits are connected by through holes via blind via conduction holes, at least one or more through holes are connected to the inner metal plate, A multilayer semiconductor plastic package in which a semiconductor chip is resin-sealed. [Effect] A semiconductor plastic package having a novel structure that is excellent in heat dissipation and heat resistance after moisture absorption, and is suitable for mass productivity can be obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a novel semiconductor plastic package having a plurality of semiconductor chips mounted on a small printed wiring board. In particular, it relates to relatively high wattage, multi-terminal, high-density semiconductor plastic packages such as microprocessors, microcontrollers, ASICs, and graphics. This semiconductor plastic package is mounted on a motherboard printed wiring board using solder balls and used as an electronic device.

[0002]

2. Description of the Related Art Conventionally, a semiconductor chip is fixed on the upper surface of a plastic printed wiring board such as a plastic ball grid array (P-BGA) or a plastic land grid array (P-LGA) as a semiconductor plastic package. It is connected to the conductor circuit formed on the upper surface of the printed wiring board by wire bonding, and the lower surface of the printed wiring board is formed with conductor pads for connection with the motherboard printed wiring board using solder balls, and the front and back circuit conductors are plated 2. Description of the Related Art A semiconductor plastic package having a structure in which a semiconductor chip is sealed with a resin by connecting through a formed through hole is known. In the known structure, a plated heat diffusion through hole is formed from the upper metal foil for fixing the semiconductor chip to the lower surface in order to diffuse the heat generated from the semiconductor to the motherboard printed wiring board.

Through the through hole, moisture is absorbed by a resin adhesive containing silver powder used for fixing the semiconductor,
There is a danger that interlayer blisters may occur due to heating during mounting on the motherboard and heating when removing the semiconductor component from the motherboard, which is called a popcorn phenomenon. When this popcorn phenomenon occurs,
Packages are often unusable, and this phenomenon needs to be greatly improved. In addition, higher functionality and higher density of semiconductors mean more and more heat generation, and heat dissipation is insufficient with only through holes directly below the semiconductor chip for heat dissipation.

[0004]

SUMMARY OF THE INVENTION The present invention is to provide a plastic package which solves the above problems.

[0005]

That is, according to the present invention, there is provided a circuit in which a semiconductor chip is fixed on a partially exposed metal plate on one side of a printed wiring board and is formed on the surface of the printed wiring board around the semiconductor chip. A conductor is connected to the conductor by wire bonding, and at least the signal propagation circuit conductor on the printed wiring board on the surface is connected to a circuit conductor formed on the opposite surface of the printed wiring board or a solder ball to the outside of the package. The circuit conductor pad formed for
A semiconductor plastic package having a structure in which at least a portion is connected to a through hole via a blind via conduction hole and at least a semiconductor chip is sealed with a resin, and the signal transmission circuit conductor of the printed wiring board has three or more layers A metal plate having substantially the same size as the printed wiring board is disposed at substantially the center in the thickness direction of the printed wiring board, and is insulated from the front and back circuit conductors and the thermosetting resin composition; and At least one or more clearance holes with a diameter larger than the diameter of the through-hole conductor are formed, the hole walls and the metal plate are insulated by the resin composition, and one of the inner layer metal protrusions having substantially the same size as the semiconductor chip is formed. At least one portion is exposed on the surface on one side, and at least one or more through-holes are connected to the inner metal plate. The semiconductor chip is a semiconductor plastic package, characterized in that it is fixed.

In the present invention, the metal plate is a copper alloy of 95% by weight or more of copper or pure copper, and the insulating resin composition is
It is preferable to use a thermosetting resin composition containing a polyfunctional cyanate ester and the cyanate ester prepolymer as essential components. In the present invention, the heat generated from the semiconductor chip is allowed to escape to the motherboard through the heat-radiating through holes, and there is no moisture absorption from the lower surface of the semiconductor chip, and the heat resistance after moisture absorption, that is, the popcorn phenomenon can be significantly improved. The heat dissipation was greatly improved.
In addition, a semiconductor plastic package having a novel structure which is suitable for mass productivity and has improved economic efficiency can be obtained, and the present invention has been completed.

[0007]

BEST MODE FOR CARRYING OUT THE INVENTION In the plastic package of the present invention, a metal plate having good heat dissipation is arranged at substantially the center in the thickness direction of a printed wiring board. A hole having a diameter smaller than the diameter of the clearance hole formed in the metal plate is formed substantially at the center of the embedded resin, thereby maintaining the insulation with the metal plate.

In a known method of fixing a semiconductor chip on the upper surface of a metal-core printed wiring board having a through hole, heat from the semiconductor chip is dropped to a heat-dissipating through hole immediately below, similarly to a conventional P-BGA package. Heat must be dissipated and the popcorn phenomenon cannot be improved. The present invention is a method in which a metal plate serving as a metal core is firstly known in advance by a known etching method, cold machining, rolling irregular strip processing, and the like.
At least one or more projections having a size substantially equal to that of the semiconductor chip are formed for fixing the semiconductor chip. Then, a clearance hole larger than the diameter of the through hole is formed at a position where the through hole is to be formed by a known etching method so that a conductive through hole on both sides can be formed.
A hole is formed in the metal core by a punching method, a drill, a laser, or the like. Since heat generated from the semiconductor is conducted from the portion on which the semiconductor chip is mounted to the entire metal plate, the heat is diffused to a motherboard printed wiring board or the like through through holes directly connected to the metal plate.

The surface of the metal plate on which the projections and the through holes are formed is subjected to a surface treatment for improving adhesiveness and electric insulation such as oxidation treatment, formation of fine irregularities, and formation of a film as necessary. . Except for the surface of the metal plate on which the projections and the clearance holes are formed and on which the semiconductor chip is directly fixed, the insulating portion is formed of a thermosetting resin composition. The formation of the insulating part by the thermosetting resin composition is performed by using a prepreg impregnated with a thermosetting resin composition in a semi-cured state and dried, and the prepreg portion corresponding to a metal portion having a protrusion for directly fixing a semiconductor chip. A hole slightly larger than the area of the protruding portion is punched out in advance, and this is arranged on the front surface, and a prepreg without holes is arranged on the back surface, and laminated and formed under heat and pressure. The thickness of the prepreg is made slightly higher than the height of the metal projection. During heating and pressurizing process, 1
The semi-cured thermosetting resin that has been fully melted is poured into the clearance holes of the metal plate to bury the clearance holes, and at the same time, the portions other than the surfaces of the metal projections are integrated with the thermosetting resin composition.

A non-solvent or solvent-type thermosetting resin composition is applied by screen printing or the like to portions other than the metal plate projections. Then, it is cured by heating as it is, or is laminated and formed under heat and pressure to be integrated. In the case of laminating and molding, the resin is poured into the clearance holes and thermosetting at the same time as described above. In the case of application and thermal curing, a resin is poured into a clearance hole at a low pressure, and a solvent or air is removed while heating, and semi-cured.
When the solvent is contained, since unfilling in the clearance hole is likely to occur, a method of pouring the solvent-free liquid thermosetting resin composition into the clearance hole in advance and curing is generally used. Also, processing is performed such that the clearance holes of the metal plate are filled with the thermosetting resin composition.

[0011] The side surface of the metal plate may be any of a shape embedded with a thermosetting resin composition and an exposed shape.

Further, in order to form a through-hole printed wiring board by a subtractive method, it is necessary to
A metal foil slightly larger than the printed wiring board or a single-sided copper-clad laminate is placed on the outermost layer on the front and back sides, and the front and back sides are covered with metal foil for forming an outer layer circuit by laminating and molding under heat and pressure. A laminated metal foil clad multilayer board is formed.

When laminating and molding without using a metal foil for the front and back layers, a circuit is formed by a known additive method to produce a printed wiring board.

A through hole for conducting the circuit on the front and back of the plate made by the subtractive method or the semi-additive method other than the part where the semiconductor is fixed is formed by a known method such as drilling, laser or plasma. Drill holes.

The through hole for the front and back signal circuits is formed substantially at the center of the metal plate clearance hole in which the resin is embedded so as not to contact the metal plate. Next, a metal layer inside the through hole is formed by electroless plating or electrolytic plating, and a plated through hole is formed. In the full additive method, wire bonding terminals, signal circuits, solder ball pads are simultaneously formed on the front and back. To form a conductive circuit and the like.

In the semi-additive method, the front and back surfaces are plated at the same time as the through holes are plated.
Circuits are formed above and below by a known method. Also, in the case of lamination molding using the front and back metal foils, the metal foil on the surface of the metal projection portion of the semiconductor chip fixing portion is also removed in the front and back circuit forming steps. Furthermore, a resin layer is formed on the surface other than the exposed portion of the metal that has become a projection, and a via is formed by laser, plasma, etc., then, if necessary, desmearing is performed, metal plating is performed, and after forming the circuit, the noble metal is formed. Plating is formed on at least the surface of the wire bonding pad to complete the printed wiring board. In this case, a portion that does not require noble metal plating is covered with a plating resist in advance. After plating, if necessary, a film is formed on at least the surface other than the bonding pad and the solder ball bonding pad on the opposite surface with a known thermosetting resin composition or a photo-selective thermosetting resin composition. When a single-sided copper-clad laminate is used, after forming a circuit or after plating a noble metal, the base material on the metal plate on which the semiconductor chip is to be mounted is cut off using a router or the like.

Examples of the material used for the layer forming the blind via portion include the above-mentioned base material reinforcing prepreg, a resin-coated copper foil coated with a thermosetting resin composition on a copper foil, dried and semi-cured, or a paint. A generally known one is used. A generally known method can be used for forming a blind via. Specifically, a method of opening a via with a carbon dioxide laser, plasma, a method of opening with a photo via method, and the like can be given.

Using an adhesive or a metal powder-mixed adhesive on the surface of the metal projection portion of the printed wiring board to which the semiconductor is bonded,
The semiconductor chip is fixed, and the semiconductor chip and the bonding pads of the printed wiring board circuit are connected by a wire bonding method, and at least the semiconductor chip, the bonding wires, and the bonding pads are sealed with a known sealing resin.

A solder ball is connected to the solder ball connecting conductor pad on the opposite side of the semiconductor chip to form a P-BGA, and the solder ball is superimposed on a circuit on a motherboard printed wiring board, and the ball is melt-connected by heat. When the P-LGA is made without attaching solder balls to the package, and mounted on the motherboard printed wiring board, the solder ball connection conductor pads formed on the motherboard printed wiring board surface and the solder ball conductors for the P-LGA The pads are connected by heating and melting the solder balls.

The metal plate used in the present invention is not particularly limited, but a metal plate having a high elastic modulus, a high thermal conductivity and a thickness of 30 to 300 μm is preferable. Specifically, pure copper, oxygen-free copper, and others,
An alloy of 95% by weight or more of copper with Fe, Sn, P, Cr, Zr, Zn, or the like, or a metal plate having an alloy surface plated with copper is preferably used.

The height of the metal projection of the present invention is 30 to 200 μm.
m is preferred. Further, it is preferable that the height of the prepreg formed by hollowing out the projection or the thermosetting resin formed by screen printing is the same as or slightly higher than the height of the projection. The area of the projection is equal to or greater than the area of the semiconductor chip, and is preferably slightly larger. Generally, it is 5 to 20 mm square. The metal protrusions can be formed by a generally known method such as etching, cold machining, or rolling irregular shape processing. In addition, on a smooth metal plate, homogeneous of a predetermined size,
Or a foreign metal plate, such as copper paste with good thermal conductivity,
It is also possible to bond by a generally known bonding method.

As the resin of the thermosetting resin composition used in the present invention, generally known thermosetting resins are used. Specific examples include an epoxy resin, a polyfunctional cyanate ester resin, a polyfunctional maleimide-cyanate ester resin, a polyfunctional maleimide resin, and an unsaturated group-containing polyphenylene ether resin. Are used in combination. Polyfunctional cyanate ester resin compositions are preferred from the viewpoints of heat resistance, moisture resistance, migration resistance, electrical properties after moisture absorption, and the like.

The polyfunctional cyanate compound which is a preferred thermosetting resin component of the present invention is a compound having two or more cyanato groups in a molecule. Specific examples include 1,3- or 1,4-dicyanatobenzene, 1,3,5-tricyanatobenzene, 1,3-, 1,4-, 1,6-, 1,8-, 2 , 6- or 2,7-
Dicyanatonaphthalene, 1,3,6-tricyanatonaphthalene, 4,4-dicyanatobiphenyl, bis (4-dicyanatophenyl) methane, 2,2-bis (4-cyanatophenyl) propane, 2,2- Bis (3,5-dibromo-4-cyanatophenyl)
Propane, bis (4-cyanatophenyl) ether, bis (4-cyanatophenyl) thioether, bis (4-cyanatophenyl) sulfone, tris (4-cyanatophenyl)
Phosphite, tris (4-cyanatophenyl) phosphate, and cyanates obtained by reacting novolak with cyanogen halide.

In addition to these, Japanese Patent Publication Nos. 41-1928 and 43-184
68, 44-4791, 45-11712, 46-41112, 47-26853
And polyfunctional cyanate compounds described in JP-A-51-63149 and the like can also be used. In addition, a prepolymer having a molecular weight of 400 to 6,000 and having a triazine ring formed by trimerizing a cyanato group of these polyfunctional cyanate compounds is used. This prepolymer is obtained by polymerizing the above-mentioned polyfunctional cyanate ester monomer using, for example, an acid such as a mineral acid or a Lewis acid; a base such as a sodium alcoholate or a tertiary amine; a salt such as sodium carbonate as a catalyst. It can be obtained by: The prepolymer also contains some unreacted monomers and is in the form of a mixture of the monomer and the prepolymer, and such a raw material is suitably used for the purpose of the present invention. Generally, it is used after being dissolved in a soluble organic solvent.

As the epoxy resin, a generally known epoxy resin can be used. Specifically, liquid or solid bisphenol A type epoxy resin, bisphenol F type epoxy resin, phenol novolak type epoxy resin, cresol novolak type epoxy resin, alicyclic epoxy resin; butadiene, pentadiene, vinylcyclohexene, dicyclopentyl ether, etc. And polyglycidyl compounds obtained by reacting a polyol, a hydroxyl group-containing silicone resin with an ephalohydrin, and the like. These may be used alone or in combination of two or more.

As the polyimide resin, generally known ones can be used. Specific examples include a reaction product of a polyfunctional maleimide and a polyamine, and a polyimide having a terminal triple bond described in JP-B-57-005406.

These thermosetting resins may be used alone, but it is preferable to use them in combination as appropriate in consideration of the balance of properties.

Various additives can be added to the thermosetting resin composition of the present invention, if desired, as long as the inherent properties of the composition are not impaired. These additives include polymerizable double bond-containing monomers such as unsaturated polyesters and prepolymers thereof; polybutadiene, epoxidized butadiene, maleated butadiene, butadiene-
Low molecular weight liquid to high molecular weight elastic rubbers such as acrylonitrile copolymer, polychloroprene, butadiene-styrene copolymer, polyisoprene, butyl rubber, fluoro rubber, natural rubber; polyethylene, polypropylene,
Polybutene, poly-4-methylpentene, polystyrene,
AS resin, ABS resin, MBS resin, styrene-isoprene rubber, polyethylene-propylene copolymer, 4-fluoroethylene-6-fluoroethylene copolymers; polycarbonate, polyphenylene ether, polysulfone, polyester, polyphenylene sulfide, etc. High molecular weight prepolymers or oligomers; polyurethanes and the like are exemplified, and are appropriately used. Other known inorganic or organic fillers, dyes, pigments, thickeners, lubricants, defoamers, dispersants, leveling agents, photosensitizers, flame retardants, brighteners, polymerization inhibitors, thixotropic Various additives such as imparting agents are used in combination as needed. If necessary, the compound having a reactive group is appropriately blended with a curing agent and a catalyst.

The thermosetting resin composition of the present invention can be cured by heating itself, but has a low curing rate and is inferior in workability and economic efficiency. Can be used. The amount used is 0.005 to 10 parts by weight, preferably 0.01 to 5 parts by weight, per 100 parts by weight of the thermosetting resin.

As the reinforcing base material of the prepreg, generally known inorganic or organic woven or nonwoven fabric is used. Specific examples include known glass fiber cloths such as E glass, S glass, and D glass, wholly aromatic polyamide fiber cloths, and liquid crystal polyester fiber cloths. These may be mixed. Alternatively, a thermosetting resin composition applied to the front and back of a film such as a polyimide film and heated to a semi-cured state can be used.

As the outermost metal foil, generally known ones can be used. Preferably, a copper foil, aluminum foil, nickel foil or the like having a thickness of 3 to 100 μm is used.

The diameter of the clearance hole formed in the metal plate is slightly larger than the diameter of the through hole for front and back conduction. Specifically, it is preferable that a distance of 50 μm or more between the through hole wall and the metal plate clearance hole wall is insulated by the thermosetting resin composition. The diameter of the through hole for front / back conduction is not particularly limited, but is 50 to 300 μm.
Is preferred.

When preparing a prepreg for a multilayer printed wiring board of the present invention, a substrate is impregnated with a thermosetting resin composition and dried to obtain a semi-cured laminated material. Also, a resin sheet in a semi-cured state without using a base material can be used. Alternatively, paints can be used. In this case, depending on the degree of the semi-cured state, high flow or no flow is achieved. In the case of no flow, the flow of the resin is set to 100 μm or less, preferably 50 μm or less when laminating by heating and pressing. At this time, it is important that the metal plate and the metal foil adhere to each other and no void is generated. The temperature at which the prepreg is made is generally between 100 and 180 ° C. The time is 5 to 60 minutes, and is appropriately selected depending on the desired flow rate.

The method for producing the semiconductor plastic package containing the metal core of the present invention is not particularly limited. For example, the following method (FIG. 1) is used. (1) The entire surface of the metal plate serving as the inner layer is coated with a liquid etching resist, and after removing the solvent by heating, cover the negative film created so that the resist of the protrusion fixing the semiconductor chip remains, and after irradiating with ultraviolet light, Unexposed portions are dissolved and removed with a 1% aqueous sodium carbonate solution. (2) After the metal plate is dissolved to a predetermined thickness by etching, the etching resist is dissolved and removed. (3) Cover the top and bottom again with the liquid etching resist, cut out the metal projections on both sides, apply a negative film made so as to block the light in the clearance hole, and expose it to ultraviolet light.

(4) After the etching resist in the clearance hole is dissolved and removed, etching is performed from both sides by an etching method to form a clearance hole in the metal plate. (5) After removing the etching resist, chemically treat the entire surface of the metal plate, place a prepreg with holes slightly larger than the metal protrusions on the front side, and place a prepreg without holes on the back side, and Put the metal foil on. (6) After laminating under heat, pressure and vacuum, drill through a predetermined position with a laser or laser etc. so that the through hole does not come into contact with the inner metal foil, and after desmearing,
Perform metal plating.

(7) At the same time as forming the upper and lower circuits by a known method, the metal foil on the metal plate protrusion is removed. (8) No-flow or low-flow prepreg B is provided on the front surface by piercing a hole (prepreg B ₁ ) with a counterbore machine only on the exposed metal portion of the semiconductor chip, and a low-flow prepreg or high-flow prepreg is disposed on the back surface. An 18 μm electrolytic copper foil is placed on the upper side. (9) This is formed by lamination and integrated. (10) The copper foil on the surface where vias are to be formed is removed by etching, and vias are formed by a carbon dioxide laser, followed by desmear treatment, and the back surface is covered with a film and copper plated. (11) After coating with plating resist, apply noble metal plating, bond the semiconductor chip to the surface of the protrusion that is the semiconductor chip mounting part of the inner metal plate, perform wire bonding, and then resin seal, if necessary Glue the solder balls.

[0037]

The present invention will be specifically described below with reference to examples and comparative examples. Unless otherwise specified, “parts” indicates parts by weight. Example 1 900 parts of 2,2-bis (4-cyanatophenyl) propane and 100 parts of bis (4-maleimidophenyl) methane were melted at 150 ° C. and reacted with stirring for 4 hours to obtain a prepolymer. This was dissolved in a mixed solvent of methyl ethyl ketone and dimethylformamide. 400 parts of bisphenol A type epoxy resin (trade name: Epicoat 1001, Yuka Shell Epoxy Co., Ltd.) and cresol novolak type epoxy resin (trade name: ESCN-220F, Sumitomo Chemical Co., Ltd.)
600 parts), and dissolved and mixed uniformly. Further, 0.4 part of zinc octylate was added as a catalyst, and the mixture was dissolved and mixed. To this, 500 parts of an inorganic filler (trade name: calcined talc BST200, manufactured by Nippon Talc Co., Ltd.) was added, followed by uniform stirring and mixing to obtain Varnish A. .

The varnish was impregnated with a glass woven cloth having a thickness of 100 μm, dried at 150 ° C., and gelled (at 170 ° C.) for 0 second.
A semi-cured prepreg (prepreg B) having a thickness of 105 μm and a resin flow of 60 μm at 170 ° C., 20 kgf / cm ² for 5 minutes was obtained. A prepreg C having a gelation time of 114 seconds, a resin flow of 13 mm, and a thickness of 109 μm was prepared.

On the other hand, a copper plate having a thickness of 250 μm as an inner metal plate was prepared, and 13 mm was placed at the center of a 50 mm square package.
One protrusion having a corner and a height of 100 μm was formed. After that, a liquid etching resist was applied to the entire surface of the metal plate at a thickness of 20 μm, dried, and the solvent was removed. After removing the resist film in the hole portion with a 1% aqueous solution of sodium carbonate, a clearance hole of 0.6 mmφ was opened from both sides by etching.

The entire surface of the metal plate is subjected to a black copper oxide treatment, and the rear surface of the metal plate is placed at a position corresponding to the protruding portion at 50 μm from the protruding portion.
Cover the prepreg B, which has a hole larger by m with a router, place prepreg C on the back side, and thickness on both outer sides.
Place 18μm electrolytic copper foil, 200 ℃, 20kgf / cm ² , 30mmHg
It was laminated and molded under the following vacuum for 2 hours and integrated.

The clearance hole has a hole diameter of 0.25 mm at the center so as not to come into contact with the metal in the clearance hole.
Drill through holes, connect through holes for heat dissipation with the inner metal plate at the four corners, drill, and after desmearing, perform copper plating by electroless and electrolytic plating to form a 17μm copper plated layer in the holes did.

After applying and drying a liquid etching resist on the front and back, a positive film is overlaid and exposed and developed to form a front and back circuit, and the copper foil on the protruding portion is simultaneously etched away to obtain a printed wiring board D. Was. Then, use a router to make a hole 100 μm larger than the size of the protruding part metal that fixes the semiconductor chip on the surface exposed metal part.
B ₁ This is superimposed on the printed wiring board D, and an 18 μm electrolytic copper foil is placed outside the printed wiring board D at 200 ° C., 20 kgf / cm ² ,
The laminate was formed under vacuum.

The copper foil where the blind via was opened was removed by etching, a hole was formed with a carbon dioxide laser, and after desmearing, copper plating was applied in the same manner. A plating resist was formed on the portions other than the protruding portions, the bonding pads and the ball pads, and nickel and gold plating were applied to complete the printed wiring board. After bonding and fixing a 13 mm square semiconductor chip on the upper surface projection with silver paste, wire bonding is performed, and then using a silica-containing epoxy sealing liquid resin,
A semiconductor package was prepared by sealing the semiconductor chip portion with a resin (FIGS. 1 and 2). Table 1 shows the evaluation results of this package.

Example 2 Using prepreg C, an 18 μm electrolytic copper foil was placed on one side and a release film was placed on one side, and laminated and molded at 200 ° C. and 20 kgf / cm ^{2 for} 2 hours to produce a one-sided copper-clad laminate. did. 250 μm thick Cu: 99.86 wt%, Fe: 0.11 wt%, P:
A 0.03% by weight alloy plate was processed in the same manner as in Example 1, and two protrusions having a size of 10 mm square and a height of 100 μm were formed on the surface. Drill a clearance hole of 0.6 mm φ, place a prepreg B with holes on the protruding part with a router in the same way, place a prepreg C on the back, and place the single-sided copper-clad laminate obtained above on both sides. And laminated and formed under the same conditions.
Drill a 0.20mm through hole in the center with a drill so that the clearance hole does not come into contact with the metal in the clearance hole.After desmearing, copper plating is performed by electroless and electrolytic plating. Was formed.

A liquid etching resist was applied to the front and back sides, and the solvent was removed by drying. Then, a positive film was overlaid, exposed and developed to form front and back circuits. After the same manner as in Example 1 were laminated molded using a prepreg B _1, similarly to create a via portion, a plating resist is formed laminate portion on the protrusion, in addition to the bonding pads and the ball pad portion, After applying nickel and gold plating, the base material of the laminated board portion on the central copper plate projection was cut and removed by a router to complete a printed wiring board. Thereafter, similarly, the semiconductor chip was bonded, wire-bonded, and sealed with a resin to obtain a semiconductor package. Table 1 shows the characteristic test results.

Comparative Example 1 Two prepregs C of Example 1 were used, and electrolytic copper foils were arranged on the upper and lower sides, and laminated and molded at 200 ° C., 20 kgf / cm ² and under vacuum for 2 hours to form a double-sided copper-clad laminate. Obtained. 0.25mm hole diameter in place
A φ through hole was drilled, and copper plating was applied after desmear treatment. Circuits were formed on and under the plate by a known method, and nickel plating and gold plating were performed. This has a through hole for heat dissipation formed at the place where the semiconductor chip is mounted. The semiconductor chip is adhered on this with a silver paste, and after wire bonding, it is sealed with a resin for epoxy sealing in the same manner as in Example 1. Stopped (FIG. 3). Table 1 shows the test results of this package.

Comparative Example 2 A semiconductor chip mounting portion of the printed wiring board of Comparative Example 1 was hollowed up and down with a counterbore machine, and a thickness of 200
Using a punched-out no-flow prepreg, a μm copper plate was similarly adhered under heat and pressure to produce a printed wiring board with a heat sink. This slightly warped. A semiconductor chip was directly bonded to the heat sink with a silver paste, connected by wire bonding, and sealed with a liquid epoxy resin (FIG. 4). Table 1 shows the test results of this package.

[0048]

[Table 1] Example 1 Example 2 Comparative example 1 Comparative example 2 Heat resistance after moisture absorption Normal No abnormality No abnormality No abnormality No abnormality No abnormality 96hrs No abnormality No abnormality No abnormality No abnormality 120hrs No abnormality No abnormality Partial peeling No abnormality 144hrs No abnormalities No abnormalities Partial peeling No abnormalities 168hrs No abnormalities No abnormalities No abnormalities Partial peeling Partial peeling Heat resistance after moisture absorption Normal No abnormalities No abnormalities No abnormalities No abnormalities 24hrs No abnormalities No abnormalities Partial peeling No abnormalities 48hrs No abnormalities No abnormalities Peeling Large Partly peeled 72hrs No abnormality No abnormality No broken wire Large peeled 96hrs No abnormality No abnormality No broken wire Large 120hrs No abnormality No abnormality No broken wire 144hrs No abnormality Partially peeled-Wire broken 168hrs No abnormality Partially peeled-- Glass transition temperature (℃) 234 - - - pressure cookie normal 4 × 10 ¹⁴ - - - after car treatment insulating 200hrs 6 × 10 ¹² resistance Value ^{(Ω) 500hrs 6 × 10 11} 700hrs 5 × 10 10 1000hrs 2 × 10 10 resistance migrated normally 5 × 10 ¹³ - - - tio emission properties ^{200hrs 6 × 10 11 (Ω)} 500hrs 5 × 10 11 700hrs 9 × 10 10 1000hrs 6 × 10 ¹⁰ Heat dissipation (° C) 37 38 55 47

<Measurement method> 1) Heat resistance after moisture absorption JEDEC STANDARD TEST METHOD A113-A LEVEL3: 30 ℃ ・ 60
After the treatment at% RH for a predetermined time, the presence or absence of abnormality in the substrate after three cycles of reflow soldering at 220 ° C. was confirmed by cross-sectional observation and electrical check. 2) Heat resistance after moisture absorption JEDEC STANDARD TEST METHOD A113-A LEVEL2: 85 ℃ ・ 60
After treatment at% RH for a predetermined time (Max. 168 hrs.), The presence or absence of abnormality in the substrate after three cycles of reflow soldering at 220 ° C. was confirmed by cross-sectional observation and electrical check. 3) Glass transition temperature Measured by the DMA method. 4) Insulation resistance value after pressure cooker treatment After treatment for 2 hours at 121 ° C and 2 atm, and after treatment for 2 hours at 25 ° C and 60% RH, apply 500VDC for 60 seconds, and the terminals (line / space = 70 μm / 70 μm) was measured. 5) Migration resistance The insulation resistance value between terminals was measured by applying 50 VDC at 85 ° C and 85% RH. 6) Heat dissipation The package was adhered to the same motherboard printed wiring board with solder balls and used continuously for 800 hours, and then the temperature of the package was measured.

[0050]

According to the present invention, a semiconductor chip is fixed to one surface of a printed wiring board, and a semiconductor circuit conductor is connected by wire bonding to a circuit conductor formed on the surface of the printed wiring board around the semiconductor chip. The signal propagation circuit conductor on the wiring board is a through-hole conductor formed through two or more blind via conduction holes with the circuit conductor formed on the opposite surface of the printed wiring board or the conductor pad for connection with the solder ball. A semiconductor plastic package having a structure in which the semiconductor chip is sealed with a resin, and a metal plate having substantially the same size as the printed wiring board is disposed substantially at the center in the thickness direction of the printed wiring board;
The front and back circuit conductors are insulated by a heat-resistant resin composition such as a polyfunctional cyanate ester resin composition, and a metal plate is provided with at least one or more through-hole conductor holes having a diameter larger than the diameter of the conductor. The metal plate is insulated with the resin composition, and at least one or more of the inner layer metal protrusions having substantially the same size as the semiconductor chip are exposed on the surface. Is fixed, and a through hole for heat dissipation is connected to the inner metal plate.The semiconductor plastic package is designed to allow the generated heat to escape through this metal plate, so that there is no moisture absorption from the lower surface of the semiconductor chip and moisture absorption The heat resistance afterwards, that is, the popcorn phenomenon can be greatly improved, and the heat dissipation can be improved. Was good, it was possible to obtain a semiconductor plastic package having a novel structure.

[Brief description of the drawings]

FIG. 1 shows a manufacturing process of a printed wiring board D according to a first embodiment.

FIG. 2 shows a manufacturing process of a semiconductor plastic package having vias formed therein according to the first embodiment.

FIG. 3 shows a manufacturing process of the semiconductor plastic package of Comparative Example 1.

FIG. 4 shows a manufacturing process of the semiconductor plastic package of Comparative Example 2.

[Explanation of symbols]

(a) liquid etching resist, (b) metal plate, (c) negative film, (d) clearance hole, (e) metal foil,
(f) Pre-preg B, (g) Through-hole for conducting upper and lower circuits, (h) Through-hole for heat dissipation, (i) Pre-preg B ₁ ,
(j) Via, (k) Encapsulation resin, (l) Gold wire, (m)
Semiconductor chip, (n) silver paste, (o) plating resist, (p) solder ball, (q) prepreg C

Claims (3)

[Claims] 1. A semiconductor chip is fixed on a partially exposed metal plate on one side of a printed wiring board, and is connected by wire bonding to a circuit conductor formed on a surface of the printed wiring board around the semiconductor chip. At least, the signal propagation circuit conductor on the printed wiring board on the surface is a circuit conductor formed on the opposite surface of the printed wiring board or a circuit conductor pad formed for connection to the outside of the package with a solder ball. A semiconductor plastic package having a structure in which at least two semiconductor via holes are connected via through holes via blind via holes and at least a semiconductor chip is sealed with a resin, and the signal transmission circuit conductor of the printed wiring board is A metal plate composed of layers or more and having the same size as the printed wiring board is placed almost at the center of the printed wiring board in the thickness direction. The path conductor is insulated with the thermosetting resin composition, and at least one or more through holes are formed in the metal plate. A clearance hole having a diameter larger than the diameter of the conductor is formed. At least one or more metal protrusions of the inner layer that are insulated and have substantially the same size as the semiconductor chip are exposed on at least one surface on one side, and at least one or more through holes are connected to the inner metal plate. And a semiconductor chip fixed to the exposed metal surface. 2. The semiconductor plastic package according to claim 1, wherein the metal plate is made of a copper alloy containing 95% by weight or more of copper or pure copper. 3. The plastic package according to claim 1, wherein the insulating resin composition is a thermosetting resin composition containing a polyfunctional cyanate ester and the cyanate ester prepolymer as essential components.