CN114520280A - Miniature light-emitting diode and miniature light-emitting diode display panel - Google Patents

Abstract

The invention provides a micro light-emitting diode and a micro light-emitting diode display panel. The micro light emitting diode comprises an epitaxial structure and an insulating layer. The epitaxial structure includes a first type semiconductor layer, a light emitting layer and a second type semiconductor layer, and has a first ion implantation region. A first distance is arranged between the surface of the first type semiconductor layer and the top surface of the adjacent surface of the light-emitting layer. A second distance is formed between the surface of the first type semiconductor layer and the first bottom side of the first ion implantation area. The second distance is greater than the first distance and less than the height of the platform. A first included angle with an absolute value between 0 and 15 degrees is formed between a first extending direction of the first inner side of the first ion implantation area and a normal direction of the light emitting layer. The insulating layer covers the periphery and part of the surface of the first type semiconductor layer, the periphery of the light emitting layer and part of the periphery of the second type semiconductor layer. The micro light-emitting diode can improve the External Quantum Efficiency (EQE) and has better light-emitting efficiency.

Description

Micro LED and Micro LED Display Panel

technical field

The present invention relates to a light-emitting structure, in particular to a miniature light-emitting diode and a miniature light-emitting diode display panel.

Background technique

A light-emitting element, such as a light-emitting diode (LED), can emit light by driving the light-emitting layer of the light-emitting diode by an electron current. At present, light-emitting diodes still face many technical challenges, and the Efficiency Droop effect of light-emitting diodes is one of them. Specifically, when the light emitting diode operates within a current density range, it corresponds to a peak value of external quantum efficiency (EQE). As the current density of the light emitting diode continues to increase, the external quantum efficiency will decrease accordingly, and this phenomenon is the efficiency degradation effect of the light emitting diode.

Currently, etching processes are used to perform mesa, isolation, and other procedures when manufacturing micro light-emitting diodes (micro LEDs). However, during the etching process, the sidewalls of the micro-LEDs may be damaged, which affects the non-radiative recombination of the micro-LEDs when they emit light, resulting in a significant decrease in external quantum efficiency (EQE). When the size of the miniature light-emitting diode is less than 50 microns, since the surface area of the sidewall surface accounts for the larger proportion of the surface area of the overall epitaxial structure, the proportion of carriers flowing through the sidewall will also increase, resulting in a significant decrease in the external quantum efficiency.

SUMMARY OF THE INVENTION

The present invention is directed to a miniature light emitting diode and a miniature light emitting diode display panel, which can improve external quantum efficiency (EQE) and have better luminous efficiency.

According to an embodiment of the present invention, a micro light emitting diode includes an epitaxial structure and an insulating layer. The epitaxial structure includes a first type semiconductor layer, a light emitting layer and a second type semiconductor layer, and has a first ion implantation region. The light emitting layer is located between the first type semiconductor layer and the second type semiconductor layer. The first type semiconductor layer, the light emitting layer, and the first portion of the second type semiconductor layer constitute a mesa. The second portion of the second-type semiconductor layer forms a recess relative to the mesa. The first ion implantation region has a first inner side and a first bottom side connected to the first inner side. There is a first distance between the surface of the first type semiconductor layer and the top surface of the adjacent surface of the light emitting layer. There is a second distance between the surface of the first type semiconductor layer and the first bottom side of the first ion implantation region. The second distance is greater than the first distance and less than the height of the platform. There is a first included angle between the first extending direction of the first inner side of the first ion implantation region and the normal direction of the light emitting layer, and the absolute value of the first included angle is between 0 and 15 degrees. The insulating layer is disposed on the epitaxial structure and covers the periphery and part of the surface of the first type semiconductor layer, the periphery of the light emitting layer and the periphery of part of the second type semiconductor layer.

In the micro light emitting diode according to the embodiment of the present invention, the above-mentioned insulating layer contacts and covers the sidewall of the platform, and the platform is adjacent to the recess.

In the micro light-emitting diode according to the embodiment of the present invention, the above-mentioned micro light-emitting diode further includes a current distribution layer disposed between the insulating layer and the first-type semiconductor layer. The orthographic projection of the current distribution layer on the surface of the first type semiconductor layer is smaller than the surface.

In the miniature light-emitting diode according to the embodiment of the present invention, the material of the current distribution layer includes indium tin oxide, indium oxide, tin oxide, aluminum oxide zinc, cadmium tin oxide, antimony tin oxide, zinc oxide or a combination of the above materials .

In the micro light-emitting diode according to the embodiment of the present invention, the above-mentioned micro light-emitting diode further includes a first electrode and a second electrode. The first electrode is electrically connected to the first type semiconductor layer. The second electrode is electrically connected to the second type semiconductor layer. The first electrode and part of the second electrode are located on the same plane.

In the micro light-emitting diode according to the embodiment of the present invention, the above-mentioned micro light-emitting diode further includes a current distribution layer disposed between the insulating layer and the first type semiconductor layer, and the current distribution layer is on the surface of the first type semiconductor layer The orthographic projection on is smaller than the surface. The insulating layer has a first opening exposing the current distribution layer and a second opening exposing a second portion of the second type semiconductor layer. The first opening is located in the platform, and the second opening is located in the recess. The first electrode is disposed in the first opening and extends to the insulating layer. The second electrode is disposed on the insulating layer and extends into the second opening.

In the micro light emitting diode according to the embodiment of the present invention, the first bottom side of the above-mentioned first ion implantation region is located in the first portion of the second type semiconductor layer. The first ion implantation region surrounds the periphery of the first type semiconductor layer, the periphery of the light emitting layer, and a periphery of a portion of the first portion.

In the miniature light emitting diode according to the embodiment of the present invention, the absolute value of the above-mentioned first included angle is between 7 degrees and 15 degrees.

In the micro light emitting diode according to the embodiment of the present invention, the above-mentioned epitaxial structure further has a second ion implantation region. The second ion implantation region has a second inner side and a second bottom side connected to the second inner side. There is a third distance between the surface of the first type semiconductor layer and the second bottom side of the second ion implantation region, and the third distance is smaller than the first distance.

In the micro light emitting diode according to the embodiment of the present invention, the second bottom side of the above-mentioned second ion implantation region is located in the first type semiconductor layer and surrounds a part of the first type semiconductor layer. There is a second included angle between the second extending direction of the second inner side of the second ion implantation region and the normal direction of the light emitting layer, and the absolute value of the second included angle is greater than the absolute value of the first included angle.

In the micro light emitting diode according to the embodiment of the present invention, the ion concentration of the second ion implantation region is greater than the ion concentration of the first ion implantation region.

In the micro light emitting diode according to the embodiment of the present invention, the first bottom side of the above-mentioned first ion implantation region is located in the light emitting layer. The first ion implantation region surrounds the first type semiconductor layer and the light emitting layer.

In the micro light emitting diode according to the embodiment of the present invention, the above-mentioned second distance is greater than 0.7 micrometer and less than 1 micrometer.

In the micro light-emitting diode according to the embodiment of the present invention, the periphery of the above-mentioned light-emitting layer directly contacts the insulating layer.

According to an embodiment of the present invention, a miniature light emitting diode display panel includes a substrate and a plurality of miniature light emitting diodes. The substrate has control elements. The micro light-emitting diode array is arranged on the substrate to form a plurality of pixels and is electrically connected with the control element. The control elements respectively control the micro light-emitting diodes to emit light. Each micro light emitting diode includes an epitaxial structure and an insulating layer. The epitaxial structure includes a first type semiconductor layer, a light emitting layer and a second type semiconductor layer, and has a first ion implantation region. The light emitting layer is located between the first type semiconductor layer and the second type semiconductor layer. The first type semiconductor layer, the light emitting layer, and the first portion of the second type semiconductor layer constitute a mesa. The second portion of the second-type semiconductor layer forms a recess relative to the mesa. The first ion implantation region has a first inner side and a first bottom side connected to the first inner side. There is a first distance between the surface of the first type semiconductor layer and the top surface of the adjacent surface of the light emitting layer. There is a second distance between the surface of the first type semiconductor layer and the first bottom side of the first ion implantation region. The second distance is greater than the first distance and less than the height of the platform. There is a first included angle between the first extending direction of the first inner side of the first ion implantation region and the normal direction of the light emitting layer, and the absolute value of the first included angle is between 0 and 15 degrees. The insulating layer is disposed on the epitaxial structure and covers the periphery and part of the surface of the first type semiconductor layer, the periphery of the light emitting layer and the periphery of part of the second type semiconductor layer.

In the micro LED display panel according to the embodiment of the present invention, the micro LEDs include red micro LEDs emitting red light, green micro LEDs emitting green light, and blue micro LEDs emitting blue light.

Based on the above, in the design of the micro light emitting diode of the present invention, the epitaxial structure has a first ion implantation region, and the second ion implantation region is located between the surface of the first type semiconductor layer and the first bottom side of the first ion implantation region. The distance is greater than the first distance between the surface of the first-type semiconductor layer and the top surface of the adjacent surface of the light-emitting layer and is less than the height of the platform, and the first extension direction of the first inner side of the first ion implantation region is the same as that of the light-emitting layer. There is a first included angle between the direction directions with an absolute value between 0 and 15 degrees. That is, the depth of the first ion implantation region of the present invention exceeds the depth of the light-emitting layer, and the absolute value of the implantation angle of the first ion implantation region is between 0 and 15 degrees. This design can reduce the problem that the external quantum efficiency of the sidewall of the miniature light-emitting diode is greatly reduced due to the combination of non-luminescent radiation, can improve the external quantum efficiency, and can effectively improve the sidewall dangling bonds caused by dry etching, thereby improving the present invention. luminous efficiency of miniature light-emitting diodes.

Description of drawings

1 is a schematic cross-sectional view of a miniature light-emitting diode according to an embodiment of the present invention;

2 is a schematic cross-sectional view of a micro light-emitting diode according to another embodiment of the present invention;

3 is a schematic cross-sectional view of a miniature light-emitting diode according to another embodiment of the present invention;

4 is a schematic cross-sectional view of a miniature light-emitting diode according to another embodiment of the present invention;

FIG. 5 is a partial top schematic view of a miniature light emitting diode display panel according to an embodiment of the present invention.

Description of reference numerals

10: Miniature light-emitting diode display panel;

20: substrate;

30: control element;

100, 100a, 100b, 100c, 100d: miniature light-emitting diodes;

110a, 110b, 110c, 110d: epitaxial structure;

112: first type semiconductor layer;

113: surface;

114: light-emitting layer;

115: top surface;

116: the second type semiconductor layer;

116a: part one;

116b: Part II;

120: insulating layer;

122: The first opening;

124: The second opening;

130: current distribution layer;

140: the first electrode;

150: the second electrode;

B: blue miniature light-emitting diode;

B1, B2, B3, B6, B7: the first bottom side;

B4, B5, B8, B9: the second bottom side;

C: depression;

D1, D2, D3, D6, D7: the first extension direction;

D4, D5, D8, D9: the second extension direction;

G: Green miniature light-emitting diode;

H, T: height;

H1: the first distance;

H2, H4: the second distance;

H3, H5: the third distance;

L: plane;

M: platform;

N: normal direction;

P1, P2, P3, P6, P7: the first ion implantation area;

P4, P5, P8, P9: the second ion implantation area;

R: red miniature light-emitting diode;

S1, S2, S3, S6, S7: the first inner side;

S4, S5, S8, S9: the second inner side;

U: pixel;

α1, α2, α3, α6, α7: the first included angle;

α4, α5, α8, α9: the second included angle.

Detailed ways

Reference will now be made in detail to the exemplary embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numerals are used in the drawings and description to refer to the same or like parts.

FIG. 1 is a schematic cross-sectional view of a micro light-emitting diode according to an embodiment of the present invention. Referring to FIG. 1 , in this embodiment, the micro light-emitting diode 100 a includes an epitaxial structure 110 a and an insulating layer 120 . The epitaxial structure 110a includes a first type semiconductor layer 112, a light emitting layer 114 and a second type semiconductor layer 116, and has a first ion implantation region P1. The light emitting layer 114 is located between the first type semiconductor layer 112 and the second type semiconductor layer 116 . The second type semiconductor layer 116 has a first portion 116a and a second portion 116b connected, wherein the second portion 116b protrudes from the first portion 116a and is located between the light emitting layer 114 and the first portion 116a. The first type semiconductor layer 112 , the light emitting layer 114 , and the first portion 116 a of the second type semiconductor layer 116 constitute the mesa M. That is, the second portion 116b of the second-type semiconductor layer 116 forms the recess C with respect to the mesa M. As shown in FIG. The first ion implantation region P1 has a first inner side S1 and a first bottom side B1 connected to the first inner side S1. There is a first distance H1 between the surface 113 of the first type semiconductor layer 112 and the top surface 115 of the light emitting layer 114 adjacent to the surface 113 , that is, the thickness of the first type semiconductor layer 112 . There is a second distance H2 between the surface 113 of the first type semiconductor layer 112 and the first bottom side B1 of the first ion implantation region P1, that is, the depth of the first ion implantation region P1. The second distance H2 is greater than the first distance H1 and less than the height H of the platform M. That is to say, calculated from the surface 113 of the first type semiconductor layer 112 downward, the depth of the first ion implantation region P1 exceeds the depth of the light emitting layer 114 , but the depth of the first ion implantation region P1 is smaller than the height H of the platform M . If the height H of the platform M is smaller than the depth of the first ion implantation region P1 , the contact resistance of the second type semiconductor layer 116 is likely to increase significantly.

Furthermore, there is a first included angle α1 between the first extending direction D1 of the first inner side S1 of the first ion implantation region P1 and the normal direction N of the light emitting layer 114 , and the absolute value of the first included angle α1 is between Between 0 and 15 degrees. That is to say, the absolute value of the ion implantation angle of the first ion implantation region P1 is between 0 and 15 degrees, and can be implanted in a left-up, right-bottom or right-up and left-bottom manner, which is not limited herein. The insulating layer 120 is disposed on the epitaxial structure 110a and covers the surface and side surfaces of the epitaxial structure 110a. In more detail, the insulating layer 120 covers the periphery of the first type semiconductor layer 112 and part of the surface 113 , the periphery of the light emitting layer 114 and the periphery of part of the second type semiconductor layer 116 . Here, the periphery of the first type semiconductor layer 112 , the periphery of the light emitting layer 114 , and a part of the periphery of the second type semiconductor layer 116 directly contact the insulating layer 120 . The insulating layer 120 contacts and covers the sidewall of the platform M, and the platform M is adjacent to the recess C.

Further, in this embodiment, the first-type semiconductor layer 112 is, for example, a P-type semiconductor layer, the light-emitting layer 114 is, for example, a Multi Quantum Well (MWQ) structure, and the second-type semiconductor layer 116 is, for example, a N-type semiconductor layer, but not limited thereto. The first bottom side B1 of the first ion implantation region P1 is embodied in the first portion 116a of the second-type semiconductor layer 116, that is, exceeds the depth of the light-emitting layer 114, and the absolute value of the first included angle α1, preferably, Between 7 degrees and 15 degrees, the channel effect can be effectively avoided. Here, the ion implantation is carried out in the implantation direction of the upper left and the lower right, so the first included angle α1 is between minus 7 degrees and minus 15 degrees, and the shape of the first ion implantation region P1 is, for example, a trapezoid, but not This is the limit. The first ion implantation region P1 surrounds the periphery of the first type semiconductor layer 112 , the periphery of the light emitting layer 114 and the periphery of a part of the first portion 116 a. One side of the first ion implantation region P1 opposite to the first inner side S1 is in direct contact with the insulating layer 120 , and the first inner side S1 of the first ion implantation region P1 is arranged in parallel in a cross-sectional view, but not limited thereto . The height H of the platform M is, for example, 1 μm to 1.5 μm, and the height T of the recess C is, for example, 1 μm to 3 μm, and the second distance H2 is, for example, greater than 0.7 μm and less than 1 μm.

Furthermore, the micro light emitting diode 100a of this embodiment further includes a current distribution layer 130 disposed between the insulating layer 120 and the first-type semiconductor layer 112 to form ohmic contact with the first-type semiconductor layer 112 . As shown in FIG. 1 , the orthographic projection of the current distribution layer 130 on the surface 113 of the first-type semiconductor layer 112 is smaller than the surface 113 , which can further restrict the carriers flowing to the side of the micro LED 100 a and reduce the side of the micro LED 100 a generated current. Since the area of the miniature light emitting diode 100a is small, the side leakage current can be reduced by the indented design of the current distribution layer 130 to improve hole injection efficiency and current distribution. Here, the material of the current distribution layer 130 is, for example, indium tin oxide, indium oxide, tin oxide, aluminum oxide zinc, cadmium tin oxide, antimony tin oxide, zinc oxide, or a combination of the above materials.

In addition, the insulating layer 120 of this embodiment has a first opening 122 and a second opening 124 . The first opening 122 exposes a portion of the current distribution layer 130 , and the second opening 124 exposes a portion of the second portion 116 b of the second type semiconductor layer 116 . The first opening 122 is located at the platform M, and the second opening 124 is located at the recess C. The micro light-emitting diode 100 a further includes a first electrode 140 and a second electrode 150 . The first electrode 140 is disposed in the first opening 122 of the insulating layer 120 and extends to the insulating layer 120 , wherein the first electrode 140 is electrically connected to the first type semiconductor layer 112 . The second electrode 150 is disposed on the insulating layer 120 and extends into the second opening 124 to be electrically connected to the second-type semiconductor layer 116 . Here, the first electrode 140 and a part of the second electrode 150 are located on the same plane L, which is beneficial to improve the yield of subsequent die bonding. Since the first electrode 140 and the second electrode 150 of this embodiment are located on the same side of the epitaxial structure 110a, the micro LED 100a of this embodiment is embodied as a flip chip type micro LED.

In short, in this embodiment, the semiconductor layers (such as the first-type semiconductor layer 112 and the second-type semiconductor layer 116 ) are made close to the intrinsic semiconductor properties by means of ion implantation, and the absolute value is between 0 degrees and 15 degrees. The implantation angle is greater than the depth of the light-emitting layer 114 and implanted into the first portion 116a of the second-type semiconductor layer 116 . This design can reduce the non-luminescent radiation combination of electrons and holes near the sidewall of the light-emitting layer 114 , can improve the external quantum efficiency, and can effectively improve the sidewall dangling bonds caused by dry etching, thereby improving the miniaturization of the present embodiment. The luminous efficiency of the light emitting diode 100a.

It must be noted here that the following embodiments use the element numbers and part of the contents of the previous embodiments, wherein the same numbers are used to represent the same or similar elements, and the description of the same technical contents is omitted. For the description of the omitted part, reference may be made to the foregoing embodiments, and repeated descriptions in the following embodiments will not be repeated.

2 is a schematic cross-sectional view of a micro light-emitting diode according to another embodiment of the present invention. Please refer to FIG. 1 and FIG. 2 at the same time, the micro light emitting diode 100b of this embodiment is similar to the micro light emitting diode 100a of FIG. 1, the difference between the two is: in this embodiment, in the cross-sectional view, the right side of the epitaxial structure 110b is The shape of the first ion implantation region P2 and the shape of the first ion implantation region P1 on the left are in a mirror pattern, and the first ion implantation regions P1 and P2 surround the periphery of the first type semiconductor layer 112 and the light emitting layer 114 around and part of the first portion 116a.

In detail, in a cross-sectional view, the first ion implantation region P2 on the right has a first inner side S2 and a first bottom side B2 connected to the first inner side S2. There is a first included angle α2 between the first extending direction D2 of the first inner side S2 of the first ion implantation region P2 and the normal direction N of the light emitting layer 114 , and the absolute value of the first included angle α2 is preferably, Between 0 and 15 degrees. More specifically, the first inner side S1 of the first ion implantation region P1 on the left is disposed on the first portion 116a of the second type semiconductor layer 116 with a slope from the upper left to the lower right, wherein the first included angle α1 is negative 7 degrees to minus 15 degrees. The first ion implantation region P2 on the right is disposed on the first portion 116a of the second type semiconductor layer 116 with a slope from upper right to lower left, wherein the first included angle α2 is preferably positive 7 degrees to positive 15 degrees. At this time, the absolute values of the first included angle α1 and the first included angle α2 are still between 0 and 15 degrees. Here, the first inner side S1 of the first ion implantation region P1 and the first inner side S2 of the first ion implantation region P2 are not parallel and are arranged in mirroring.

3 is a schematic cross-sectional view of a micro light-emitting diode according to another embodiment of the present invention. Please refer to FIG. 1 and FIG. 3 at the same time, the micro light emitting diode 100c of this embodiment is similar to the micro light emitting diode 100a of FIG. 1, the difference between the two is: in this embodiment, in the cross-sectional view, the first ion implantation region P3 The angle of the first included angle α3 is different from the angle of the first included angle α1 of the first ion implantation region P1, and the epitaxial structure 110c also has second ion implantation regions P4 and P5. Here, the first ion is different from the second ion, wherein the first ion is eg krypton, argon or arsenic, and the second ion is eg phosphorous or arsenic.

In detail, the first ion implantation region P3 has a first inner side S3 and a first bottom side B3 connected to the first inner side S3. There is a first included angle α3 between the first extending direction D3 of the first inner side S3 of the first ion implantation region P3 and the normal direction N of the light emitting layer 114 , and the absolute value of the first included angle α3 is preferably between between 0 and 5 degrees. Here, the first ion implantation region P3 is implanted into the first portion 116a of the second-type semiconductor layer 116 in an implantation direction from upper left to lower right, wherein the first included angle α3 is 0 to minus 5 degrees.

Furthermore, in a cross-sectional view, the second ion implantation region P4 on the left and the second ion implantation region P5 on the right have second inner sides S4 and S5 and a second bottom side connecting the second inner sides S4 and S5, respectively. B4, B5. There is a third distance H3 between the surface 113 of the first type semiconductor layer 112 and the second bottom sides B4 and B5 of the second ion implantation regions P4 and P5 (ie, the depth of the second ion implantation regions P4 and P5 ), and The third distance H3 is smaller than the first distance H1. Here, the second bottom sides B4 and B5 of the second ion implantation regions P4 and P5 are located in the first type semiconductor layer 112 and surround a part of the first type semiconductor layer 112 , which means the second ion implantation regions P4 and P5 The depth of P5 does not exceed the depth of the light emitting layer 114 . As shown in FIG. 3 , there are second included angles α4 and α5 between the second extending directions D4 and D5 of the second inner sides S4 and S5 of the second ion implantation regions P4 and P5 and the normal direction N of the light emitting layer 114 . The absolute values of the second included angles α4 and α5 are preferably between 7 degrees and 15 degrees.

More specifically, in a cross-sectional view, the second ion implantation region P4 on the left is implanted into the first-type semiconductor layer 112 in an implantation direction from upper left to lower right, wherein the second angle α4 is negative 7 degrees to minus 15 degrees. The second ion implantation region P5 on the right is implanted into the first type semiconductor layer 112 in the implantation direction from the upper right to the lower left, wherein the second included angle α5 is positive 7 degrees to positive 15 degrees. In particular, the ion concentrations of the second ion implantation regions P4 and P5 are greater than the ion concentration of the first ion implantation region P3. That is, the implantation angle is large, and the depth is shallow (ie, not exceeding the light-emitting layer 114); the implantation angle is small, and the depth is deep (ie, exceeding the light-emitting layer 114, but not exceeding the height H of the platform M). Here, part of the first ion implantation region P3 overlaps with the second ion implantation regions P4 and P5.

In short, in this embodiment, high-resistance regions (ie, the second ion implantation regions P4 and P5 ) are firstly formed in the first-type semiconductor layer 112 to reduce the generation and passage of carriers, and then the second-type semiconductor layer 112 is The first portion 116a of the semiconductor layer 116 forms the first ion implantation region P3 to destroy the electron-hole recombination at the edge of the light-emitting layer 114, and the resistance value is high enough and the surface damage is small.

4 is a schematic cross-sectional view of a micro light-emitting diode according to another embodiment of the present invention. Please refer to FIG. 1 and FIG. 4 at the same time, the micro light emitting diode 100d of this embodiment is similar to the micro light emitting diode 100a of FIG. 1, the difference between the two is: in this embodiment, in the cross-sectional view, the first ion implantation region P6 The shape of P7 is different from the shape of the first ion implantation region P1, and the epitaxial structure 110d also has second ion implantation regions P8 and P9.

In detail, in a cross-sectional view, the first ion implantation regions P6 and P7 have first inner sides S6 and S7 and first bottom sides B6 and B7 connecting the first inner sides S6 and S7 . There are first included angles α6 and α7 between the first extending directions D6 and D7 of the first inner sides S6 and S7 of the first ion implantation regions P6 and P7 and the normal direction N of the light emitting layer 114 , and the first included angle α6 , the absolute value of α7, preferably, between 7 and 15 degrees. The first bottom sides B6 and B7 of the first ion implantation regions P6 and P7 are located in the light emitting layer 114 , and the first ion implantation regions P6 and P7 surround the first type semiconductor layer 112 and the light emitting layer 114 . Here, the first ion implantation region P6 on the left is implanted into the light emitting layer 114 in an implantation direction from upper left to lower right, wherein the first included angle α3 is minus 7 to minus 15 degrees. The first ion implantation region P7 on the right is implanted into the light-emitting layer 114 in the implantation direction from the upper right to the lower left, wherein the first included angle α7 is positive 7 to positive 15 degrees. There is a second distance H4 between the surface 113 of the first type semiconductor layer 112 and the first bottom sides B6 and B7 of the first ion implantation regions P6 and P7 , wherein the second distance H4 is greater than the first distance H1 and less than the plateau M. height H.

Furthermore, the second ion implantation regions P8 and P9 have second inner sides S8 and S9 and second bottom sides B8 and B9 connecting the second inner sides S8 and S9 . There is a third distance H5 between the surface 113 of the first type semiconductor layer 112 and the second bottom sides B8 and B9 of the second ion implantation regions P8 and P9 , and the third distance H5 is smaller than the first distance H1 . More specifically, the second ion implantation regions P8 and P9 are located on the second bottom sides B8 and B9 in the first-type semiconductor layer 112 and surround a part of the first-type semiconductor layer 112 . There are second included angles α8 and α9 between the second extending directions D8 and D9 of the second inner sides S8 and S9 of the second ion implantation regions P8 and P9 and the normal direction N of the light emitting layer 114 , and the second included angle α8 , the absolute value of α9, preferably, between 0 degrees and 5 degrees. Here, the second ion implantation region P8 on the left is implanted into the first-type semiconductor layer 112 in an implantation direction from upper left to lower right, wherein the second included angle α8 is 0 to minus 5 degrees. The second ion implantation region P9 on the right is implanted into the first-type semiconductor layer 112 in an implantation direction from upper right to lower left, wherein the second included angle α9 is 0 to plus 5 degrees. In particular, the ion concentrations of the second ion implantation regions P8 and P9 are greater than the ion concentrations of the first ion implantation regions P6 and P7. That is, the implantation angle is large and the depth is relatively deep (ie, it exceeds the light-emitting layer 114, but does not exceed the height H of the platform M); the implantation angle is small, and the depth is shallower (ie, does not exceed the light-emitting layer 114). Here, the first ion implantation region P6 on the left has a partial area overlapping with the second ion implantation region P8 on the left, and the first ion implantation region P7 on the right has a partial area with the second ion implantation region on the right The implantation area P9 overlapped.

In short, in this embodiment, high-resistance regions (ie, the second ion implantation regions P8 and P9 ) are firstly formed in the first-type semiconductor layer 112 to reduce the generation and passage of carriers, and then the light-emitting layer 114 is formed. The first ion implantation regions P6 and P7 are formed to destroy the electron-hole recombination at the edge of the light-emitting layer 114 , so that the resistance value is high enough and the surface damage is small.

FIG. 5 is a partial top schematic view of a miniature light emitting diode display panel according to an embodiment of the present invention. Referring to FIG. 5 , in this embodiment, the micro LED display panel 10 includes a substrate 20 and the above-mentioned plurality of micro LEDs 100 . The miniature light-emitting diode 100 is selected from the miniature light-emitting diodes 100a, 100b, 100c, and 100d in the above embodiments. Preferably, the micro LED 100 includes a red micro LED R emitting red light, a green micro LED G emitting green light, and a blue micro LED B emitting blue light. In detail, the substrate 20 includes the control element 30 and a plurality of pixels U. The array of micro light-emitting diodes 100 is disposed on the substrate 20 to form the pixel U and is electrically connected to the control element 30 . The control elements 30 respectively control the micro LEDs 100 to emit light to form a display screen.

To sum up, in the design of the miniature light emitting diode of the present invention, the epitaxial structure has the first ion implantation region, and the space between the surface of the first type semiconductor layer and the first bottom side of the first ion implantation region is The second distance is greater than the first distance between the surface of the first-type semiconductor layer and the top surface of the adjacent surface of the light-emitting layer and is less than the height of the platform, and the first extension direction of the first inner side of the first ion implantation region and the light-emitting layer There is a first angle between the normal directions of 0 and 15 degrees in absolute value. That is, the depth of the first ion implantation region of the present invention exceeds the depth of the light-emitting layer, and the absolute value of the implantation angle of the first ion implantation region is between 0 and 15 degrees. This design can reduce the problem that the external quantum efficiency of the sidewall of the miniature light-emitting diode is greatly reduced due to the combination of non-luminescent radiation, can improve the external quantum efficiency, and can effectively improve the sidewall dangling bonds caused by dry etching, thereby improving the present invention. luminous efficiency of miniature light-emitting diodes.

Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, but not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: The technical solutions described in the foregoing embodiments can still be modified, or some or all of the technical features thereof can be equivalently replaced; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the technical solutions of the embodiments of the present invention. scope.

Claims (16)

1. A micro light emitting diode, comprising:

an epitaxial structure including a first type semiconductor layer, a light emitting layer and a second type semiconductor layer, and having a first ion implantation region, the light emitting layer being located between the first type semiconductor layer and the second type semiconductor layer, the first type semiconductor layer, the light emitting layer and a first portion of the second type semiconductor layer constituting a mesa, a second portion of the second type semiconductor layer forming a recess with respect to the mesa, the first ion implantation region having a first inner side and a first bottom side connecting the first inner side, a first distance between a surface of the first type semiconductor layer and a top surface of the light emitting layer adjacent to the surface, a second distance between the surface of the first type semiconductor layer and the first bottom side of the first ion implantation region, wherein the second distance is greater than the first distance and less than a height of the mesa, a first included angle is formed between a first extending direction of the first inner side of the first ion implantation area and a normal direction of the light emitting layer, and the absolute value of the first included angle is between 0 and 15 degrees; and

And the insulating layer is arranged on the epitaxial structure and covers the periphery of the first type semiconductor layer, part of the surface, the periphery of the light emitting layer and part of the periphery of the second type semiconductor layer.

2. The led of claim 1, wherein the insulating layer contacts and encapsulates sidewalls of the mesa, and the mesa is proximate to the recess.

3. The micro light-emitting diode of claim 1, further comprising:

a current distribution layer disposed between the insulating layer and the first type semiconductor layer, wherein an orthographic projection of the current distribution layer on the surface of the first type semiconductor layer is smaller than the surface.

4. The micro light-emitting diode of claim 3, wherein the current distribution layer is made of indium tin oxide, indium oxide, tin oxide, aluminum zinc oxide, cadmium tin oxide, antimony tin oxide, zinc oxide, or a combination thereof.

5. The micro light-emitting diode of claim 1, further comprising:

the first electrode is electrically connected with the first type semiconductor layer; and

and the second electrode is electrically connected with the second type semiconductor layer, wherein the first electrode and part of the second electrode are positioned on the same plane.

6. The micro light-emitting diode of claim 5, further comprising:

a current distribution layer disposed between the insulating layer and the first type semiconductor layer, and an orthographic projection of the current distribution layer on the surface of the first type semiconductor layer is smaller than the surface, wherein the insulating layer has a first opening exposing the current distribution layer and a second opening exposing the second portion of the second type semiconductor layer, the first opening is located on the platform, and the second opening is located in the recess, the first electrode is disposed in the first opening and extends onto the insulating layer, the second electrode is disposed on the insulating layer and extends into the second opening.

7. The micro light-emitting diode of claim 1, wherein the first bottom side of the first ion implantation region is located within the first portion of the second type semiconductor layer, and the first ion implantation region surrounds the first type semiconductor layer, the light-emitting layer, and a portion of the first portion.

8. The led of claim 1, wherein the absolute value of the first angle is between 7 and 15 degrees.

9. The led of claim 1, wherein the epitaxial structure further comprises a second ion implantation region having a second inner side and a second bottom side connecting the second inner side, wherein a third distance is provided between the surface of the first type semiconductor layer and the second bottom side of the second ion implantation region, and the third distance is smaller than the first distance.

10. The micro light-emitting diode of claim 9, wherein the second bottom side of the second ion implantation region is located in the first type semiconductor layer and surrounds a portion of the first type semiconductor layer, a second extending direction of the second inner side of the second ion implantation region has a second included angle with the normal direction of the light-emitting layer, and an absolute value of the second included angle is greater than an absolute value of the first included angle.

11. The led of claim 10, wherein the second ion implantation zone has an ion concentration greater than that of the first ion implantation zone.

12. The micro light-emitting diode of claim 1, wherein the first bottom side of the first ion implantation region is located within the light-emitting layer, and the first ion implantation region surrounds the first type semiconductor layer and the light-emitting layer.

13. The micro light-emitting diode of claim 1, wherein the second distance is greater than 0.7 microns and less than 1 micron.

14. The micro light-emitting diode of claim 1, wherein the periphery of the light-emitting layer directly contacts the insulating layer.

15. A micro light emitting diode display panel, comprising:

a substrate having a control element; and

a plurality of micro light emitting diodes, the array is arranged on the substrate to form a plurality of pixels and is electrically connected with the control element, the control element respectively controls the plurality of micro light emitting diodes to emit light, wherein each of the plurality of micro light emitting diodes comprises:

an epitaxial structure including a first type semiconductor layer, a light emitting layer and a second type semiconductor layer, and having a first ion implantation region, the light emitting layer being located between the first type semiconductor layer and the second type semiconductor layer, the first type semiconductor layer, the light emitting layer and a first portion of the second type semiconductor layer constituting a mesa, a second portion of the second type semiconductor layer forming a recess with respect to the mesa, the first ion implantation region having a first inner side and a first bottom side connecting the first inner side, a first distance between a surface of the first type semiconductor layer and a top surface of the light emitting layer adjacent to the surface, a second distance between the surface of the first type semiconductor layer and the first bottom side of the first ion implantation region, wherein the second distance is greater than the first distance and less than a height of the mesa, a first included angle is formed between a first extending direction of the first inner side of the first ion implantation area and a normal direction of the light emitting layer, and the absolute value of the first included angle is between 0 and 15 degrees; and

And the insulating layer is arranged on the epitaxial structure and covers the periphery of the first type semiconductor layer, part of the surface, the periphery of the light emitting layer and part of the periphery of the second type semiconductor layer.

16. The micro light-emitting diode display panel of claim 15, wherein the plurality of micro light-emitting diodes comprise red micro light-emitting diodes that emit red light, green micro light-emitting diodes that emit green light, and blue micro light-emitting diodes that emit blue light.

Images