CN110993684A - High-power GaN quasi-vertical Schottky diode based on annular nesting of cathode and anode and preparation method thereof - Google Patents

High-power GaN quasi-vertical Schottky diode based on annular nesting of cathode and anode and preparation method thereof Download PDF

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CN110993684A
CN110993684A CN201911169340.6A CN201911169340A CN110993684A CN 110993684 A CN110993684 A CN 110993684A CN 201911169340 A CN201911169340 A CN 201911169340A CN 110993684 A CN110993684 A CN 110993684A
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anode
type gan
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metal
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赵胜雷
刘俊伟
张进成
陈大正
朱家铎
朱卫东
刘志宏
许晟瑞
郝跃
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Xidian University
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/20Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/23Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D8/00Diodes
    • H10D8/01Manufacture or treatment
    • H10D8/051Manufacture or treatment of Schottky diodes
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    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
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Abstract

本发明公开了基于阴阳极环形嵌套的大功率GaN准垂直肖特基二极管及其制备方法,主要解决目前GaN准垂直肖特基二极管输出功率无法满足更高功率需求的问题。其自下而上包括:衬底(1)、成核层(2)、缓冲层(3)和n+型GaN层(4),n+型GaN层(4)的上部设有n‑型GaN层(5)和阴极(6),n‑型GaN层(5)的上部设有阳极(7),该阴极和阳极采用环形嵌套结构,即阳极是以实心圆为中心,外部分布多个开口圆环的同心结构;阴极是分布在阳极环之间的多个开口圆环,形成阳极环与阴极环的同心环形交替嵌套结构。本发明降低了电场的边缘效应,提高了GaN准垂直二极管输出功率密度,可用于限幅器、微波整流和功率开关电路。

Figure 201911169340

The invention discloses a high-power GaN quasi-vertical Schottky diode based on annular nesting of cathodes and anodes and a preparation method thereof, and mainly solves the problem that the output power of the current GaN quasi-vertical Schottky diode cannot meet higher power requirements. It comprises from bottom to top: a substrate (1), a nucleation layer (2), a buffer layer (3) and an n+-type GaN layer (4), and an n-type GaN layer is provided on the upper part of the n+-type GaN layer (4). (5) and the cathode (6), the upper part of the n-type GaN layer (5) is provided with an anode (7), and the cathode and the anode adopt an annular nested structure, that is, the anode is centered on a solid circle, and a plurality of openings are distributed outside The concentric structure of the rings; the cathode is a plurality of open rings distributed between the anode rings, forming a concentric annular alternating nested structure of the anode rings and the cathode rings. The invention reduces the edge effect of the electric field, improves the output power density of the GaN quasi-vertical diode, and can be used for limiters, microwave rectifiers and power switch circuits.

Figure 201911169340

Description

High-power GaN quasi-vertical Schottky diode based on cathode and anode annular nesting and preparation method thereof
Technical Field
The invention belongs to the technical field of microelectronics, and particularly relates to a GaN Schottky diode device which can be used for amplitude limiters, microwave rectification and power switch circuits.
Technical Field
The device based on traditional semiconductor materials such as Si, GaAs and the like is limited by the properties of the materials, so that the device indexes such as power, breakdown voltage resistance and the like are difficult to improve. In recent years, a new generation of wide bandgap semiconductor material represented by group III nitride is developed rapidly, has the advantages of wide band gap, high saturated electron drift velocity, high critical breakdown field strength, high thermal conductivity and stable chemical properties, and has great development potential in the field of millimeter wave and submillimeter wave high-power electronic devices. The GaN material is taken as a typical representative of wide-bandgap semiconductor materials, is very suitable for preparing high-temperature, anti-radiation, high-working-frequency and high-power devices, is widely applied in the fields of aerospace, radar, communication and the like, and the research of the power electronic devices based on the GaN material is one of the international hotspots at present.
Among various power electronic devices based on GaN materials, GaN schottky diodes have received much attention in recent years due to their superior characteristics. The quasi-vertical annular GaN Schottky diode device is shown in figure 1 and comprises a substrate, a nucleating layer, a buffer layer, an n + type GaN layer and an n-type GaN layer from bottom to top, wherein a cathode is arranged on the n + type GaN layer, and an anode is arranged on the n-type GaN layer. The GaN Schottky diode has the excellent characteristics of low on-resistance, high breakdown voltage, small reverse recovery time and the like, so that the GaN Schottky diode is widely applied to amplitude limiters, microwave rectification and power switch circuits. As the demand for output power of power electronic devices becomes higher and higher, the radius of the anode is generally made larger in order to increase the output current. However, since the conventional annular metal electrode of the current quasi-vertical schottky diode has an edge effect, the current density exponentially attenuates from the edge of the anode to the center as the distance increases, and the current is concentrated on the edge of the anode metal, so that most areas of the anode metal contribute little to the output current, that is, the characteristic on-resistance of the device is increased, the output power of the device is limited, most areas of the anode are wasted, the output current density of the device is reduced, and the application of the diode device in a higher-power microwave rectification and power switching circuit is difficult to satisfy.
Disclosure of Invention
The invention aims to provide a high-power GaN quasi-vertical Schottky diode based on cathode and anode annular nesting and a preparation method thereof aiming at the defects of the GaN quasi-vertical Schottky diode device, so that the area utilization rate of anode metal is improved, the output current density of the device is increased, the output power of the device is improved, and the application of the diode device in higher-power microwave rectification and power switch circuits is met.
The technical scheme for realizing the purpose of the invention is as follows:
the utility model provides a based on nested high-power gaN quasi-vertical schottky diode of negative and positive pole annular, includes from bottom to top: substrate, nucleation layer, buffer layer and n + type GaN layer, the upper portion on n + type GaN layer is equipped with n-type GaN layer and negative pole, and the upper portion on n-type GaN layer is equipped with the positive pole, its characterized in that:
the anode is a concentric structure with a solid circle as the center and a plurality of open circular rings distributed outside; the cathode is a plurality of open circular rings distributed among the anode rings to form a concentric ring-shaped alternate nested structure of the anode rings and the cathode rings;
the distance between the concentric opening rings of each cathode is 7-40 μm, the width of each concentric opening ring is 1-10 μm, and the number of the opening rings is more than or equal to 2; the radius of the central solid circle of each anode is 0.5-10 μm, the distance between the concentric open circles is 7-40 μm, the width of the concentric open circles is 1-10 μm, and the sum of the numbers of the central solid circles and the open circles is more than or equal to 2.
Further, the substrate is one of sapphire, SiC, Si, diamond and GaN.
Further, the nucleation layer is one of AlN and AlGaN.
Further, the buffer layer is one of GaN, AlGaN, and InGaN.
Furthermore, the doping concentration of the n + type GaN layer is 1 multiplied by 1017cm-3-1×1020cm-3The thickness is 100 nm-5 μm.
Further, the doping concentration of the n-type GaN layer is 1 multiplied by 1014cm-3-1×1018cm-3The thickness is 100 nm-20 μm.
Furthermore, the metal adopted by the cathode is Ti/Al/Ni/Au or Ti/Al/Pt/Au or Ti/Al/Ti/Au or Ta/Al/Ta, and the thickness of the metal is 25 nm-500 nm.
Furthermore, the metal adopted by the anode is Ni/Au or W/Au or Mo/Au or Ni/Au/Ni or Pt/Au or Pd/Au, and the metal thickness is 20 nm-1300 nm.
The manufacturing method of the high-power GaN quasi-vertical Schottky diode based on cathode and anode annular nesting is characterized by comprising the following steps of:
1) sequentially carrying out ultrasonic cleaning on an epitaxial wafer comprising a substrate, a nucleating layer, a buffer layer, an n + type GaN layer and an n-type GaN layer from bottom to top for 5min by using acetone, isopropanol and deionized water;
2) photoetching is carried out on the cleaned epitaxial wafer to obtain a cathode groove pattern with a plurality of opening concentric rings; etching and removing the n-type GaN in the pattern area by RIE or ICP etching equipment to obtain a cathode groove; then the etched epitaxial wafer is placed in an RTP rapid thermal annealing furnace in N2Annealing in an atmosphere at a low temperature of 400-500 deg.CAnnealing for 5min to repair etching damage;
3) manufacturing a cathode:
3a) carrying out cathode photoetching on the epitaxial wafer subjected to low-temperature annealing to obtain a cathode pattern which is provided with a plurality of opening concentric rings and is positioned in the cathode groove;
3b) adopting electron beam evaporation or sputtering to prepare cathode metal on the epitaxial wafer after finishing cathode pattern photoetching at the speed of 0.1-0.3nm/s by adopting Ti/Al/Ni/Au or Ti/Al/Pt/Au or Ti/Al/Ti/Au or Ta/Al/Ta, wherein the thickness of the cathode metal is 25 nm-500 nm;
3c) stripping after the cathode metal is manufactured, removing metal in a region except the cathode pattern on the epitaxial wafer, and annealing by using an RTP (rapid thermal annealing) furnace to enable the cathode metal to form ohmic contact with the n + type GaN layer to obtain a cathode;
4) manufacturing an anode:
4a) carrying out anode photoetching on the epitaxial wafer with the cathode manufactured to obtain an anode pattern of a concentric structure with a solid circle as the center and a plurality of open circular rings distributed outside;
4b) adopting electron beam evaporation or sputtering to manufacture anode metal on the epitaxial wafer after the anode pattern photoetching is finished at the speed of 0.1-0.3nm/s, wherein the anode metal adopts Ni/Au or W/Au or Mo/Au or Ni/Au/Ni or Pt/Au or Pd/Au, and the thickness of the anode metal is 15 nm-1300 nm;
4c) and stripping after the anode metal is manufactured, removing the metal in the area except the anode pattern on the epitaxial wafer to obtain an anode, and finishing the manufacture of the device.
Compared with the conventional annular quasi-vertical GaN Schottky diode, the invention has the following beneficial effects:
1. the invention adopts a multilayer annular structure, thereby reducing the influence of edge effect, improving the current density of the anode and meeting the requirements of high-power devices.
2. The invention adopts the multilayer annular structure, thus improving the area utilization rate of the anode, reducing the occupied area of the device and the size of the device under the same output power, and further reducing the production cost.
3. The invention has simple manufacturing process and high yield.
Drawings
Fig. 1 is a schematic structural diagram of a conventional ring-shaped GaN quasi-vertical schottky diode device;
fig. 2 is a schematic structural diagram of a GaN schottky diode device according to the present invention;
fig. 3 is a top view of a GaN schottky diode device of the present invention;
fig. 4 is a schematic flow chart of the GaN schottky diode manufacturing method of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings.
Referring to fig. 2 and 3, the invention is based on a cathode and anode annular nested high-power GaN quasi-vertical schottky diode, which comprises from bottom to top: the solar cell comprises a substrate 1, a nucleating layer 2, a buffer layer 3 and an n + type GaN layer 4, wherein the upper part of the n + type GaN layer 4 is provided with an n-type GaN layer 5 and a cathode 6, the upper part of the n-type GaN layer 5 is provided with an anode 7, the anode 7 is a concentric structure taking a solid circle as a center and distributed with a plurality of open circular rings outside; the cathode 6 is a plurality of open circular rings distributed between the anode rings to form a concentric ring-shaped alternate nested structure of anode rings and cathode rings. Wherein:
the distance between the concentric opening rings of each cathode 6 is 7-40 μm, the width of each concentric opening ring is 1-10 μm, the number of the opening rings is greater than or equal to 2, the value of the example is 2, but not limited to the number of the opening rings is 2, the metal adopted by the cathode 6 is Ti/Al/Ni/Au or Ti/Al/Pt/Au or Ti/Al/Au or Ta/Al/Ta, and the thickness of the cathode metal is 25-500 nm;
the radius of the central solid circle of each anode 7 is 0.5-10 μm, the distance between the concentric open circles is 7-40 μm, the width of the concentric open circles is 1-10 μm, and the sum of the numbers of the central solid circles and the open circles is greater than or equal to 2, and the value of the example is 2, but not limited to 2. The metal adopted by the anode 7 is Ni/Au or W/Au or Mo/Au or Ni/Au/Ni or Pt/Au or Pd/Au, and the thickness of the anode metal is 15 nm-1300 nm;
the substrate 1 adopts one of sapphire, SiC, Si, diamond and GaN;
the nucleating layer 2 adopts AlN or AlGaN;
the buffer layer 3 adopts one of GaN, AlGaN and InGaN;
the doping concentration of the n + -type GaN layer 4 was 1X 1017cm-3-1×1020cm-3The thickness is 100 nm-5 mu m;
the doping concentration of the n-type GaN layer 5 is 1X 1014cm-3-1×1018cm-3The thickness is 100 nm-20 μm.
Referring to fig. 4, the method for preparing a high-power GaN quasi-vertical schottky diode based on cathode and anode ring nesting of the invention provides the following three examples.
In example 1, a GaN schottky diode was fabricated in which the cathode had a concentric open ring pitch of 7 μm and a concentric open ring width of 1 μm, the anode had a central solid ring radius of 0.5 μm, a concentric open ring pitch of 7 μm, and a concentric open ring width of 1 μm.
Step 1: and cleaning the epitaxial wafer.
1.1) selecting a sapphire substrate, an AlN nucleating layer, a GaN buffer layer and a doping concentration of 1 multiplied by 10 from bottom to top17cm-3An n + type GaN layer with a thickness of 100nm and a doping concentration of 1 × 1014cm-3And an n-type GaN layer with a thickness of 100nm, as shown in FIG. 4 (a);
1.2) ultrasonically cleaning the selected epitaxial wafer for 5min by using acetone, ultrasonically cleaning the selected epitaxial wafer for 5min by using isopropanol, ultrasonically cleaning the selected epitaxial wafer for 5min by using deionized water, and blow-drying water drops on the surface of the epitaxial wafer by using high-purity nitrogen.
Step 2: a cathode recess was made as shown in fig. 4 (b).
2.1) photoetching is carried out on the cleaned epitaxial wafer to obtain a cathode groove pattern with a plurality of opening concentric rings;
2.2) placing the photoetched epitaxial wafer into an etching cavity of RIE etching equipment, and simultaneously introducing Cl with the flow of 10sccm2And BCl at a flow rate of 20sccm3Etching to remove the n-type GaN in the pattern region to obtain a cathode groove;
2.3) placing the etched epitaxial wafer in an RTP rapid thermal annealing furnace, and introducing N into the annealing furnace2And annealing at the low temperature of 400 ℃ for 5min to repair the etching damage.
And step 3: the cathode was fabricated as shown in FIG. 4 (c).
3.1) carrying out cathode photoetching on the epitaxial wafer subjected to low-temperature annealing to obtain a cathode pattern which is provided with a plurality of opening concentric rings and is positioned in the cathode groove, wherein the interval of the concentric opening rings of the cathode is 7 mu m, the width of the concentric opening rings is 1 mu m, and the number of the opening rings is 2;
3.2) preparing Ti/Al/Ni/Au cathode metals with the thickness of 5/10/5/5nm on the epitaxial wafer after the cathode pattern photoetching is finished at the evaporation rate of 0.1nm/s by using electron beam evaporation;
3.3) stripping the evaporated cathode metal, removing the metal in the region except the cathode pattern on the epitaxial wafer, and annealing the stripped epitaxial wafer by using an RTP rapid thermal annealing furnace, namely introducing N into the annealing furnace2And annealing at 900 ℃ for 30s to enable the cathode metal after annealing to form ohmic contact with the n + type GaN layer, and obtaining the cathode.
And 4, step 4: an anode was fabricated as shown in FIG. 4 (d).
4.1) carrying out anode photoetching on the epitaxial wafer with the finished cathode manufacturing to obtain an anode pattern of a concentric structure with a solid circle as the center and a plurality of opening circular rings distributed outside, wherein the radius of the central solid circle of the anode is 0.5 mu m, the distance between the concentric opening circular rings is 7 mu m, the width of the concentric opening circular rings is 1 mu m, and the sum of the number of the central solid circle and the number of the opening circular rings is 2;
4.2) adopting electron beam evaporation to manufacture Ni/Au anode metals with the thickness of 5/10nm on the epitaxial wafer after the anode pattern photoetching is finished at the evaporation rate of 0.1 nm/s;
and 4.3) stripping the anode after metal evaporation is finished, removing the metal in the region except the anode pattern on the epitaxial wafer to obtain the anode, and finishing the manufacture of the device.
In example 2, a GaN schottky diode was fabricated in which the cathode had a concentric open ring pitch of 25 μm, a concentric open ring width of 5 μm, the anode had a central solid ring radius of 5 μm, a concentric open ring pitch of 25 μm, and a concentric open ring width of 10 μm.
The method comprises the following steps: and cleaning the epitaxial wafer.
Selecting SiC substrate and Al from bottom to top0.90Ga0.10N nucleation layer, Al0.05Ga0.95N buffer layer with doping concentration of 1 × 1019cm-3An n + type GaN layer with a thickness of 2.5 μm and a doping concentration of 1 × 1016cm-3And an epitaxial wafer with an n-type GaN layer having a thickness of 10 μm, as shown in fig. 4(a), the selected epitaxial wafer is ultrasonically cleaned for 5min by acetone, then ultrasonically cleaned for 5min by isopropanol, then ultrasonically cleaned for 5min by deionized water, and finally water drops on the surface of the epitaxial wafer are blown dry by high-purity nitrogen.
Step two: a cathode recess was made as shown in fig. 4 (b).
Photoetching is carried out on the cleaned epitaxial wafer to obtain a cathode groove pattern with a plurality of opening concentric rings; then the epitaxial wafer after photoetching is placed into an etching cavity of ICP etching equipment, and Cl with the flow of 10sccm is introduced into the etching cavity2And BCl at a flow rate of 20sccm3Etching to remove the n-type GaN in the pattern region to obtain a cathode groove; then placing the etched epitaxial wafer in an RTP rapid thermal annealing furnace, and introducing N into the annealing furnace2And annealing at the low temperature of 450 ℃ for 5min to repair the etching damage.
Step three: the cathode was fabricated as shown in FIG. 4 (c).
Firstly, carrying out cathode photoetching on an epitaxial wafer subjected to low-temperature annealing to obtain a cathode pattern which is provided with a plurality of opening concentric rings and is positioned in a cathode groove, wherein the distance between the concentric opening rings of the cathode is 25 mu m, the width of the concentric opening rings is 5 mu m, and the number of the opening rings is 10;
then, sputtering is used for manufacturing Ti/Al/Pt/Au cathode metals with the thickness of 20/120/40/50nm on the epitaxial wafer after the cathode pattern photoetching is finished at the speed of 0.2 nm/s;
finally, stripping after the cathode metal evaporation is finished, removing the metal in the region except the cathode pattern on the epitaxial wafer, and using an RTP rapid thermal annealing furnace to strip the stripped epitaxial waferAnnealing, namely introducing N into an annealing furnace2And annealing at 800 ℃ for 45s to enable the annealed cathode metal and the n + type GaN layer to form ohmic contact, thereby obtaining the cathode.
Step four: an anode was fabricated as shown in FIG. 4 (d).
Firstly, carrying out anode photoetching on an epitaxial wafer with a finished cathode to obtain an anode pattern of a concentric structure with a solid circle as the center and a plurality of opening rings distributed outside, wherein the radius of the central solid circle of the anode is 5 mu m, the distance between the concentric opening rings is 25 mu m, the width of the concentric opening rings is 5 mu m, and the sum of the number of the central solid circle and the number of the opening rings is 10;
then, adopting sputtering to manufacture W/Au anode metal with the thickness of 200/450nm on the epitaxial wafer after finishing the anode pattern photoetching at the speed of 0.2 nm/s;
and finally, stripping after the anode metal is evaporated, removing the metal in the region except the anode pattern on the epitaxial wafer to obtain an anode, and finishing the manufacture of the device.
Example 3, a GaN schottky diode was fabricated in which the cathode had a concentric open ring pitch of 40 μm, a concentric open ring width of 10 μm, the anode had a central solid ring radius of 10 μm, a concentric open ring pitch of 40 μm, and a concentric open ring width of 10 μm.
Step A: and cleaning the epitaxial wafer.
A1) Comprises a Si substrate, an AlN nucleating layer and In from bottom to top0.17Ga0.83N buffer layer with doping concentration of 1 × 1020cm-3An n + type GaN layer with a thickness of 5 μm and a doping concentration of 1 × 1018cm-3And an n-type GaN layer with a thickness of 20 μm, as shown in FIG. 4 (a);
A2) and ultrasonically cleaning the epitaxial wafer for 5min by sequentially using acetone, isopropanol and deionized water, and blow-drying water drops on the surface of the epitaxial wafer by using high-purity nitrogen.
And B: a cathode recess was made as shown in fig. 4 (b).
B1) Manufacturing a cathode groove;
the specific implementation of this step is the same as step 2.1) and step 2.2) in example 1;
B2) placing the etched epitaxial wafer in an RTP rapid thermal annealing furnace, and introducing N into the annealing furnace2And annealing at the low temperature of 500 ℃ for 5min to repair the etching damage.
And C: the cathode was fabricated as shown in FIG. 4 (c).
C1) Carrying out cathode photoetching on the epitaxial wafer subjected to low-temperature annealing to obtain a cathode pattern which is provided with a plurality of opening concentric rings and is positioned in the cathode groove, wherein the distance between the concentric opening rings of the cathode is 40 mu m, the width of the concentric opening rings is 10 mu m, and the number of the opening rings is 15;
C2) using electron beam evaporation to manufacture Ta/Al/Ta cathode metals with the thickness of 150/200/150nm on the epitaxial wafer after the cathode pattern photoetching is finished at the evaporation rate of 0.3 nm/s;
C3) stripping after the cathode metal evaporation is finished, removing the metal in the region except the cathode pattern on the epitaxial wafer, and annealing the stripped epitaxial wafer by using an RTP rapid thermal annealing furnace, namely introducing N into the annealing furnace2And annealing at 700 ℃ for 60s to enable the cathode metal after annealing to form ohmic contact with the n + type GaN layer, and obtaining the cathode.
Step D: an anode was fabricated as shown in FIG. 4 (d).
D1) Carrying out anode photoetching on the epitaxial wafer with the cathode manufactured to obtain an anode pattern of a concentric structure with a solid circle as the center and a plurality of opening circular rings distributed outside, wherein the radius of the central solid circle of the anode is 10 mu m, the interval of the concentric opening circular rings is 40 mu m, the width of the concentric opening circular rings is 10 mu m, and the sum of the number of the central solid circle and the number of the opening circular rings is 15;
D2) adopting sputtering to manufacture Mo/Au anode metals with the thickness of 300/1000nm on the epitaxial wafer after the anode pattern photoetching is finished at the speed of 0.3 nm/s;
D3) and stripping after the anode metal is evaporated, removing the metal in the area except the anode pattern on the epitaxial wafer to obtain an anode, and finishing the manufacture of the device.
The above examples only express three embodiments of the present invention, and are not to be construed as limiting the scope of the present invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention.

Claims (9)

1.一种基于阴阳极环形嵌套的大功率GaN准垂直肖特基二极管,自下而上包括:衬底(1)、成核层(2)、缓冲层(3)和n+型GaN层(4),n+型GaN层(4)的上部设有n-型GaN层(5)和阴极(6),n-型GaN层(5)的上部设有阳极(7),其特征在于:1. A high-power GaN quasi-vertical Schottky diode based on annular nesting of cathodes and anodes, comprising from bottom to top: a substrate (1), a nucleation layer (2), a buffer layer (3) and an n+-type GaN layer (4), the upper part of the n+-type GaN layer (4) is provided with an n-type GaN layer (5) and a cathode (6), and the upper part of the n-type GaN layer (5) is provided with an anode (7), characterized in that: 阳极(7)是以实心圆为中心,外部分布多个开口圆环的同心结构;阴极(6)是分布在阳极环之间的多个开口圆环,形成阳极环与阴极环的同心环形交替嵌套结构;The anode (7) is a concentric structure with a solid circle as the center and a plurality of open rings distributed on the outside; the cathode (6) is a plurality of open rings distributed between the anode rings, forming a concentric ring alternating between the anode ring and the cathode ring nested structure; 每个阴极(6)的同心开口圆环间距为7μm-40μm,每个同心开口圆环宽度为1μm-10μm,且开口圆环的数量大于等于2;The spacing of the concentric open rings of each cathode (6) is 7 μm-40 μm, the width of each concentric open ring is 1 μm-10 μm, and the number of the open rings is greater than or equal to 2; 每个阳极(7)的中心实心圆半径为0.5μm-10μm,同心开口圆环间距为7μm-40μm,同心开口圆环宽度为1μm-10μm,且中心实心圆与开口圆环的数量之和大于等于2。The radius of the central solid circle of each anode (7) is 0.5 μm-10 μm, the distance between the concentric open circles is 7 μm-40 μm, the width of the concentric open circles is 1 μm-10 μm, and the sum of the number of the central solid circle and the open circle is greater than equal to 2. 2.根据权利要求1所述的二极管,其特征在于:2. The diode according to claim 1, wherein: 所述的衬底(1)为蓝宝石、SiC、Si、金刚石和GaN中的一种;The substrate (1) is one of sapphire, SiC, Si, diamond and GaN; 所述的成核层(2)为AlN、AlGaN中的一种;The nucleation layer (2) is one of AlN and AlGaN; 所述的缓冲层(3)为GaN、AlGaN和InGaN中的一种。The buffer layer (3) is one of GaN, AlGaN and InGaN. 3.根据权利要求1所述的二极管,其特征在于:所述的n+型GaN层(4)的掺杂浓度为1×1017cm-3-1×1020cm-3,厚度为100nm-5μm。3 . The diode according to claim 1 , wherein the doping concentration of the n+ type GaN layer ( 4 ) is 1×10 17 cm −3 −1×10 20 cm −3 , and the thickness is 100 nm− 5μm. 4.根据权利要求1所述的二极管,其特征在于:所述的n-型GaN层(5)的掺杂浓度为1×1014cm-3-1×1018cm-3,厚度为100nm-20μm。4 . The diode according to claim 1 , wherein the n-type GaN layer ( 5 ) has a doping concentration of 1×10 14 cm −3 to 1×10 18 cm −3 , and a thickness of 100 nm. 5 . -20μm. 5.根据权利要求1所述的二极管,其特征在于:所述的阴极(6),其采用的金属为Ti/Al/Ni/Au或者Ti/Al/Pt/Au或者Ti/Al/Ti/Au或者Ta/Al/Ta,金属厚度为25nm-500nm。5. The diode according to claim 1, characterized in that: the cathode (6) is made of Ti/Al/Ni/Au or Ti/Al/Pt/Au or Ti/Al/Ti/ Au or Ta/Al/Ta, the metal thickness is 25nm-500nm. 6.根据权利要求1所述的二极管,其特征在于:所述的阳极(7),其采用的金属为Ni/Au或者W/Au或者Mo/Au或者Ni/Au/Ni或者Pt/Au或者Pd/Au,金属厚度为15nm-1300nm。6. The diode according to claim 1, wherein the anode (7) is made of Ni/Au or W/Au or Mo/Au or Ni/Au/Ni or Pt/Au or Pd/Au, the metal thickness is 15nm-1300nm. 7.一种基于阴阳极环形嵌套的大功率GaN准垂直肖特基二极管的制备方法,其特征在于包括如下步骤:7. A preparation method of a high-power GaN quasi-vertical Schottky diode based on annular nesting of cathode and anode, is characterized in that comprising the steps: 1)对自下而上包括衬底、成核层、缓冲层、n+型GaN层、n-型GaN层的外延片,依次使用丙酮、异丙醇,去离子水进行5min的超声清洗;1) For the epitaxial wafer including the substrate, the nucleation layer, the buffer layer, the n+-type GaN layer and the n-type GaN layer from bottom to top, use acetone, isopropanol and deionized water successively to carry out ultrasonic cleaning for 5min; 2)在清洗后的外延片上进行光刻,得到具有多个开口同心圆环的阴极凹槽图形,并采用RIE或者ICP刻蚀设备,刻蚀去除图形区域的n-型GaN,获得阴极凹槽;再将刻蚀后的外延片放置在RTP快速热退火炉中,在N2氛围中退火,在400-500℃的低温下,退火5min,修复刻蚀损伤;2) Perform photolithography on the cleaned epitaxial wafer to obtain a cathode groove pattern with a plurality of open concentric rings, and use RIE or ICP etching equipment to etch and remove the n-type GaN in the pattern area to obtain a cathode groove ; Place the etched epitaxial wafer in a RTP rapid thermal annealing furnace, anneal in N 2 atmosphere, and anneal for 5 min at a low temperature of 400-500 ℃ to repair the etching damage; 3)制作阴极:3) Making the cathode: 3a)对完成低温退火的外延片进行阴极光刻,得到具有多个开口同心圆环且位于阴极凹槽中的阴极图形;3a) Cathode lithography is performed on the epitaxial wafer that has been annealed at low temperature to obtain a cathode pattern having a plurality of open concentric rings and located in the cathode groove; 3b)采用电子束蒸发或者溅射以0.1-0.3nm/s的速率在完成阴极图形光刻后的外延片上采用Ti/Al/Ni/Au或者Ti/Al/Pt/Au或者Ti/Al/Ti/Au或者Ta/Al/Ta制作阴极金属,阴极金属厚度为25nm-500nm;3b) Using electron beam evaporation or sputtering to use Ti/Al/Ni/Au or Ti/Al/Pt/Au or Ti/Al/Ti on the epitaxial wafer after cathode pattern lithography at a rate of 0.1-0.3nm/s /Au or Ta/Al/Ta to make cathode metal, the thickness of cathode metal is 25nm-500nm; 3c)在阴极金属制作完成后进行剥离,去除外延片上阴极图形以外区域的金属,并使用RTP快速热退火炉进行退火,使阴极金属与n+型GaN层形成欧姆接触,得到阴极;3c) stripping off the cathode metal after the fabrication is completed, removing the metal outside the cathode pattern on the epitaxial wafer, and annealing with an RTP rapid thermal annealing furnace, so that the cathode metal forms an ohmic contact with the n+-type GaN layer to obtain a cathode; 4)制作阳极:4) Make the anode: 4a)将完成阴极制作的外延片进行阳极光刻,得到以实心圆为中心,外部分布多个开口圆环的同心结构的阳极图形;4a) anodic lithography is performed on the epitaxial wafer that has been fabricated as a cathode to obtain an anode pattern with a concentric structure with a solid circle as the center and a plurality of open rings distributed outside; 4b)采用电子束蒸发或者溅射以0.1-0.3nm/s的速率在完成阳极图形光刻后的外延片上制作阳极金属,阳极金属采用Ni/Au或者W/Au或者Mo/Au或者Ni/Au/Ni或者Pt/Au或者Pd/Au,阳极金属厚度为15nm-1300nm;4b) Using electron beam evaporation or sputtering to make anode metal on the epitaxial wafer after anode pattern lithography at a rate of 0.1-0.3nm/s, the anode metal is Ni/Au or W/Au or Mo/Au or Ni/Au /Ni or Pt/Au or Pd/Au, the thickness of anode metal is 15nm-1300nm; 4c)在阳极金属制作完成后进行剥离,去除外延片上阳极图形以外区域的金属,得到阳极,完成器件制作。4c) peeling off the anode metal after the fabrication is completed, removing the metal in the area other than the anode pattern on the epitaxial wafer, obtaining an anode, and completing the fabrication of the device. 8.根据权利要求7所述的制备方法,其中2)中采用RIE或者ICP刻蚀设备在阴极凹槽图形区域刻蚀去除n-型GaN层,其刻蚀气体使用流量为10sccm的Cl2和流量为20sccm的BCl38. preparation method according to claim 7, wherein adopt RIE or ICP etching equipment in the cathode groove pattern region to etch and remove n-type GaN layer in 2), and its etching gas use flow rate is 10sccm Cl 2 and 8. The flow was 20 seem of BCl3 . 9.根据权利要求7所述的制备方法,步骤3)中使用RTP快速热退火炉退火的工艺条件是:在退火炉中通入N2,并在700℃-900℃的温度范围内退火30s-60s。9 . The preparation method according to claim 7 , the process condition of using RTP rapid thermal annealing furnace for annealing in step 3) is: feeding N 2 into the annealing furnace, and annealing for 30s in the temperature range of 700°C-900°C -60s.
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