CN105047657A - AIO packaged structure and packaging method - Google Patents
AIO packaged structure and packaging method Download PDFInfo
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- CN105047657A CN105047657A CN201510496691.3A CN201510496691A CN105047657A CN 105047657 A CN105047657 A CN 105047657A CN 201510496691 A CN201510496691 A CN 201510496691A CN 105047657 A CN105047657 A CN 105047657A
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/0198—Manufacture or treatment batch processes
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
- H10W70/68—Shapes or dispositions thereof
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/01—Manufacture or treatment
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/541—Dispositions of bond wires
- H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/874—On different surfaces
- H10W72/884—Die-attach connectors and bond wires
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
- H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
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- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
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Abstract
本发明公开了一种AIO封装结构及封装方法,所述AIO封装结构包括:第一封装结构,包括第一基板、安装于第一基板上的若干电子元器件、以及位于第一基板上方且塑封第一基板上若干电子元器件的第一塑封体;第二封装结构,所述第二封装结构位于第一封装结构上方,第二封装结构与第一基板通过第一塑封体无缝塑封,第二封装结构包括第二基板、安装于第二基板上的若干电子元器件,所述第二基板与第一基板电性导通。本发明的AIO通过在第一基板上设置一个或多个第二基板,相邻的基板通过塑封工艺进行塑封,并电性导通所有基板,由于每个基板上均能够安装电容、电阻、芯片等电子元器件,通过堆叠式安装能够减小基板所占的面积,满足了小型化芯片封装的要求。
The invention discloses an AIO packaging structure and a packaging method. The AIO packaging structure includes: a first packaging structure, including a first substrate, a number of electronic components installed on the first substrate, and a plastic package located above the first substrate. The first plastic packaging body of several electronic components on the first substrate; the second packaging structure, the second packaging structure is located above the first packaging structure, the second packaging structure and the first substrate are seamlessly plastic-sealed through the first plastic packaging body, the second packaging structure The second packaging structure includes a second substrate and a number of electronic components mounted on the second substrate, and the second substrate is electrically connected to the first substrate. In the AIO of the present invention, one or more second substrates are arranged on the first substrate, and the adjacent substrates are plastic-sealed through the plastic sealing process, and all the substrates are electrically connected, since capacitors, resistors, and chips can be installed on each substrate. The area occupied by the substrate can be reduced through stacked installation of electronic components such as electronic components, which meets the requirements of miniaturized chip packaging.
Description
技术领域 technical field
本发明涉及IC封装技术领域,尤其涉及一种AIO封装结构及封装方法。 The invention relates to the technical field of IC packaging, in particular to an AIO packaging structure and packaging method.
背景技术 Background technique
随着整个系统功耗、面积、便携性以及功能的要求越来越高,怎样将多个不同功能的电路整合在一起,对芯片的设计、制造以及封装都提出了新的要求。 As the power consumption, area, portability and function requirements of the whole system are getting higher and higher, how to integrate multiple circuits with different functions puts forward new requirements for chip design, manufacturing and packaging.
系统级封装(SIP,SystemInPackage)是指将多个具有不同功能的有源与无源元件,以及诸如微机电系统(MEMS)、光学(Optics)元件等其他元件组合在同一封装中,成为可提供多种功能的单颗标准封装的组件,形成一个系统或子系统。系统级封装产品内大多集成多个芯片、无源元件等,通过引线键合或倒装芯片的方式将芯片的焊盘与基板上的焊盘连接起来,再通过基板上的电路线连接实现整个系统的电气连接,最后利用塑封料工艺将其塑封成一个整体密封产品。 System-in-Package (SIP, SystemInPackage) refers to the combination of multiple active and passive components with different functions, as well as other components such as micro-electromechanical systems (MEMS), optical (Optics) components, etc. A single standard packaged component with multiple functions forms a system or subsystem. Most system-in-package products integrate multiple chips, passive components, etc., and connect the pads of the chips to the pads on the substrate by wire bonding or flip-chip, and then realize the entire process by connecting the circuit wires on the substrate. The electrical connection of the system is finally molded into an integral sealed product by using the molding compound process.
随着小型化的发展,现有的SIP封装结构已经无法满足小型化芯片封装的要求,SIP封装结构中各芯片和元件只能封装于一层SIP基板上,只能从减少芯片和元件个数或减小芯片和元件面积来实现芯片的小型化需求,在芯片和元件个数和元件面积无法缩减时则无法进一步实现芯片的小型化。 With the development of miniaturization, the existing SIP packaging structure can no longer meet the requirements of miniaturized chip packaging. In the SIP packaging structure, each chip and component can only be packaged on one layer of SIP substrate, which can only reduce the number of chips and components. Or reduce the chip and component area to meet the miniaturization requirements of the chip. When the number of chips and components and the component area cannot be reduced, it is impossible to further realize the miniaturization of the chip.
因此,针对上述技术问题,有必要提供一种新的AIO封装结构及封装方法。 Therefore, in view of the above technical problems, it is necessary to provide a new AIO packaging structure and packaging method.
发明内容 Contents of the invention
本发明的目的在于提供一种AIO封装结构及封装方法。 The purpose of the present invention is to provide an AIO packaging structure and packaging method.
为了实现上述目的,本发明实施例提供的技术方案如下: In order to achieve the above object, the technical solutions provided by the embodiments of the present invention are as follows:
一种AIO封装结构,所述AIO封装结构包括: A kind of AIO package structure, described AIO package structure comprises:
第一封装结构,包括第一基板、安装于第一基板上的若干电子元器件、以及位于第一基板上方且塑封第一基板上若干电子元器件的第一塑封体; The first packaging structure includes a first substrate, a plurality of electronic components mounted on the first substrate, and a first plastic package located above the first substrate and plastic-sealed with a plurality of electronic components on the first substrate;
第二封装结构,所述第二封装结构位于第一封装结构上方,第二封装结构与第一基板通过第一塑封体无缝塑封,第二封装结构包括第二基板、安装于第二基板上的若干电子元器件,所述第二基板与第一基板电性导通。 The second packaging structure, the second packaging structure is located above the first packaging structure, the second packaging structure and the first substrate are seamlessly plastic-sealed through the first plastic package, the second packaging structure includes a second substrate, and is installed on the second substrate The second substrate is electrically connected to the first substrate.
作为本发明的进一步改进,所述第二基板上方形成有塑封第二基板上若干电子元器件的第二塑封体。 As a further improvement of the present invention, a second plastic package that plastic-seals several electronic components on the second substrate is formed above the second substrate.
作为本发明的进一步改进,所述第二封装结构为堆叠式结构,由多个第二基板和多个第二塑封体相互堆叠形成,每个第二基板上分别安装有电子元器件,相邻第二基板通过第二塑封体无缝塑封。 As a further improvement of the present invention, the second packaging structure is a stacked structure, which is formed by stacking multiple second substrates and multiple second plastic packages. Electronic components are installed on each second substrate, adjacent to each other. The second substrate is seamlessly plastic-sealed by the second plastic packaging body.
作为本发明的进一步改进,所述第二封装结构中每个第二基板直接或间接与第一基板电性导通。 As a further improvement of the present invention, each second substrate in the second package structure is electrically connected to the first substrate directly or indirectly.
作为本发明的进一步改进,所述第二基板和第一基板或不同的第二基板之间通过金属导电柱电性导通。 As a further improvement of the present invention, the second substrate is electrically connected to the first substrate or different second substrates through metal conductive pillars.
作为本发明的进一步改进,所述AIO封装结构中在第二封装结构的顶部设有盖板。 As a further improvement of the present invention, a cover plate is provided on the top of the second packaging structure in the AIO packaging structure.
作为本发明的进一步改进,所述AIO封装结构中在第二封装结构的顶部设有散热层。 As a further improvement of the present invention, a heat dissipation layer is provided on the top of the second packaging structure in the AIO packaging structure.
作为本发明的进一步改进,所述AIO封装结构的顶部及侧面全部或部分设有金属屏蔽层。 As a further improvement of the present invention, all or part of the top and side surfaces of the AIO packaging structure are provided with a metal shielding layer.
作为本发明的进一步改进,所述电子元器件包括电容、电阻、电感、正装芯片、倒装芯片。 As a further improvement of the present invention, the electronic components include capacitors, resistors, inductors, front-mount chips, and flip-chips.
相应地,一种AIO封装方法,所述方法包括: Correspondingly, a kind of AIO encapsulation method, described method comprises:
提供第一基板,在第一基板上安装若干电子元器件; providing a first substrate, and installing several electronic components on the first substrate;
提供第二基板,将第二基板和安装有若干电子元器件的第一基板进行无缝塑封,在第一基板上方和第二基板之间形成第一塑封体; providing a second substrate, performing seamless plastic sealing on the second substrate and the first substrate on which a plurality of electronic components are installed, and forming a first plastic package above the first substrate and between the second substrate;
电性导通第二基板和第一基板; electrically conducting the second substrate and the first substrate;
在第二基板上安装若干电子元器件; installing a plurality of electronic components on the second substrate;
切割上述封装结构,得到若干AIO封装结构。 Cut the above package structure to obtain several AIO package structures.
作为本发明的进一步改进,所述“在第二基板上安装若干电子元器件”之后还包括: As a further improvement of the present invention, after "mounting several electronic components on the second substrate", it also includes:
对第二基板进行塑封,在第二基板上形成塑封在第二基板上若干电子元器件上的第二塑封体。 The second substrate is plastic-sealed, and a second plastic-sealed body that is plastic-sealed on several electronic components on the second substrate is formed on the second substrate.
作为本发明的进一步改进,所述“对第二基板进行塑封”之后还包括: As a further improvement of the present invention, the "plastic sealing of the second substrate" also includes:
在第二塑封体上形成散热层。 A heat dissipation layer is formed on the second plastic package.
作为本发明的进一步改进,所述“在第二基板上安装若干电子元器件”之后还包括: As a further improvement of the present invention, after "mounting several electronic components on the second substrate", it also includes:
将盖板和安装有若干电子元器件的第二基板进行塑封,在第二基板上方和盖板之间形成第二塑封体。 The cover plate and the second substrate on which several electronic components are installed are plastic-sealed, and a second plastic package is formed above the second substrate and between the cover plate.
作为本发明的进一步改进,所述“在第二基板上安装若干电子元器件”之后还包括: As a further improvement of the present invention, after "mounting several electronic components on the second substrate", it also includes:
提供另一第二基板,将该第二基板塑封在原有封装结构之上,在第二基板之间形成塑封在第二基板上若干电子元器件上的第二塑封体; Another second substrate is provided, the second substrate is plastic-sealed on the original package structure, and a second plastic package is formed between the second substrates and plastic-sealed on several electronic components on the second substrate;
电性导通最上方的第二基板和第一基板; electrically conducting the uppermost second substrate and the first substrate;
在最上方的第二基板上安装若干电子元器件; installing a number of electronic components on the uppermost second substrate;
重复上述步骤,在第一基板上形成堆叠式的第二封装结构。 The above steps are repeated to form a stacked second packaging structure on the first substrate.
作为本发明的进一步改进,所述“在第二基板上安装若干电子元器件”之后还包括: As a further improvement of the present invention, after "mounting several electronic components on the second substrate", it also includes:
提供另一包括至少一个第二基板的封装结构,将该封装结构塑封在原有封装结构之上; providing another package structure including at least one second substrate, and plastic-sealing the package structure on the original package structure;
电性导通两个封装结构; electrically conducting the two package structures;
重复上述步骤,在第一基板上形成堆叠式的若干封装结构。 The above steps are repeated to form several stacked packaging structures on the first substrate.
作为本发明的进一步改进,所述“电性导通”具体为: As a further improvement of the present invention, the "electrical conduction" is specifically:
在第二基板和第一基板、或第二基板与第二基板之间打通孔,并在通孔中灌注金属导电浆,烘烤后形成金属导电柱,所述第二基板与第一基板通过金属导电柱直接或间接电性导通。 Make a through hole between the second substrate and the first substrate, or between the second substrate and the second substrate, and pour metal conductive paste into the through hole, and form a metal conductive column after baking, and the second substrate and the first substrate pass through The metal conductive pillars are electrically connected directly or indirectly.
作为本发明的进一步改进,所述AIO封装方法还包括: As a further improvement of the present invention, the AIO packaging method also includes:
在AIO封装结构中的第一基板和第二基板之间的全部或部分区域形成金属屏蔽层。 A metal shielding layer is formed on all or part of the area between the first substrate and the second substrate in the AIO package structure.
本发明的有益效果是: The beneficial effects of the present invention are:
通过在第一基板上设置一个或多个第二基板,相邻的基板通过塑封工艺进行塑封,并电性导通所有基板,由于每个基板上均能够安装电容、电阻、芯片等电子元器件,通过堆叠式安装能够减小基板所占的面积,满足了小型化芯片封装的要求; By setting one or more second substrates on the first substrate, the adjacent substrates are plastic-sealed through the plastic packaging process, and all the substrates are electrically connected, because electronic components such as capacitors, resistors, and chips can be installed on each substrate , the area occupied by the substrate can be reduced through stacked installation, which meets the requirements of miniaturized chip packaging;
金属导电柱能够电性导通不同的基板,信号在通过金属导电柱在不同基板上进行传输,相较于传统的封装结构,本发明能够缩短信号的传输距离,提高器件的运行速度; The metal conductive pillar can electrically connect different substrates, and the signal is transmitted on different substrates through the metal conductive pillar. Compared with the traditional packaging structure, the present invention can shorten the transmission distance of the signal and improve the operating speed of the device;
该AIO封装结构可以与其他相同或不同的封装结构进行模块化组合安装,形成模块化器件,当器件某一封装结构出现问题时可以进行更换,避免了传统封装结构进行整体更换的问题,大大降低了维护成本。 The AIO packaging structure can be modularly combined with other same or different packaging structures to form a modular device. When there is a problem with a certain packaging structure of the device, it can be replaced, which avoids the problem of overall replacement of the traditional packaging structure and greatly reduces maintenance cost.
附图说明 Description of drawings
为了更清楚地说明本发明实施例或现有技术中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本发明中记载的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。 In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings that need to be used in the description of the embodiments or the prior art. Obviously, the accompanying drawings in the following description are only These are some embodiments described in the present invention. Those skilled in the art can also obtain other drawings based on these drawings without creative work.
图1为本发明实施例一中AIO封装结构的示意图。 FIG. 1 is a schematic diagram of an AIO package structure in Embodiment 1 of the present invention.
图2a~2l为本发明实施例一中AIO封装结构的封装流程图。 2a-2l are the packaging flowcharts of the AIO packaging structure in Embodiment 1 of the present invention.
图3为本发明实施例二中AIO封装结构的示意图。 FIG. 3 is a schematic diagram of an AIO packaging structure in Embodiment 2 of the present invention.
图4a-4c为本发明实施例二中AIO封装结构的封装流程图。 4a-4c are packaging flowcharts of the AIO packaging structure in Embodiment 2 of the present invention.
图5a~5d为本发明实施例四中AIO封装结构的封装流程图。 5a-5d are the packaging flowcharts of the AIO packaging structure in Embodiment 4 of the present invention.
图6为本发明实施例五中AIO封装结构的示意图。 FIG. 6 is a schematic diagram of an AIO packaging structure in Embodiment 5 of the present invention.
图7a、7b为本发明实施例六中AIO封装结构的示意图。 7a and 7b are schematic diagrams of the AIO packaging structure in Embodiment 6 of the present invention.
图8为本发明实施例七中AIO封装结构的示意图。 FIG. 8 is a schematic diagram of an AIO packaging structure in Embodiment 7 of the present invention.
图9a、9b为本发明实施例八中AIO封装结构的示意图。 9a and 9b are schematic diagrams of an AIO packaging structure in Embodiment 8 of the present invention.
图10a、10b为本发明实施例九中AIO封装结构的示意图。 10a and 10b are schematic diagrams of an AIO packaging structure in Embodiment 9 of the present invention.
具体实施方式 Detailed ways
为了使本技术领域的人员更好地理解本发明中的技术方案,下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例,都应当属于本发明保护的范围。 In order to enable those skilled in the art to better understand the technical solutions in the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described The embodiments are only some of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts shall fall within the protection scope of the present invention.
本文使用的例如“上”、“上方”、“下”、“下方”等表示空间相对位置的术语是出于便于说明的目的来描述如附图中所示的一个单元或特征相对于另一个单元或特征的关系。空间相对位置的术语可以旨在包括设备在使用或工作中除了图中所示方位以外的不同方位。例如,如果将图中的结构翻转,则被描述为位于其他单元或特征“下方”或“之下”的单元将位于其他单元或特征“上方”。因此,示例性术语“下方”可以囊括上方和下方这两种方位。设备可以以其他方式被定向(旋转90度或其他朝向),并相应地解释本文使用的与空间相关的描述语。 The terms used herein to denote relative spatial positions such as "upper", "above", "under", "under", etc. are for convenience of description to describe the relative position of one element or feature relative to another as shown in the drawings. Relationships of units or features. The terms of spatial relative position may be intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the structure in the figures is turned over, elements described as "below" or "beneath" other elements or features would then be oriented "above" the other elements or features. Thus, the exemplary term "below" can encompass both an orientation of above and below. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.
并且,应当理解的是尽管术语第一、第二等在本文中可以被用于描述各种元件或结构,但是这些被描述对象不应受到这些术语的限制。这些术语仅用于将这些描述对象彼此区分开。例如,第一基板可以被称为第二基板,并且类似地第二基板也可以被称为第一基板,这并不背离本申请的保护范围。 And, it should be understood that although the terms first, second, etc. may be used herein to describe various elements or structures, these described objects should not be limited by these terms. These terms are only used to distinguish these described objects from one another. For example, a first substrate may be referred to as a second substrate, and similarly, a second substrate may also be referred to as a first substrate, which does not depart from the scope of protection of the present application.
本发明公开了一种AIO(AllInOne)封装结构,包括: The invention discloses an AIO (AllInOne) packaging structure, comprising:
第一封装结构,包括第一基板、安装于第一基板上的若干电子元器件、以及位于第一基板上方且塑封第一基板上若干电子元器件的第一塑封体; The first packaging structure includes a first substrate, a plurality of electronic components mounted on the first substrate, and a first plastic package located above the first substrate and plastic-sealed with a plurality of electronic components on the first substrate;
第二封装结构,第二封装结构位于第一封装结构上方,第二封装结构与第一基板通过第一塑封体无缝塑封,第二封装结构包括第二基板、安装于第二基板上的若干电子元器件,第二基板与第一基板电性导通。 The second packaging structure, the second packaging structure is located above the first packaging structure, the second packaging structure and the first substrate are seamlessly plastic-sealed through the first plastic package, the second packaging structure includes a second substrate, and several For electronic components, the second substrate is electrically connected to the first substrate.
优选地,第二封装结构为堆叠式结构,由多个第二基板和多个第二塑封体相互堆叠形成,每个第二基板上分别安装有电子元器件,相邻第二基板通过第二塑封体无缝塑封。 Preferably, the second package structure is a stacked structure, which is formed by stacking multiple second substrates and multiple second plastic packages, each second substrate is respectively equipped with electronic components, and adjacent second substrates pass through the second The plastic body is seamlessly sealed.
本发明中的第二封装结构包括多个第二基板,当然,第二封装结构也可以采用其他术语进行描述,如第二封装结构中包括堆叠设置的第二基板、第三基板…,同时本发明中的第二塑封体也可以采用依次设置的第二塑封体、第三塑封体…的方式进行描述。 The second packaging structure in the present invention includes a plurality of second substrates. Of course, the second packaging structure can also be described by using other terms, such as the second packaging structure including stacked second substrates, third substrates..., while the present The second plastic package in the invention can also be described in the form of the second plastic package, the third plastic package, . . . arranged in sequence.
本发明还一种AIO封装方法,包括: The present invention also provides an AIO packaging method, comprising:
提供第一基板,在第一基板上安装若干电子元器件; providing a first substrate, and installing several electronic components on the first substrate;
提供第二基板,将第二基板和安装有若干电子元器件的第一基板进行无缝塑封,在第一基板上方和第二基板之间形成第一塑封体; providing a second substrate, performing seamless plastic sealing on the second substrate and the first substrate on which a plurality of electronic components are installed, and forming a first plastic package above the first substrate and between the second substrate;
电性导通第二基板和第一基板; electrically conducting the second substrate and the first substrate;
在第二基板上安装若干电子元器件; installing a plurality of electronic components on the second substrate;
切割上述封装结构,得到若干AIO封装结构。 Cut the above package structure to obtain several AIO package structures.
以下结合具体实施例对本发明作进一步说明。此外,在不同的实施例中可能使用重复的标号或标示。这些重复仅为了简单清楚地叙述本发明,不代表所讨论的不同实施例及/或结构之间具有任何关联性。 The present invention will be further described below in conjunction with specific examples. Furthermore, repeated reference numerals or designations may be used in different embodiments. These repetitions are only for the purpose of simply and clearly describing the present invention, and do not represent any relationship between the different embodiments and/or structures discussed.
实施例一: Embodiment one:
参图1所示,本发明实施例一中的AIO封装结构包括: Referring to Figure 1, the AIO packaging structure in Embodiment 1 of the present invention includes:
第一封装结构10,其包括第一基板101、安装于第一基板101上的若干电子元器件103、以及封装于第一基板101上的第一塑封体102; The first packaging structure 10 includes a first substrate 101, a plurality of electronic components 103 mounted on the first substrate 101, and a first plastic package 102 packaged on the first substrate 101;
第二封装结构20,第二封装结构20为堆叠式封装结构,包括两个第二基板,分别为第二基板211和第二基板221,第二基板211和第二基板221上分别安装有若干电子元器件213和223,在第二基板211和第二基板221上分别塑封形成有第二塑封体212和222; The second packaging structure 20, the second packaging structure 20 is a stacked packaging structure, including two second substrates, which are respectively the second substrate 211 and the second substrate 221, and several The electronic components 213 and 223 are respectively molded on the second substrate 211 and the second substrate 221 to form second plastic packages 212 and 222;
金属导电柱,第一封装结构10和第二封装结构20通过若干金属导电柱电性导通,具体地,本实施例中包括电性导通第二基板211和第一基板101的第一金属导电柱31、电性导通第二基板221和第二基板211的第二金属导电柱32、以及电性导通第二基板221和第一基板101的第三金属导电柱33。 Metal conductive pillars, the first package structure 10 and the second package structure 20 are electrically connected through several metal conductive pillars, specifically, in this embodiment, the first metal substrate 211 and the first substrate 101 are electrically connected. The conductive posts 31 , the second metal conductive posts 32 electrically connected to the second substrate 221 and the second substrate 211 , and the third metal conductive posts 33 electrically connected to the second substrate 221 and the first substrate 101 .
本发明中的第二基板211和221均需与第一基板101电性导通,应当理解的是,本实施例中的电性导通为直接或间接电性导通,在其他实施例中也可以仅设置第一金属导电柱31和第二金属导电柱32、或第一金属导电柱31和第三金属导电柱33、或第二金属导电柱32和第三金属导电柱33,未设置金属导电柱的两个基板可以通过其他导电柱间接地电性导通,同样可以实现电性导通的目的。 Both the second substrates 211 and 221 in the present invention need to be electrically connected to the first substrate 101. It should be understood that the electrical connection in this embodiment is direct or indirect electrical connection. In other embodiments It is also possible to only set the first metal conductive column 31 and the second metal conductive column 32, or the first metal conductive column 31 and the third metal conductive column 33, or the second metal conductive column 32 and the third metal conductive column 33, without setting The two substrates of the metal conductive pillars can be electrically connected indirectly through other conductive pillars, and the purpose of electrical conduction can also be achieved.
第一塑封体102和第二塑封体212、222分别位于相邻两个基板之间,且塑封下方基板上的电子元器件,通过若干塑封体能够将安装有电子元器件的基板封装成一个整体,且封装结构稳定。 The first plastic package 102 and the second plastic package 212, 222 are respectively located between two adjacent substrates, and the electronic components on the lower substrate are plastic-sealed, and the substrates installed with electronic components can be packaged as a whole through several plastic packages , and the package structure is stable.
本发明中的电子元器件包括电容、电阻、电感、正装芯片、倒装芯片等,其可以采用正装封装或倒装封装的方式安装于基板上。如在本实施例中,电子元器件103和213通过正装封装的方式分别安装于第一基板101和第二基板211上,电子元器件103和213还分别设有与第一基板101和第二基板211电性连接的金线(未标号);而电子元器件223通过正装封装的方式安装于第二基板221上,其不需要设置金线。在其他实施例中,也可以采用其他的安装方式进行安装。 The electronic components in the present invention include capacitors, resistors, inductors, front-mount chips, flip-chips, etc., which can be installed on the substrate in the way of front-mount packaging or flip-chip packaging. As in this embodiment, the electronic components 103 and 213 are respectively mounted on the first substrate 101 and the second substrate 211 by means of front-mount packaging, and the electronic components 103 and 213 are also provided with the first substrate 101 and the second substrate respectively. The gold wires (not numbered) electrically connected to the substrate 211 ; and the electronic components 223 are mounted on the second substrate 221 by means of front-mount packaging, which does not need to be provided with gold wires. In other embodiments, other installation methods may also be used for installation.
以下结合附图详细说明本实施例中AIO封装结构的封装方法。 The encapsulation method of the AIO encapsulation structure in this embodiment will be described in detail below with reference to the accompanying drawings.
参图2a、2b所示,首先准备第一基板101,并将基板进行烘烤、去湿等工艺; Referring to Figures 2a and 2b, the first substrate 101 is first prepared, and the substrate is subjected to processes such as baking and dehumidification;
将各类电子元器件103,如各类小型、超小型电容、电阻、电感、芯片等通过自动回流焊炉蘸助焊剂,回流焊在第一基板101上; Various electronic components 103, such as various small and ultra-small capacitors, resistors, inductors, chips, etc., are dipped in flux in an automatic reflow furnace, and reflow soldered on the first substrate 101;
最后采用自动清洗机将助焊剂清洗掉。 Finally, use an automatic cleaning machine to clean away the flux.
参图2c、2d所示,对需要打线的电子元器件进行打线键合,该步骤针对的对象是正装封装的电子元器件,若为倒装封装的电子元器件,可以省略该步骤。 As shown in Figure 2c and 2d, wire bonding is performed on the electronic components that need to be wired. This step is aimed at the electronic components that are packaged in the front package. If the electronic components are flip-chip packaged, this step can be omitted.
打线前对第一基板101表面进行等离子清洗,然后使用金线,如合金线或者铜线等进行打线键合,将电子元器件103通过金线电性连接到第一基板101上。 Before wire bonding, the surface of the first substrate 101 is plasma cleaned, and then gold wires, such as alloy wires or copper wires, are used for wire bonding to electrically connect the electronic components 103 to the first substrate 101 through gold wires.
参图2e所示,提供第二基板211,将第一层贴装完所有电子元器件的第一基板101和第二基板211用塑封工艺压模成一体,得到图2f所示的封装体。 As shown in FIG. 2e, a second substrate 211 is provided, and the first substrate 101 and the second substrate 211 with all electronic components mounted on the first layer are molded together by a plastic sealing process to obtain the package shown in FIG. 2f.
首先将安装有电子元器件103的第一基板101装入自动压模设备,自动压模设备将第一基板103倒反,吸附扣在上模上; Firstly, the first substrate 101 with the electronic components 103 installed is loaded into the automatic compression molding equipment, and the automatic compression molding equipment turns the first substrate 103 upside down and attaches it to the upper mold by adsorption;
将第二基板211装入自动压模设备中,具体为:自动压模设备在下模上放上离型膜(未图示),并用真空吸附固定,然后将第二基板211定位,放置在离型膜上; Put the second substrate 211 into the automatic compression molding equipment, specifically: the automatic compression molding equipment puts a release film (not shown) on the lower mold, and fixes it with vacuum adsorption, then positions the second substrate 211, and places it on the on the film;
在第二基板211上均匀地撒上颗粒状塑封料,待塑封料在模具高温下融化后,自动压模设别的上模和下模进行合模,在加压条件下完成塑封,在第一基板101和第二基板211上形成第一塑封体102。 Sprinkle granular molding compound evenly on the second substrate 211. After the plastic sealing compound melts under the high temperature of the mold, the automatic compression mold sets another upper mold and lower mold to close the mold, and the plastic sealing is completed under pressurized conditions. The first plastic package 102 is formed on the first substrate 101 and the second substrate 211 .
开模后,去除离型膜,第一基板101带所有电子元器件已经和第二基板211通过第一塑封体102结合在一起。 After the mold is opened, the release film is removed, and the first substrate 101 with all electronic components has been combined with the second substrate 211 through the first plastic package 102 .
参图2g所示,在第二基板211与第一基板101之间形成若干第一金属导电柱31,第一基板101和第二基板211可以通过第一金属导电柱31电性导通。 As shown in FIG. 2 g , several first metal conductive pillars 31 are formed between the second substrate 211 and the first substrate 101 , and the first substrate 101 and the second substrate 211 can be electrically connected through the first metal conductive pillars 31 .
具体地,该工艺类似于基板工艺:打通孔、灌金属导电浆(如铜浆等),连通第一基板101和第二基板211。 Specifically, this process is similar to the substrate process: through holes are drilled, metal conductive paste (such as copper paste, etc.) is poured, and the first substrate 101 and the second substrate 211 are connected.
打通孔可以用各种方法,如机械打孔、激光打孔等,打通预留的第一基板101和第二基板211的孔位。如本实施例中先灌铜浆,再进行烘烤,导通第一基板101和第二基板211。 Various methods, such as mechanical drilling, laser drilling, etc., can be used to open the reserved holes of the first substrate 101 and the second substrate 211 . As in this embodiment, the copper paste is filled first, and then baked to conduct the first substrate 101 and the second substrate 211 .
应当理解的是,在其他实施例中电性导通第一基板101和第二基板211还可以采用电镀金属层导通、金属溅射等方法实现。 It should be understood that in other embodiments, the electrical connection between the first substrate 101 and the second substrate 211 may also be achieved by methods such as electroplating metal layer conduction, metal sputtering and the like.
参图2h、2i所示,然后在第二基板211上安装若干电子元器件213,该安装工艺与在第一基板101上安装电子元器件103的工艺完全相同,在此不再进行赘述。 Referring to Figures 2h and 2i, several electronic components 213 are installed on the second substrate 211. The installation process is exactly the same as the process of installing electronic components 103 on the first substrate 101, and will not be repeated here.
参图2j所示,提供另一第二基板221,将贴装完所有电子元器件的第二基板211和第二基板221用塑封工艺压模成一体,得到图2k所示的封装体,第二基板211和第二基板221之间形成有第二塑封体212。该塑封工艺与第一基板101和第二基板211的塑封工艺完全相同,在此不再进行赘述。 As shown in FIG. 2j, another second substrate 221 is provided, and the second substrate 211 and the second substrate 221 with all electronic components mounted thereon are molded together by a plastic sealing process to obtain the package shown in FIG. 2k. A second plastic package 212 is formed between the second substrate 211 and the second substrate 221 . The molding process is completely the same as that of the first substrate 101 and the second substrate 211 , and will not be repeated here.
参图2l所示,在封装完第二基板221之后,在第二基板221和第二基板211上形成第二金属导电柱32,同时在第二基板221和第一基板101上形成第三金属导电柱33。该工艺与上述在第二基板211和第一基板101上打通孔、灌铜浆工艺完全相同,在此不再进行赘述。 As shown in FIG. 2l, after the second substrate 221 is packaged, the second metal conductive column 32 is formed on the second substrate 221 and the second substrate 211, and the third metal conductive column 32 is formed on the second substrate 221 and the first substrate 101 at the same time. Conductive column 33. This process is exactly the same as the above-mentioned process of drilling holes and filling copper paste on the second substrate 211 and the first substrate 101 , and will not be repeated here.
进一步地,在第二基板221上还安装有若干电子元器件223,并也可以通过上述塑封工艺进行塑封,全部塑封完成后即可对上述封装体进行切割,得到图1所示的若干AIO封装结构。 Further, a number of electronic components 223 are installed on the second substrate 221, and can also be plastic-sealed through the above-mentioned plastic packaging process. After all the plastic packaging is completed, the above-mentioned package can be cut to obtain several AIO packages as shown in FIG. 1 structure.
本实施例中的第一基板101、第二基板211、221上分别通过一步塑封成型工艺,在第一基板101、第二基板211、221上分别形成第一塑封体102和第二塑封体212、222,且第一基板101、第一塑封体102、第二基板211、第二塑封体212、第二基板221、和第二塑封体222之间均为无缝连接,其塑封工艺简单方便,有效地提高了AIO封装结构的稳定性和可靠性。 In this embodiment, the first substrate 101 and the second substrates 211 and 221 respectively undergo a one-step molding process to form the first plastic package 102 and the second plastic package 212 on the first substrate 101 and the second substrate 211 and 221 respectively. , 222, and the first substrate 101, the first plastic package 102, the second substrate 211, the second plastic package 212, the second substrate 221, and the second plastic package 222 are seamlessly connected, and the plastic sealing process is simple and convenient , effectively improving the stability and reliability of the AIO packaging structure.
实施例二: Embodiment two:
参图3所示,本发明实施例二中的AIO封装结构包括: Referring to Figure 3, the AIO packaging structure in Embodiment 2 of the present invention includes:
第一封装结构10,其包括第一基板101、安装于第一基板101上的若干电子元器件103、以及封装于第一基板101上的第一塑封体102; The first packaging structure 10 includes a first substrate 101, a plurality of electronic components 103 mounted on the first substrate 101, and a first plastic package 102 packaged on the first substrate 101;
第二封装结构20,第二封装结构20为堆叠式封装结构,包括三个第二基板,分别为第二基板211、第二基板221和第二基板231,第二基板211、第二基板221和第二基板231上分别安装有若干电子元器件213、223和233,在第二基板211、第二基板221和第二基板231上分别塑封形成有第二塑封体212、222和232; The second packaging structure 20, the second packaging structure 20 is a stacked packaging structure, including three second substrates, respectively the second substrate 211, the second substrate 221 and the second substrate 231, the second substrate 211, the second substrate 221 A number of electronic components 213, 223 and 233 are respectively mounted on the second substrate 231, and second plastic packages 212, 222 and 232 are respectively formed on the second substrate 211, the second substrate 221 and the second substrate 231;
金属导电柱,第一封装结构10和第二封装结构20通过若干金属导电柱电性导通,具体地,本实施例中包括电性导通第二基板211和第一基板101的第一金属导电柱31、电性导通第二基板221和第二基板211的第二金属导电柱32、电性导通第二基板221和第一基板101的第三金属导电柱33、电性导通第二基板231和第一基板101的第四金属导电柱34、电性导通第二基板231和第二基板211的第五金属导电柱35、以及电性导通第二基板231和第二基板221的第六金属导电柱36。 Metal conductive pillars, the first package structure 10 and the second package structure 20 are electrically connected through several metal conductive pillars, specifically, in this embodiment, the first metal substrate 211 and the first substrate 101 are electrically connected. The conductive column 31, the second metal conductive column 32 electrically connected to the second substrate 221 and the second substrate 211, the third metal conductive column 33 electrically connected to the second substrate 221 and the first substrate 101, electrically connected The second substrate 231 and the fourth metal conductive column 34 of the first substrate 101, the fifth metal conductive column 35 electrically connected to the second substrate 231 and the second substrate 211, and the second substrate 231 and the second conductive column electrically connected The sixth metal conductive pillar 36 of the substrate 221 .
同样地,本实施例中也可以不设置六个金属导电柱,而根据需要设置3个金属导电柱,如仅设置第一、第三和第四金属导电柱,或者第一、第二和第六金属导电柱等,均可以完成所有基板电性导通的目的,即所有的第二基板与第一基板直接或间接电性导通。 Similarly, in this embodiment, six metal conductive columns may not be provided, but three metal conductive columns may be provided as required, such as only the first, third and fourth metal conductive columns, or the first, second and third The six metal conductive pillars can achieve the purpose of electrically connecting all the substrates, that is, all the second substrates are electrically connected directly or indirectly to the first substrate.
其中,在本实施例中,最上方的第二基板231上设有散热层40,第二加班231和散热层40通过第二塑封体232进行塑封。该散热层40可以为金属散热层,当其为金属散热层时,AIO封装结构的上方还可以起到信号屏蔽的效果。 Wherein, in this embodiment, the uppermost second substrate 231 is provided with a heat dissipation layer 40 , and the second overtime 231 and the heat dissipation layer 40 are plastic-sealed by a second plastic package 232 . The heat dissipation layer 40 may be a metal heat dissipation layer, and when it is a metal heat dissipation layer, the upper part of the AIO packaging structure may also function as a signal shield.
本实施例中的封装结构的封装方法可以与实施例一中的封装方法类似,在封装完第二基板221后,继续采用相同的塑封工艺在第二基板221上塑封第二基板231,然后在第二基板231上打孔、灌铜浆,形成第四金属导电柱34、第五金属导电柱35和第六金属导电柱36;然后再在第二基板231上安装电子元器件233,然后再将整个封装体于散热层40通过相同的塑封工艺进行塑封,参图4a~4c所示,最终再切割形成图3所示的AIO封装结构。 The packaging method of the packaging structure in this embodiment can be similar to the packaging method in Embodiment 1. After the second substrate 221 is packaged, continue to use the same plastic packaging process to plastic-seal the second substrate 231 on the second substrate 221, and then Drill holes and fill copper paste on the second substrate 231 to form the fourth metal conductive column 34, the fifth metal conductive column 35 and the sixth metal conductive column 36; then install the electronic components 233 on the second substrate 231, and then The entire package body is plastic-sealed on the heat dissipation layer 40 through the same plastic-seal process, as shown in FIGS. 4 a to 4 c , and finally cut to form the AIO package structure shown in FIG. 3 .
实施例三: Embodiment three:
本实施例中的AIO封装结构与实施例二中的AIO封装结构完全相同,而不同之处在于其封装方法,为了便于理解,本实施例中仅对基板的封装步骤进行说明,而在基板上安装电子元器件、打孔、灌铜浆等步骤并未进行具体说明。 The AIO packaging structure in this embodiment is exactly the same as the AIO packaging structure in Embodiment 2, but the difference lies in its packaging method. For the sake of easy understanding, only the packaging steps of the substrate are described in this embodiment, and the packaging steps on the substrate The steps of installing electronic components, drilling holes, and filling copper paste are not specifically described.
实施例一中是在第一基板101上依次封装第二基板211、第二基板221、第二基板231和散热层40,而本实施例中在第一基板101上封装第二基板211、第二基板221形成第一封装体,同时在第二基板231上封装散热层40形成第二封装体,然后将第一封装体和第二封装体进行塑封,得到图4a所示的封装结构。 In the first embodiment, the second substrate 211 , the second substrate 221 , the second substrate 231 and the heat dissipation layer 40 are sequentially packaged on the first substrate 101 , while in this embodiment the second substrate 211 , the second substrate 211 , and the The second substrate 221 forms a first package, and the heat dissipation layer 40 is packaged on the second substrate 231 to form a second package, and then the first package and the second package are plastic-sealed to obtain the package structure shown in FIG. 4 a .
应当理解的是,在本实施例中还可以采用其他的封装步骤,如在第一基板101上封装第二基板211形成第一封装体,同时在第二基板221上封装第二基板231和散热层40形成第二封装体,然后将第一封装体和第二封装体进行塑封,得到图4a所示的封装结构;或者在第一基板101上封装第二基板211形成第一封装体,同时在第二基板221上封装第二基板231形成第二封装体,然后将第一封装体和第二封装体进行塑封,完成后再将整个封装体和散热层进行塑封。 It should be understood that other packaging steps can also be used in this embodiment, such as packaging the second substrate 211 on the first substrate 101 to form a first package, while packaging the second substrate 231 on the second substrate 221 and heat dissipation. layer 40 to form a second package, and then plastic-encapsulate the first package and the second package to obtain the package structure shown in FIG. 4a; or package the second substrate 211 on the first substrate 101 to form the first package, while The second substrate 231 is packaged on the second substrate 221 to form a second package, and then the first package and the second package are plastic-sealed, and then the entire package and the heat dissipation layer are plastic-sealed.
实施例四: Embodiment four:
本实施例中的AIO封装结构与实施例二中的封装结构类似,不同之处在于,参图5d所示,每个AIO封装结构的四周设有环绕AIO封装结构的金属屏蔽层50,而在AIO封装结构的上部设有散热层40,该散热层40为金属散热层,如此该AIO封装结构的五面完全被金属覆盖屏蔽。 The AIO packaging structure in this embodiment is similar to the packaging structure in Embodiment 2, except that, as shown in Figure 5d, a metal shielding layer 50 surrounding the AIO packaging structure is provided around each AIO packaging structure, and in The upper part of the AIO packaging structure is provided with a heat dissipation layer 40 , and the heat dissipation layer 40 is a metal heat dissipation layer, so that the five sides of the AIO packaging structure are completely covered and shielded by metal.
优选地,在底部第一基板的设计时可以直接设计出和AIO封装结构互通的接地电路,可以将整个第一基板的底部接地屏蔽,这样,AIO封装结构的六个面除了电信号接口,已经可以完全被金属覆盖,从而能够屏蔽外界的信号,避免外界的信号干扰。 Preferably, when designing the first substrate at the bottom, a grounding circuit that communicates with the AIO packaging structure can be directly designed, and the bottom of the entire first substrate can be grounded and shielded. In this way, the six sides of the AIO packaging structure except the electrical signal interface have been It can be completely covered by metal, so that it can shield external signals and avoid external signal interference.
结合图5a~5d所示,在所有基板和散热层塑封完成之后,将整个AIO封装体半切至第一基板,但保证第一基板不被切断,在AIO封装体上形成有若干收容槽51。然后在收容槽51内灌铜浆并固化,固化完成后沿着收容槽51中间进行切割,得到的AIO封装结构的四周就分布有金属屏蔽层50。 As shown in Figures 5a-5d, after all the substrates and heat dissipation layers are plastic-sealed, the entire AIO package is half-cut to the first substrate, but the first substrate is not cut off, and several receiving grooves 51 are formed on the AIO package. Then copper paste is poured into the receiving tank 51 and cured. After the curing is completed, cutting is performed along the middle of the receiving tank 51 , and the metal shielding layer 50 is distributed around the obtained AIO packaging structure.
实施例五: Embodiment five:
参图6所示,在本发明的另一实施例中,AIO封装结构与实施例一中的结构基本相同,不同的是本实施例中AIO封装结构的四周内部部分设置有金属屏蔽层50,该金属屏蔽层50能够屏蔽AIO封装结构内部的电信号。 As shown in FIG. 6, in another embodiment of the present invention, the AIO packaging structure is basically the same as that in Embodiment 1, the difference is that in this embodiment, the inner part of the AIO packaging structure is provided with a metal shielding layer 50, The metal shielding layer 50 can shield electrical signals inside the AIO packaging structure.
本实施例中金属屏蔽层50的制备工艺与实施例五中的工艺基本相同,不同的是,本实施例中是在塑封完第二基板221后将封装体半切至第一基板101,形成若干收容槽,然后在收容槽内灌铜浆并固化,固化后在该封装体上继续进行封装,最后再沿着收容槽进行切割,如此切割得到的AIO封装结构的侧面仅有部分设置金属屏蔽层。 The preparation process of the metal shielding layer 50 in this embodiment is basically the same as that in Embodiment 5, the difference is that in this embodiment, after the second substrate 221 is plastic-sealed, the package body is half-cut to the first substrate 101 to form several Then, pour copper paste into the storage tank and solidify it. After curing, continue to package on the package, and finally cut along the storage tank. Only part of the side of the AIO package structure obtained by cutting in this way is equipped with a metal shielding layer. .
应当理解的是,本实施例中以屏蔽第二基板221和第一基板101之间的电信号为例进行说明,在其他实施例中也可以例如将收容槽切至第二基板211,然后在第二基板221和第二基板211之间的收容槽中灌铜浆并固化,最后切割得到的AIO封装结构能够屏蔽第二基板221和第二基板211之间的电信号,如此可以根据实际需要选择性地设计金属屏蔽层的区域。 It should be understood that, in this embodiment, shielding the electrical signal between the second substrate 221 and the first substrate 101 is used as an example for illustration. The receiving groove between the second substrate 221 and the second substrate 211 is filled with copper paste and cured, and finally the AIO packaging structure obtained by cutting can shield the electrical signal between the second substrate 221 and the second substrate 211, so that it can be used according to actual needs. Selectively design the area of the metal shield.
实施例六: Embodiment six:
在本发明的一具体实施例中,参图7a所示,该AIO封装结构为光-电混合型AIO封装结构,在第二基板221上设置有若干倒装封装的光通信芯片223。 In a specific embodiment of the present invention, as shown in FIG. 7 a , the AIO package structure is an optical-electric hybrid AIO package structure, and several flip-chip optical communication chips 223 are arranged on the second substrate 221 .
进一步地,参图7b所示,在光通信芯片223上还可以设有透明塑封料222,该透明塑封料222能够对光通信芯片223进行保护,同时不影响光通信芯片的出光效率。 Further, as shown in FIG. 7b, a transparent molding compound 222 may also be provided on the optical communication chip 223, and the transparent molding compound 222 can protect the optical communication chip 223 without affecting the light extraction efficiency of the optical communication chip.
实施例七: Embodiment seven:
在本发明的一具体实施例中,参图8所示,该AIO封装结构为光-电混合型AIO封装结构,AIO封装结构的顶部设有散热层40,第一基板101为光-电一体式基板,第一基板101上设有若干光通信芯片103,该光通信芯片103采用正装并打金线的方式进行安装,该光-电一体式基板上具有若干用于光通信芯片103进行通信的光通道。如此设置不会影响顶部发热大的芯片的散热,同时能够通过光通信大幅提高数据出入速率。 In a specific embodiment of the present invention, as shown in FIG. 8, the AIO packaging structure is an optical-electric hybrid AIO packaging structure, the top of the AIO packaging structure is provided with a heat dissipation layer 40, and the first substrate 101 is an integrated optical-electrical structure. The first substrate 101 is provided with a number of optical communication chips 103, the optical communication chips 103 are installed in the way of front mounting and gold wire, the optical-electrical integrated substrate has a number of optical communication chips 103 for communication the optical channel. Such a setting will not affect the heat dissipation of the chip with high heat generation on the top, and at the same time, it can greatly increase the data input and output rate through optical communication.
实施例八: Embodiment eight:
在本发明的另一具体实施例中,参图9a、9b所示,基于生物识别的AIO封装结构,在第二基板221上设置有指纹识别芯片223,该指纹识别芯片223可以为图9a中倒装安装在第二基板221上,也可以为图9b中正装安装在第二基板221上并用金线与第二基板221进行电性连接。在第二基板221上形成有盖板40,盖板可以是玻璃、蓝宝石或者其它高k值盖板,盖板40和第二基板221之间塑封形成有第二塑封体222。 In another specific embodiment of the present invention, as shown in Figures 9a and 9b, based on the biometric AIO packaging structure, a fingerprint identification chip 223 is provided on the second substrate 221, and the fingerprint identification chip 223 can be the The flip-chip mounting on the second substrate 221 may also be the front-mounting on the second substrate 221 as shown in FIG. 9 b and the electrical connection with the second substrate 221 is performed with gold wires. A cover plate 40 is formed on the second substrate 221 , the cover plate may be glass, sapphire or other high-k value cover plate, and a second plastic package 222 is formed between the cover plate 40 and the second substrate 221 .
实施例九: Embodiment nine:
在本发明的另一具体实施例中,参图10a、10b所示,基于图像传感器的AIO封装结构,第二基板221上设置有图像传感器芯片223,同时第二基板221上形成有第二塑封体222,图像传感器芯片223露出第二塑封体222之外,可以采用Film-Mold(薄膜模具)进行封装,图像传感器的上方加装微镜头,便可以变身摄像头,在其他实施例中也可以同时完成虹膜识别芯片、人脸识别芯片、或其它和图像相关识别芯片进行封装。 In another specific embodiment of the present invention, as shown in Figures 10a and 10b, based on the AIO packaging structure of the image sensor, the image sensor chip 223 is arranged on the second substrate 221, and a second plastic package is formed on the second substrate 221. body 222, the image sensor chip 223 is exposed outside the second plastic package body 222, and can be packaged with Film-Mold (film mold), and a micro lens can be installed on the top of the image sensor to transform into a camera, and it can also be used in other embodiments At the same time, the packaging of iris recognition chips, face recognition chips, or other image-related recognition chips is completed.
其中,在图10a中,图像传感器芯片223采用金线与第二基板221电性连接,而在图10b中,图像传感器芯片223上设有若干TSV孔2231,TSV孔2231内进一步形成TSV导电柱(未图示),通过TSV导电柱可以实现图像传感器芯片223的顶面与第二基板221的电性连接。 Wherein, in FIG. 10a, the image sensor chip 223 is electrically connected to the second substrate 221 by using gold wires, while in FIG. (not shown), the electrical connection between the top surface of the image sensor chip 223 and the second substrate 221 can be realized through the TSV conductive pillars.
应当理解的是,在本实施例中的TSV导电的连接方式也可以应用到其他实施例中,在其他实施例中不再举例进行一一说明。 It should be understood that the TSV conductive connection manner in this embodiment can also be applied to other embodiments, and will not be described in other embodiments by way of example.
由以上技术方案可以看出,本发明的AIO封装结构和封装方法具有以下优点: It can be seen from the above technical solutions that the AIO packaging structure and packaging method of the present invention have the following advantages:
通过在第一基板上设置一个或多个第二基板,相邻的基板通过塑封工艺进行塑封,并电性导通所有基板,由于每个基板上均能够安装电容、电阻、芯片等电子元器件,通过堆叠式安装能够减小基板所占的面积,满足了小型化芯片封装的要求; By setting one or more second substrates on the first substrate, the adjacent substrates are plastic-sealed through the plastic packaging process, and all the substrates are electrically connected, because electronic components such as capacitors, resistors, and chips can be installed on each substrate , the area occupied by the substrate can be reduced through stacked installation, which meets the requirements of miniaturized chip packaging;
金属导电柱能够电性导通不同的基板,信号在通过金属导电柱在不同基板上进行传输,相较于传统的封装结构,本发明能够缩短信号的传输距离,提高器件的运行速度; The metal conductive pillar can electrically connect different substrates, and the signal is transmitted on different substrates through the metal conductive pillar. Compared with the traditional packaging structure, the present invention can shorten the transmission distance of the signal and improve the operating speed of the device;
该AIO封装结构可以与其他相同或不同的封装结构进行模块化组合安装,形成模块化器件,当器件某一封装结构出现问题时可以进行更换,避免了传统封装结构进行整体更换的问题,大大降低了维护成本。 The AIO packaging structure can be modularly combined with other same or different packaging structures to form a modular device. When there is a problem with a certain packaging structure of the device, it can be replaced, which avoids the problem of overall replacement of the traditional packaging structure and greatly reduces maintenance cost.
对于本领域技术人员而言,显然本发明不限于上述示范性实施例的细节,而且在不背离本发明的精神或基本特征的情况下,能够以其他的具体形式实现本发明。因此,无论从哪一点来看,均应将实施例看作是示范性的,而且是非限制性的,本发明的范围由所附权利要求而不是上述说明限定,因此旨在将落在权利要求的等同要件的含义和范围内的所有变化囊括在本发明内。不应将权利要求中的任何附图标记视为限制所涉及的权利要求。 It will be apparent to those skilled in the art that the invention is not limited to the details of the above-described exemplary embodiments, but that the invention can be embodied in other specific forms without departing from the spirit or essential characteristics of the invention. Accordingly, the embodiments should be regarded in all points of view as exemplary and not restrictive, the scope of the invention being defined by the appended claims rather than the foregoing description, and it is therefore intended that the scope of the invention be defined by the appended claims rather than by the foregoing description. All changes within the meaning and range of equivalents of the elements are embraced in the present invention. Any reference sign in a claim should not be construed as limiting the claim concerned.
此外,应当理解,虽然本说明书按照实施方式加以描述,但并非每个实施方式仅包含一个独立的技术方案,说明书的这种叙述方式仅仅是为清楚起见,本领域技术人员应当将说明书作为一个整体,各实施例中的技术方案也可以经适当组合,形成本领域技术人员可以理解的其他实施方式。 In addition, it should be understood that although this specification is described according to implementation modes, not each implementation mode only includes an independent technical solution, and this description in the specification is only for clarity, and those skilled in the art should take the specification as a whole , the technical solutions in the various embodiments can also be properly combined to form other implementations that can be understood by those skilled in the art.
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