Tang et al., 2014 - Google Patents
Back Gate Bias Stressing on Extremely Thin SOI (ETSOI) MOSFETs with Gate Last Process IntegrationTang et al., 2014
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- 3557961405127867839
- Author
- Tang Z
- Tang B
- Zhao L
- Wang G
- Xu J
- Xu Y
- Wang H
- Wang D
- Li J
- Yan J
- Zhao C
- Publication year
- Publication venue
- Electrochemical Society Transactions 225
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Snippet
In this paper, ETSOI transistors fabricated with gate last process scheme with thin channel layers of 4 to 11nm are provided with superior device performance. For a given gate length less than 30nm, DIBL and Swing are achieved with 48mV/V and 65mV/Dec respectively with …
- 238000000034 method 0 title abstract description 11
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