Cardoso et al., 2016 - Google Patents

High-level synthesis

Cardoso et al., 2016

Document ID
1373847230536097238
Author
Cardoso J
Weinhardt M
Publication year
Publication venue
FPGAs for Software Programmers

External Links

Snippet

The compilation of high-level languages, such as software programming languages, to FPGAs is of paramount importance for the mainstream adoption of FPGAs. An efficient compilation process will improve designer productivity and will make the use of FPGA …
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Classifications

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    • G06F8/41Compilation
    • G06F8/44Encoding
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/50Computer-aided design
    • G06F17/5045Circuit design
    • G06F17/5054Circuit design for user-programmable logic devices, e.g. field programmable gate arrays [FPGA]
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for programme control, e.g. control unit
    • G06F9/06Arrangements for programme control, e.g. control unit using stored programme, i.e. using internal store of processing equipment to receive and retain programme
    • G06F9/30Arrangements for executing machine-instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3885Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units
    • G06F9/3893Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units controlled in tandem, e.g. multiplier-accumulator
    • G06F9/3895Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units controlled in tandem, e.g. multiplier-accumulator for complex operations, e.g. multidimensional or interleaved address generators, macros
    • G06F9/3897Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units controlled in tandem, e.g. multiplier-accumulator for complex operations, e.g. multidimensional or interleaved address generators, macros with adaptable data path
    • GPHYSICS
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    • G06F8/456Parallelism detection
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    • G06F9/44Arrangements for executing specific programmes
    • G06F9/455Emulation; Software simulation, i.e. virtualisation or emulation of application or operating system execution engines
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    • G06F8/437Type checking
    • GPHYSICS
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    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
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    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
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    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
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    • G06F9/00Arrangements for programme control, e.g. control unit
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    • G06F9/30Arrangements for executing machine-instructions, e.g. instruction decode
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    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/36Preventing errors by testing or debugging software

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