WO2025264217A1

WO2025264217A1 - Control of semiconductor fabrication processes through an ensemble of machine-learning (ml) models

Info

Publication number: WO2025264217A1
Application number: PCT/US2024/034608
Authority: WO
Inventors: Juan Andres Torres Robles; Melody TAO
Original assignee: Siemens Industry Software Inc
Current assignee: Siemens Industry Software Inc
Priority date: 2024-06-19
Filing date: 2024-06-19
Publication date: 2025-12-26
Anticipated expiration: 2026-12-19

Abstract

A method may be performed by a computing system to control a semiconductor fabrication process for circuit designs, including by accessing an ensemble of machine-learning (ML) models for the semiconductor process. The ensemble of ML models may include a given forecast ML model configured to predict a wafer value and process parameters for a given step of the semiconductor fabrication process at a given future time point for a given circuit design. Controlling the semiconductor fabrication process may also include performing a control operation for the semiconductor fabrication process responsive to a determination that the predicted wafer value or the predicted process parameters for the given step of the semiconductor fabrication process at the given future time point fail to satisfy an acceptable threshold.

Description

202406809 CONTROL OF SEMICONDUCTOR FABRICATION PROCESSES THROUGH AN ENSEMBLE OF MACHINE-LEARNING (ML) MODELS BACKGROUND _{[0001] Electronic circuits, such as integrated circuits, are used in nearly} every facet of modern society, from automobiles to microwaves to personal computers. Design of circuits may involve many steps, known as a "design flow." The particular steps of a design flow are often dependent upon the type of microcircuit being designed, its complexity, the design team, and the circuit fabricator or foundry that will manufacture the circuit. Electronic design automation (EDA) applications support the design and verification of circuits prior to fabrication. EDA applications may implement various EDA procedures, e.g., functions, tools, or features to analyze, test, or verify a circuit design at various stages of the design flow. BRIEF DESCRIPTION OF THE DRAWINGS _{[0002] Certain examples are described in the following detailed description} and in reference to the drawings. _{[0003] Figure 1 shows an example of a computing system that supports} control of semiconductor fabrication processes through an ensemble of machine-learning (ML) models. _{[0004] Figure 2 shows an example of a forecast ML model according to the} present disclosure. _{[0005] Figure 3 shows an example training of multiple forecast ML models} according to the present disclosure. _{[0006] Figure 4 shows an example of an optimization ML model according} to the present disclosure. 202406809 _{[0007] Figure 5 shows an example training of an optimization ML model} according to the present disclosure. _{[0008] Figure 6 shows an example of an ensemble of ML models for a} semiconductor fabrication process according to the present disclosure. _{[0009] Figure 7 shows an example of logic that a computing system may} implement to support control of semiconductor fabrication processes through an ensemble of ML models. _{[0010] Figure 8 shows an example of a computing system that supports} control of semiconductor fabrication processes through an ensemble of ML models. DETAILED DESCRIPTION _{[0011] Modern circuit designs continue to increase in complexity, and} transistor counts numbering in the billions, tens of billions, and more can occur in modern integrated circuit (IC) designs. With such design complexity, appropriate analysis and verification of circuit designs may be necessary to ensure that IC reliability, functionality, and performance requirements are satisfied. Semiconductor fabrication processes can be incredibly complex, requiring performance of tens to hundreds of sequential process steps in order to manufacture ICs from wafer substrates. Monitoring of wafer states during fabrication to ensure proper IC manufacture can be challenging. Physically conducting wafer measurements during a semiconductor fabrication process will necessarily lower manufacturing efficiency and circuit yields, especially as some physical measurements can be destructive in nature. Moreover, comprehensively measuring entire wafer lots across up to hundreds of different process steps may require days or weeks to completely manufacture a given circuit design, if complete manufacture is even possible. Such costly efforts to obtain physical wafer values through conducting physical measurements during circuit fabrication may be impractical or near- impossible in present circuit manufacturing contexts. _{[0012] As an additional complexity, foundries and circuit manufacturers often} fabricate a mix of different circuit designs through semiconductor fabrication 202406809 processes, ranging from wafer lots for low-volume productions to high-volume fabrications of other circuit designs. For semiconductor fabrications across a broad mix of products, it can become difficult to determine if process variations, circuit defects, or fluctuating wafer or physical metrology values in fabricated circuits are caused by tool or process degradation, product mix, or combinations of both. In some conventional approaches, a baseline product can be designated, marked, or configured as a monitoring wafer, which can be used to physically measure values during fabrication. However, such monitoring may be costly, destructive, and inadequate to attribute proper causes of variances in fabricated circuits in a mix of products. As another possibility, high-volume fabrications of the same circuit design can allow monitoring and decoupling of product dependencies on the process as compared to tool drift. However, such monitoring processes are limited to high-volume productions of the same circuit design and can fail to attribute variance causes for foundries that manufacture a mix of different circuit products. _{[0013] The disclosure herein may provide systems, methods, devices, and} logic for control of semiconductor fabrication processes through an ensemble of ML models. As described herein, the fabrication control technology of the present disclosure may provide the ability to characterize multiple products/circuit designs across multiple manufacturing technologies. Such capabilities can reduce the impact for small-volume product by leveraging common design content with higher-volume product-process interactions and provide per-product estimation of the future behavior of a given circuit design in the manufacturing line. Various technical improvements can be achieved through an ensemble of ML models as described herein, and an ensemble may include monitor ML models, forecast ML models, optimization ML models, or any combination thereof. The forecast ML models of the present disclosure can support time-dependent forecasting of process parameters and metrology values at future time points and across multiple circuit designs. Optimization ML models can predict or determine optimal process parameters to set for manufacturing steps in order to achieve target wafer values for the 202406809 manufacturing steps, and do so through accounting for tool drift and manufacture of multiple different circuit designs. Such models may provide added insight into semiconductor fabrication processes and corresponding fabrication process controls. _{[0014] Through such ensembles of ML models as described herein, the} fabrication control technology of the present disclosure can provide the ability forecast target and controlled parameters in the future that account for the likely future tool state. By creating forecasts for product mixes, the described technology can allow for specific product forecasting that can aid in improving the utilization of equipment, tools, and other manufacture elements. Such features can likewise provide increased flexibility in downtime tool conditions by re-scheduling low-variance (e.g., more robust) products ahead of high- variance (e.g., less robust) products at the edge of preventive maintenance thresholds. Variance and robustness here may refer to impact on circuit manufacturing processes and tools. Fabrication controls through the ensemble of ML models described herein can encompass any suitable operation that affects circuit fabrication processes. For example, preventative maintenance schedules can be adapted based on the forecasting or optimization ML model outputs that indicate acceptable wafer value thresholds can be satisfied for the manufacture of specific circuit designs. As another example, low-volume circuit designs can be rescheduled for fabrication prior to a maintenance window. Such reschedules may improve tool and capital investment utilization metrics, and the use of monitoring wafers can be reduced, which can reduce operation costs. As such, various technical improvements and effects can be provided by the fabrication control technology described herein. _{[0015] These and other aspects of the fabrication control technology} according to the present disclosure as well as various technical benefits are described in greater detail herein. _{[0016] Figure 1 shows an example of a computing system 100 that supports} control of semiconductor fabrication processes through an ensemble of ML models. The computing system 100 may take the form of a single or multiple 202406809 computing devices such as application servers, compute nodes, desktop or laptop computers, smart phones or other mobile devices, tablet devices, embedded controllers, and more. In some implementations, the computing system 100 hosts, instantiates, executes, supports, or implements an EDA application that supports circuit design and analysis, and may accordingly provide or implement any of the fabrication control technology described herein. _{[0017] As an example implementation to support any combination of the} fabrication control technology described herein, the computing system 100 shown in Figure 1 includes a fabrication control engine 110. The computing system 100 may implement the fabrication control engine 110 (including components thereof) in various ways, for example as hardware and programming. The programming for the fabrication control engine 110 may take the form of processor-executable instructions stored on a non-transitory machine-readable storage medium and the hardware for the fabrication control engine 110 may include a processor to execute those instructions. A processor may take the form of single processor or multi-processor systems, and in some examples, the computing system 100 implements multiple engines using the same computing system features or hardware components (e.g., a common processor or a common storage medium). _{[0018] In operation, the fabrication control engine 110 may control a} semiconductor fabrication process for circuit designs, including by accessing an ensemble of ML models for the semiconductor process. The ensemble of ML models may include forecast ML models, such as a given forecast ML model configured to predict a wafer value and process parameters for a given step of the semiconductor fabrication process at a given future time point for a given circuit design. As other examples, the ensemble of ML models may include monitor ML models or optimization ML models, as further described herein. The fabrication control engine 110 may also control the semiconductor fabrication process by performing a control operation for the semiconductor fabrication process responsive to a determination that the predicted wafer value or the predicted process parameters for the given step of the 202406809 semiconductor fabrication process at the given future time point fail to satisfy an acceptable threshold. _{[0019] These and other aspects of fabrication control technology according} to the present disclosure are described in greater detail next. The fabrication control technology described herein may support ensembles of ML models comprised of multiple ML models. As used herein, an “ensemble” of ML models may refer to any set or collection of ML models configured to model, represent, analyze, or otherwise related to a semiconductor fabrication process or any number of process steps thereof. In examples described herein, an ensemble of ML models may include monitor ML models, forecast ML models, optimization ML models, or any combination thereof. A monitor ML model may support monitoring of metrology or wafer values for steps of a semiconductor fabrication process, including prediction of wafer values for subsequent steps in the fabrication process. The fabrication control engine 110 may implement, train, or use monitor ML models through any of the technical features described in U.S. Patent No. 11,687,066, titled “Virtual Cross Metrology-Based Modeling of Semiconductor Fabrication Processes” and issued on June 27, 2023 (referred to herein as “the ‘066 patent”), the contents of which are incorporated by reference herein in its entirety. Various features of forecast ML models and optimization ML models are described herein. _{[0020] Figure 2 shows an example of a forecast ML model according to the} present disclosure. The example of Figure 2 may illustrate a trained forecast ML model through which the fabrication control engine 110 can predict future states of steps in a fabrication semiconductor fabrication process. Forecast ML models of the present disclosure may provide the capability to predict future states for steps in a semiconductor fabrication process. Future states predicted by forecast ML models may include wafer values for steps in the semiconductor fabrication process, process parameters in the semiconductor fabrication process (absent explicit process control), or combinations thereof. In some implementations, the fabrication control engine 110 may access one or more forecast ML models for each respective step in a semiconductor 202406809 fabrication process, and a given forecast ML model for a given step can predict future state of a specific wafer value (e.g., metrology value) for performing the given step at a future time point. In some examples, for a given step in the semiconductor fabrication process, the fabrication control engine 110 may access multiple different forecast ML models, each of the multiple different forecast ML models configured to predict a different wafer value or process parameters at a future time point. As used herein, a forecast ML model for a given step in a semiconductor fabrication process can also refer to a collection of forecast ML models for the given step that can be comprised of multiple different forecast ML models, each configured to predict a different wafer value or process parameters at a future time point for the given step. _{[0021] To provide an example through Figure 2, a forecast ML model 210 is} illustrated that can predict future states of a step in a semiconductor fabrication process referred to as step_A. In the example of Figure 2, step_A may be an intermediate step in the semiconductor fabrication process preceded by process steps 1 through A-1. In this particular example, the forecast ML model 210 may predict future states of step_A of the semiconductor fabrication process in the form of wafer values and process parameters at or up to a future time point specified as “T+∆”, e.g., the future state of performing stepA at or for the future time point. As used herein, a wafer value may refer to any measurable characteristic of a wafer, e.g., prior to, during, or after performing a given step in a semiconductor fabrication process. Accordingly, a wafer value can be specified by the fabrication control engine 110 as any _{measurable value of the wafer applicable to, representative of, or related to} any step of the semiconductor fabrication process. As one example, step_A may be an epitaxy step performed in the semiconductor fabrication process, and the forecast ML model 210 may predict a wafer thickness after performing the epitaxy step in the semiconductor fabrication process at a future time point. Any other wafer values are contemplated herein. _{[0022] As used herein, time may be measured or otherwise specified as} time-series or event-based sequences. Time-series sequences may refer to any data sequences that are sequenced by event numbers. For example, the 202406809 term “T” in time-series data may refer to a specific sequence number in an event sequence and the term “T+∆” may refer to a later sequence number in _{the event sequence. The event sequences utilized by ML models of the} present disclosure may take any form. In some implementations, the event sequences are specified as circuit fabrications, e.g., a sequence of fabrications of individual circuits, wafers, lots, or any other circuit unit manufactured through a semiconductor fabrication process. Such event sequences may comprise fabrications of different circuit designs, which can allow the ML models of the present disclosure to learn, predict, forecast, and perform optimizations for circuit manufactures of multi-product mixes. Using individual wafers as an example event sequence, the term “T” may refer to T number of individual wafer fabrications, which can be sequenced based on a time each individual wafer was manufactured. Lower values in the event sequence indicate an earlier fabrication time, and greater values in the event sequence indicate a subsequent fabrication time. Thus, at a present time, if “T” number of individual wafers have been manufactured through a _{semiconductor fabrication process, then “T+∆” may refer to a future time point} after which ∆ number of wafers have been fabricated through the semiconductor fabrication process. _{[0023] Note that in some examples, the fabrication control engine 110 may} reset event sequences based on any number of sequence reset criteria. For example, the fabrication control engine 110 may reset event sequence numbering to 0 (or any other predetermined or configurable number) after performance of preventative maintenance on one or more tools used in the semiconductor fabrication process. Any other suitable or configurable sequence reset criteria are contemplated herein, which can be user specified. Manual sequence resets are also contemplated herein. _{[0024] In some implementations, the forecast ML model 210 may be trained} _{or configured to generate predictions for a specific or fixed value of ∆. For} instance, the forecast ML model 210 may be configured, trained, or otherwise operate on a ∆ value of 1,000. In such examples, the forecast ML model 210 may predict wafer values and process parameters for 1,000 circuit fabrications 202406809 from a time point “T”. In the example of Figure 2, the forecast ML model 210 can receive, as inputs, wafer values (e.g., metrology values) from previous steps in the semiconductor fabrication process, including step1, step2, and through step_A-1 (e.g., the step immediately prior to step_A). The input wafer values may be various wafer characteristic values measured, virtually predicted, or otherwise determined for the prior steps in the semiconductor fabrication process. Note that the input wafer values from prior steps may be sequenced from events to “1” to “T”. In such examples, event “1” may refer to fabrication of a first individual wafer (or other event-based sequence employed by forecast ML models), event “2” may refer to a next individual wafer fabrication, and “T” may refer to a specified end in the event sequence. _{[0025] The value of “T” in the input data may be significant in that the} forecast ML model 210 may predict wafer values and process parameters up to and at ∆ number of events from “T”. Thus, specification of “T” via input data to the forecast ML model 210 may control or otherwise specify an upper bound on future time points (for a given input) at which the forecast ML model 210 predicts future states. This upper bound may change relative to input data, and is not an absolute limit. In some implementations, the fabrication control engine 110 may provide input data such that “T” is a present state of the semiconductor fabrication process, e.g., “T” refers to the most recently manufactured wafer, lot, or circuit in the time-series event sequence of circuit fabrications. In some implementations, the input data provided by the fabrication control engine 110 may itself specify the value of “T”. For instance, if the fabrication control engine 110 inputs time-series input data for an event sequence of event “1” to event “15,000”, then the forecast ML model 210 may predict the future state from event “15,000”, e.g., a ∆ number of events from event “15,000”. _{[0026] Forecast ML models may generate predicted state output in the form} _{of time-series output data, and the ∆ value may specify an upper bound in the} predicted states. Using the example value of “1,000” for ∆ and time-series input data up to event “T”, the forecast ML model 210 may predict future state at stepA for event “T+1”, “T+2”, and so on up to event “T+∆”. As such, forecast 202406809 ML models may output time-series output data in the form of predicted wafer values and process parameters for a number of future time points (e.g., events) based on the specified value of ∆ that the forecast ML models are configured (e.g., trained) for. In some implementations, the fabrication control engine 110 may adapt or flexibly configure the ∆ value for forecast ML models, even during active monitoring. _{[0027] As noted herein, trained forecast ML models, like the forecast ML} model 210 in Figure 2, may be configured to receive, as inputs, time-series input data, including wafer values for prior steps in a semiconductor fabrication process (e.g., step1 through stepA-1 of the semiconductor fabrication process), process parameters used for a given step in the semiconductor fabrication process (e.g., stepA of the semiconductor fabrication process), or combinations thereof. Each type of input data received by the forecast ML model 210 may be in the form of time-series input data and comprised of wafer values and/or process parameters sequenced, labeled, or otherwise attributed to events in an event sequence. As an illustrative example, the fabrication control engine 110 may provide, as inputs to forecast ML model 210, wafer values measured, determined, predicted, or otherwise generated upon performance of step1 of the semiconductor fabrication process, and do so for multiple events in an event sequence, e.g., the wafer values of step1 for each individual wafer fabrication in the event sequence. _{[0028] In some implementations, forecast ML models according to present} disclosure may receive time-series input data of a fixed length. Such a fixed length may be understood in terms of an event “tail” for which a forecast ML model may receive time-series input data. The “tail” may refer to a most- recent number of events in an event sequence (or data thereof) with a tail length that can be specified, controlled, predetermined, or configured by the fabrication control engine 110. As an illustrative example used herein, the fabrication control engine 110 may specify a tail value (also expressed as Vtail) as 500. A trained forecast ML model may thus take as, as inputs, time-series input data with a number of events in the event sequence equal to the tail value. As an example, a forecast ML model may receive wafer values 202406809 measured, determined, predicted, or otherwise generated upon performance of step1 of the semiconductor fabrication process, and in particular for the multiple events in the event sequence from fabrication event number “T- Vtail” to fabrication event number “T”. In a similar manner, the forecast ML model 210 may receive time-series input data for wafer values of step₂ through step_A- 1 for the multiple events in the event sequence as well as time-series process parameters applied for step_A for the multiple events in the event sequence from fabrication event number “T- V_tail” to fabrication event number “T”. The time-series process parameters for stepA that the forecast ML model 210 may receive as inputs may be for any suitable process parameter applied, measured, or predicted for the semiconductor fabrication process for step_A. _{[0029] The time-series input data received by a forecast ML model (and} other models described herein) may thus be referred to as a tail. As continuing fabrication events occur (e.g., when the forecast ML model 210 is deployed to generate predicted future states for an active semiconductor fabrication process), the contents of the tail can change. This may be the case as the particular events (and their wafer values and applied process parameters) of the most-recent 500 fabrication events (or any other tail length) can change as fabrication events occur. Through time-series input data in tail-form, the forecast ML model 210 may ensure that consideration of the most-recent fabrication events are used to predict future state. Such tail-based input data may exclude less relevant or wafer values and process parameters from fabrication events that occurred relatively longer ago (in terms of event sequences), lessening any bias or inaccuracies or lessening the need to account for impact decay on the semiconductor fabrication process. _{[0030] In some implementations, the forecast ML model 210 may be} configured to receive input data specifically for a particular circuit design. For example, the fabrication control engine 110 may provide design-specific input data to the forecast ML model 210. Circuit designs may be differentiated based on any suitable means, which may be referred to herein as circuit design identifiers. Such identifiers may be in the form of ID values, text names, or in other data formats that the forecast ML model 210 may 202406809 determine. In some examples, a circuit design identifier may be provided as a separate input to the forecast ML model 210 or, as another example, embedded or included as part of the wafer values and process parameters input data. _{[0031] Circuit design-specific input data (including time-series input data)} may be used by forecast ML models to differentiate between circuit designs that are manufactured through a common toolset or semiconductor fabrication process. This may be the case as a semiconductor fabrication process may manufacture a product mix that includes a given circuit design and others as well, and thus fabrication events specifically for a given circuit design may represent some, but not all, of the fabrication events for a semiconductor fabrication process. In the example of Figure 2, the forecast ML model 210 receives an input through the circuit design identifier depicted as circuit design identifier_X, which may control or indicate the specific circuit design that the ML model 210 is to predict future states for. _{[0032] Through the provided input data, the forecast ML model 210 may} predict future states of a given circuit design at or up to a future time point, _{denoted as “T+∆”. The predicted future state may comprise wafer values of a} specific circuit design up to and at the future time point, in this case the wafer values upon performing stepA in the semiconductor fabrication process for manufacture of circuit design identifier_X. The predicted future states may comprise process parameters applied for stepA at the future time point. To explain further, some process parameters can be explicitly controlled for steps of a semiconductor fabrication process, whereas other process parameters are a result of a performance of the semiconductor fabrication process and susceptible to tool drift and time-based decay. Particle densities, chamber cleanliness metrics, or other tool-specific thresholds for preventative maintenance may be some examples of process parameters that are not explicitly controlled, any of which forecast ML models can be configured to _{predict. The forecast ML model 210 may predict values of such non-explicitly} controlled process parameters, thus providing predictions of tool drift or other causes that trigger tool maintenance. 202406809 _{[0033] Note that the forecast ML model 210 may predict future state for} multiple, different circuits, e.g., through adjustment of the circuit identifier input. For the same tail (e.g., the same time-series input data of the 500 most recent wafer fabrication events), the forecast ML model 210 may predict future states for any particular circuit design specified through the circuit identifier input, including for circuits that are not part of the time-series input data of the tail. To change the specific circuit design that the forecast ML model 210 predicts future states for, the fabrication control engine 110 may change the circuit design identifier input, e.g., from circuit design identifierX to circuit design identifierY to circuit design identifierJ, etc. For each change in circuit identifier, the fabrication control engine 110 may provide any relevant circuit- design specific data for the forecast ML model 110. Such circuit design- specific data may be in the form of a vector of relevant circuit design data, e.g., for circuit design identifier_X. Such data may include any product-specific data such as layout-specific data, geometry features, or any suitable design data that can be used to differentiate circuit designs. Circuit design-specific data may allow the forecast ML model 210 to properly adapt its predicted future states to a specific circuit design. Such circuit design-specific data may account for differences in geometry, impact, and design of different product mixes, and allow the forecast ML model 210 to properly predict future states that it has been trained for. _{[0034] As described herein, the fabrication control engine 110 may access} forecast ML models, such as the forecast ML model 210 in Figure 2 trained for step_A of a semiconductor fabrication process. The forecast ML model 210 described in Figure 2 provides various example technical features for forecast ML models of an ensemble of ML models according to the present disclosure. As noted herein, a given forecast ML model may be configured to predict future state specific to a particular step in the semiconductor fabrication process. An ensemble of ML models as described herein may include fabrication ML models for some or all of the steps in a semiconductor fabrication process, thus supporting future state predictions across an entire semiconductor fabrication process. The fabrication control engine 110 may 202406809 thus access, through an ensemble of ML models, a respective forecast ML model for each respective step of the semiconductor fabrication process (or multiple forecast ML models per step, each configured to predict a different wafer value and/or process parameters). _{[0035] The fabrication control engine 110 may access forecast ML models} in any number of ways. In some implementations, the fabrication control engine 110 may access forecast ML models by loading ML models from a local memory or accessing ML model capabilities over a network connection. In some implementations, the fabrication control engine 110 itself implements forecast ML models (or any other element of the ML model ensembles described herein). The fabrication control engine 110 may include or implement capabilities to train any of the ML models described herein, and various example features of training forecast ML models are described next with reference to Figure 3. _{[0036] Figure 3 shows an example training of multiple forecast ML models} according to the present disclosure. The fabrication control engine 110 may train any number of forecast ML models for an ensemble of ML models according to the present disclosure, including forecast ML model(s) specific to a particular step in a semiconductor fabrication process. In the example of Figure 3, training of forecast ML models are illustrated for various steps of a semiconductor fabrication process, including step₁, step₂, step_A-1, and step_A of the semiconductor fabrication process. The fabrication control engine 110 may implement or apply any suitable machine learning capability, algorithm, or technique to train or construct any of the ML models described herein, including the forecast ML models of Figure 3. In that regard, the fabrication control engine 110 may train ML models via any type of unsupervised, supervised, or semi-supervised machine learning models. Neural networks, reinforced learning models, or any other suitable machine learning implementations are contemplated herein, and the fabrication control engine 110 may construct or train any ML models of the present disclosure accordingly. 202406809 _{[0037] In the example of Figure 3, the fabrication control engine 110 may} train the forecast ML models labeled as 310, 320, 330, and 210. The fabrication control engine 110 may construct, implement, or train the forecast ML models 310, 320, 330, and 210 such that each forecast ML model is configured to predict future state for a particular step of a semiconductor fabrication process. In doing so, the fabrication control engine 110 may generate, access, or provide specific training data for each respective forecast ML model. In particular, the fabrication control engine 110 may provide training data for training of a forecast ML model for a given step in the semiconductor fabrication process that includes time-series wafer values for the given step as well as the previous steps in the semiconductor fabrication process. As another example, the fabrication control engine 110 may provide training data for training of a forecast ML model for the given step in the form of time-series process parameters applied for the given step. As forecast ML models can predict future state for multi-product mixes, the training data provided by the fabrication control engine 110 may comprise wafer values and process parameters for multiple different circuit designs, shown in Figure 3 via circuit design identifiers 1 through n, denoted as [1,n] in Figure 3. _{[0038] To further illustrate through Figure 3, the fabrication control engine} 110 may train the forecast ML model 310 for an initial step of a semiconductor fabrication process, referred to in this example as step₁. In this example, since there are no other prior steps in the semiconductor fabrication process, the fabrication control engine 110 may train the forecast ML model 310 with time- series training data specific to step₁ only. As seen in Figure 3, the training data provided by the fabrication control engine 110 to the forecast ML model 310 may include a time-series of wafer values measured for step1 of the semiconductor fabrication process. Such a time-series of wafer values for step₁ may be sequenced, e.g., numerically for an event sequence numbered from event “1” to event “T”. As noted herein, the event sequence may be configured in any suitable manner, e.g., as sequence of individual wafer fabrications through the semiconductor fabrication process. 202406809 _{[0039] The fabrication control engine 110 may train the forecast ML model} 310 for step1 of the semiconductor fabrication process with training data that comprises (1) wafer values measured for step1 for each event in an event sequence from event “1” to event “T” that includes wafer values for circuit designs from circuit design identifers_1-n and (2) process parameters applied for step1 for each event in the event sequence “1” through “T” for circuit design identifers_1-n. The wafer values of step₁ used to train the forecast ML model 310 for step₁ may be experimentally measured, as described herein. For the fabrication control technology described herein, the fabrication control engine 110 may train forecast ML models with training data for multiple different circuit designs, which may allow forecast ML models to predict future state for fabrications of multi-product mixes by semiconductor fabrication processes. In some implementations, the fabrication control engine 110 may provide circuit design identifiers_1-n as a separate input for the training data (e.g., as shown in Figure 3). Additionally or alternatively, such circuit design identifiers1-n may be included as part of the time-series wafer values and/or process parameters training data used to train the forecast ML model 310. _{[0040] In the example of Figure 3, the fabrication control engine 110 trains} the forecast ML model 310 for an initial process step in a semiconductor fabrication process (shown as step1). To train this particular forecast ML model 310, the fabrication control engine 110 may provide, as training data, wafer values that are experimentally measured. As used herein, experimentally-measured training data may refer to physical values measured from physically manufactured circuits or performance of the semiconductor fabrication process to physically manufacture the circuit. For a given step that a forecast ML model is being trained for, the fabrication control engine 110 may provide, as training data, experimentally-measured time-series wafer values for the given step (in this case, step₁ for the forecast ML model 310). For forecast ML models trained for subsequent steps in the fabrication process, the fabrication control engine 110 may additionally provide, as training data, time-series wafer values measured for prior steps in the 202406809 fabrication control process, including experimentally-measured and virtual wafer values for the prior steps. _{[0041] To illustrate through Figure 3, the fabrication control engine 110 may} train the forecast ML model 320 for step₂ of a semiconductor fabrication process. Step₂ of the semiconductor fabrication process may immediately follow step1. In this example, the fabrication control engine 110 may train the forecast ML model 320 with training data that comprises (1) wafer values measured for step₁ for each event in an event sequence from event “1” to event “T” that includes wafer values for circuit designs from circuit design identifers1-n (experimentally-measured and virtually-generated); (2) wafer values measured for step₂ for each event in an event sequence from event “1” to event “T” that includes wafer values for circuit designs from circuit design identifers1-n (experimentally-measured); and (3) process parameters applied for step₂ for each event in the event sequence “1” through “T” for circuit design identifers1-n. _{[0042] As used herein, virtual training data (e.g., wafer values for a given} step) may refer to any data that is not physically measured. Virtually- generated wafer values or other training data may be generated by ML models, including any of the various ML models described herein, or through any other suitable virtual tools. The fabrication control engine 110 may obtain and use virtually-generated wafer values for steps in a semiconductor fabrication process as training data in various ways. As one example, the fabrication control engine 110 may access virtually-generated wafer values for steps of the semiconductor fabrication process from monitor ML models, e.g., as described through ML models of the ‘066 patent. For training of the forecast ML model 220 for step2, the fabrication control engine 110 may access and use, as training data, wafer value virtually predicted for step₁ by a monitor ML model for step₁. In such examples, the fabrication control engine 110 may append or add event sequencing data to the virtually-predicted wafer values to ensure the input training data is in the form of time-series wafer values. 202406809 _{[0043] Additionally or alternatively, the fabrication control engine 110 may} access virtually-predicted wafer values for previous steps through trained forecast ML models for the previous steps. In the example of Figure 3, the fabrication control engine 110 may train the forecast ML model 310 for step₁ and use the trained forecast ML model 310 to generate virtually-predicted wafer values for step1 to use as training data to train the forecast ML model 320 for step₂. As training of the forecast ML model 320 may utilize time-series wafer values for step₁ for event sequences from events “1” to “T”, the fabrication control engine 110 may use the forecast ML model 310 to generate sequences of virtually-predicted wafer values. Such sequences of virtually- generated wafer values by the forecast ML model 310, including for different circuit designs, can be accessed and used by the fabrication control engine 110 to train the forecast ML model 320. . As the forecast ML models can predict future state, e.g., based on event sequencing, virtually-generated training data from forecast ML models for previous steps may be in time-series form and thus suitable for training of forecast ML models for subsequent steps in the semiconductor fabrication process. _{[0044] In Figure 3, the forecast ML model 320 is trained using an output from} the forecast ML model 310, in this case virtually-generated time-series wafer values for step1 of the semiconductor fabrication process. Note that the fabrication control engine 110 may provide experimentally-measured wafer values for step1 as training data to train the forecast ML model 320 for step2, e.g., which may overlap with the experimentally-measured training data used to train the forecast ML model 310 for step₁. Such experimentally-measured training data may be obtained separately from the forecast ML models, which provide virtually-generated training data. _{[0045] Thus, the fabrication control engine 110 may train a forecast ML} model for a given step in a semiconductor fabrication process using, at least in part, wafer values for the given step (experimentally-measured) and wafer values for some or all of the previous steps a semiconductor fabrication process (experimentally-measured and virtually-generated). In such a manner, the fabrication control engine 110 may successively train forecast ML 202406809 models for the various steps in the semiconductor fabrication process. Trained forecast ML models for previous steps can provide virtually-generated training data for the training of forecast ML models for subsequent steps in the semiconductor fabrication process. _{[0046] Such training with wafer values for a given step as well as previous} steps in the semiconductor fabrication process is further illustrated through the forecast ML models 330 and 210 in Figure 3. The fabrication control engine 110 may train the forecast ML model 210 to predict future state for stepA and train forecast ML model 330 for stepA-1. In this example, stepA-1 may denote the step in the semiconductor fabrication process that directly precedes step_A. _{[0047] For training the forecast model 330 for stepA-1, the fabrication control} engine 110 may provide, as training data, wafer values measured for step1 to step_A-1 for events in an event sequence from event “1” to event “T” that includes wafer values for circuit designs from circuit design identifers1-n and process parameters applied for stepA-1 for each event in the event sequence “1” through “T” for circuit design identifers_1-n. Note that forecast ML models trained for previous steps in the semiconductor fabrication process may provide virtually-generated training data. For training the forecast model 210 for stepA, which follows stepA-1, the fabrication control engine 110 may provide, as training data, wafer values measured for step₁ to step_A for events in an event sequence from event “1” to event “T” that includes wafer values for circuit designs from circuit design identifers1-n and process parameters applied for step_A for each event in the event sequence “1” through “T” for circuit design identifers_1-n. As the forecast ML model 330 is trained for a step previous to stepA in the semiconductor fabrication process, the fabrication control engine 110 may generate virtual training data through the forecast ML model 330 in the form of time-series wafer values predicted for step_A-1 and provide this virtual training data to train the forecast ML model 210. In a similar manner, the fabrication control engine 110 may provide virtual training data for the forecast ML model 210 through the trained forecast ML models 310 and 320 for step1 and step2 respectively. Training data for other steps in the 202406809 process may be likewise generated virtually and used to train the forecast ML model 210. _{[0048] In any consistent manner as described herein, the fabrication control} engine 110 may train forecast ML models to predict future state a future time points for the various steps of a semiconductor fabrication process. Given the nature of forecast ML models, it is possible to, through forecast ML models, can predict what future state will be at a given step in the semiconductor fabrication process, including the process parameters that result at a given step (absent explicit control of the process parameters). Thus, it is possible to use forecast ML models to solve for target future states, e.g., target process parameters through determination of what current input controls/states/wafer values are needed. Such a problem can be understood as a multivariate optimization problem, and thus it would be possible to represent such a problem through an optimization function that can be iteratively solved. However, such an implementation can be time-consuming and has a chance of non-convergence. Such an implementation would be less than ideal for time-sensitive control of semiconductor fabrication processes. Instead, the fabrication control engine 110 may implement, train, or otherwise configure optimization ML models for any number of steps of the semiconductor fabrication process, example features of which are described next with reference to Figure 4. _{[0049] Figure 4 shows an example of an optimization ML model according} to the present disclosure. The example of Figure 4 may illustrate a trained optimization ML model through which the fabrication control engine 110 can determine optimal process parameters to apply at a step in a fabrication semiconductor fabrication process to achieve target process parameters at a future time point. The fabrication control engine 110 may train, access, or use optimization ML models configured to predict optimal process parameters to expressly apply to a given step of the semiconductor fabrication process at a given future time point for the given step of the semiconductor fabrication process to achieve target wafer values. As such, a optimization ML model for a given step of the semiconductor fabrication process may take, as inputs, (1) 202406809 the target wafer values for the given future time point; (2) wafer values for previous steps in the semiconductor fabrication process for a sequence of fabrications of the given circuit design; (3) process parameters applied for the given step of the semiconductor fabrication process for the sequence of fabrications of the given circuit design; and (4) a circuit design identifier of the given circuit design (either as an express input or data embedded through the other provided inputs). Optimization ML models may be trained or used for any given step of the semiconductor fabrication process, and part of an ensemble of ML models accessed by the fabrication control engine 110. The time-series input data received by optimization ML models may be in tail form, in a similar manner as the forecast ML models described herein. Thus, the fabrication control engine 110 may specify a tail value for optimization ML models, e.g., Vtail = 500. _{[0050] To illustrate through Figure 4, an optimization ML model 410 is} illustrated. The optimization ML model 410 may be configured or trained specifically for stepA of the semiconductor fabrication process, including to determine (e.g., output) optimal process parameters to apply at step_A at a _{given future time point denoted as “T+∆” to achieve target wafer values for} stepA at the given future time point. In Figure 4, the optimization ML model 410 receives, as an input, the target wafer values for stepA at the given future time point, which may be user-specified, predetermined according to manufacturing standards, algorithmically-determined, or otherwise obtained. The optimization ML model 410 may also receive, as inputs, time-series wafer values for events “T- V_tail” to “T” for steps in the semiconductor fabrication process preceding step_A (in this case time-series wafer values measured from step1 to stepA-1 of the semiconductor fabrication process) as well as time- series process parameters applied for step_A in the semiconductor fabrication process. As with other ML models of the present disclosure, the optimization ML model 410 may receive, as an input, a circuit design identifier that specifies a particular circuit design that the optimal process parameter determination applies to, shown as the circuit design identifier_X in the example of Figure 4. Such an input may be expressly provided or may be embedded or otherwise 202406809 specified in the other provided input data, which may be specific to a particular circuit design. In a consistent manner as described herein, the circuit design identifier may additionally or alternatively include any relevant circuit design- specific data (e.g., baseline or target wafer values and process parameters for steps of the semiconductor fabrication process). _{[0051] Through the optimization ML model 410, the fabrication control} engine 110 may quickly and efficiently determine optimal process parameters to apply for a process step at a future time point to achieve target wafer values for the process step. In that regard, the optimization ML model 410 may make such a determination with increased efficiency and speed as compared to a real-time solving of a multi-variate optimization problem through use of multiple forecast ML models. Computational latency for use of optimization ML models may be addressed during ML training phases, allowing for efficient and reliable use of real-time predictions and fabrication process adjustments through trained optimization ML models. Example features of optimization ML model training are described next with reference to Figure 5. _{[0052] Figure 5 shows an example training of an optimization ML model} according to the present disclosure. The fabrication control engine 110 may train any number of optimization ML models for an ensemble of ML models according to the present disclosure, including optimization ML model(s) specific to a particular step in a semiconductor fabrication process. In the example of Figure 5, training of the optimization ML model 410 is illustrated for stepA of the semiconductor fabrication process. The fabrication control engine 110 may implement or apply any suitable machine learning capability, algorithm, or technique to train or construct any of the ML models described herein, including the optimization ML model 410 of Figure 5 and optimization ML models for other steps of the semiconductor fabrication process. In that regard, the fabrication control engine 110 may train ML models via any type of unsupervised, supervised, or semi-supervised machine learning models. Neural networks, reinforced learning models, or any other suitable machine learning implementations are contemplated herein. 202406809 _{[0053] In the example of Figure 5, the fabrication control engine 110 may} train the optimization ML model 410 to determine optimal process parameters to apply for stepA of the semiconductor fabrication process. In doing so, the fabrication control engine 110 may generate, access, or provide specific training data for the optimization ML model 410. As the fabrication control engine 110 may train the optimization ML model to determine optimal process _{parameters at a given future time point “T+∆”, the fabrication control engine} 110 may partition the training data in two classes. One class may include time-series training data for an event sequence up to event “T” and another _{class may include time-series training data from events “T” (or “T+1”) to “T+∆”.} This way, during prediction, the fabrication control engine 110 can set the _{target wafer values for the given future time point “T+∆” and the optimization} ML model can determine the set of process conditions that lead to such target, referred to herein as the optimal process parameters. The value of “T” may be configurable by the fabrication control engine 110, as may the value of “∆”. Accordingly, the fabrication control engine 110 may flexibly delineate between the different classes of training data, supporting increased learning effectiveness for optimization ML models and increased capabilities in optimal process parameter determinations. _{[0054] In the example of Figure 5, the fabrication control engine 110 may} provide training data for training of an optimization ML model for a given step in the semiconductor fabrication process of a first class. This first class of training data may include time-series wafer values for the given step as well as the previous steps in the semiconductor fabrication process for the event sequence of “1” to “T”. As also part of the first class of training data, the fabrication control engine 110 may provide time-series process parameters applied for step_A for the event sequence of “1” to “T”. For the first class of training data for events “1” to “T”, the fabrication control engine 110 may access and provide training data that is experimentally-measured, virtually- generated, or a combination of both. _{[0055] As an example, virtual generation of time-series wafer values for} different steps of the semiconductor fabrication process may be generated by 202406809 trained forecast ML models. In the example of Figure 5, the forecast ML model 310 trained for step1 may provide virtually-generated time-series wafer values for step1. In a consistent manner, the forecast ML model 330 trained for stepA- ₁ may provide virtually-generated time-series wafer values for step_A-1. In some implementations, the fabrication control engine 110 may train forecast ML models prior to training of optimization ML models, thus allowing for the generation of virtual training data by trained forecast ML models for the training of optimization ML models. Experimentally-measured training data may be accessed and provided through physical measurements. The process parameters provided as training data for stepA for the event sequence of “1” to “T” may be experimentally-measured. _{[0056] For the second class of training data, the fabrication control engine} 110 may provide training data for training of an optimization ML model for a given step in the semiconductor fabrication process. This second class of training data for the optimization ML model 410 may include time-series wafer values for the given step in the semiconductor fabrication process for the _{event sequence of “T” (or “T+1”) to “T+∆”. As also part of the second class of} training data, the fabrication control engine 110 may also provide time-series process parameters applied for stepA for the event sequence of “T” (or “T+1”) _{to “T+∆”. For the second class of training data for events “T” (or “T+1”) to} “T+∆”, the fabrication control engine 110 may access and provide training data that is experimentally-measured. As such, the fabrication control engine 110 may limit the second class of training data to exclude virtually-generated training data, using physically-measured wafer values and process parameters for the second class of training data. _{[0057] As optimization ML models can determine optimal process} parameters for multi-product mixes, the training data provided by the fabrication control engine 110 may comprise wafer values and process parameters for multiple different circuit designs, shown in Figure 5 via circuit design identifiers 1 through n, denoted as [1,n] in Figure 5. _{[0058] Thus, the fabrication control engine 110 may train optimization ML} models via multiple classes of training data as described herein. The training 202406809 of the optimization ML model 410 in Figure 5 for step_A provides an illustrative example, and the fabrication control engine 110 may train optimization ML models for any given step of a semiconductor fabrication process. Training and use of such optimization ML models may provide increased flexibility and efficiency in monitoring and adapting process parameters for semiconductor fabrication processes for multi-product mixes, which can result in increased yield, reduced down-time, and fabrication efficiency. _{[0059] Through combinations of ML models as described herein, the} fabrication control engine 110 may support and implement any number of fabrication control features. Example features of ML model ensembles that can support fabrication control are described next with reference to Figure 6. _{[0060] Figure 6 shows an example of an ensemble of ML models for a} semiconductor fabrication process according to the present disclosure. In the example of Figure 6, an ensemble of ML models 600 is illustrated that includes ML models configured for specific steps of a semiconductor fabrication process, shown as stepA-1, stepA, and stepA+1, which may be consecutive steps in the semiconductor fabrication process. For a given step in the semiconductor fabrication process, the fabrication control engine 110 may configure, train, access, or use a monitor ML model for the given step, a forecast ML model for the given step, an optimization ML model for the given step, or any combination thereof. Thus, the ensemble may include a respective monitor ML model, forecast ML model, and optimization ML model for stepA-1, a respective monitor ML model, forecast ML model, and optimization ML model for step_A, and a respective monitor ML model, forecast ML model, and optimization ML model for step_A+1. Similar configurations of ML models may be included in the ensemble for any other steps of the semiconductor fabrication process as well. _{[0061] For an ensemble of ML models, the various ML models for a step may} interact (via input and output data) with the various ML models of other steps in the semiconductor fabrication process. In Figure 6, the output of each ML model for a prior step can interact or is otherwise linked as an input to each ML model of a next step in the semiconductor fabrication process. ML models 202406809 for non-consecutive steps in the semiconductor fabrication process can interact as well. Example interactions and features are described herein. _{[0062] As one example, the ensemble of ML models 600 may support} monitoring of a process flow, as outputs of monitor ML models may be provided as inputs to monitor ML models for subsequent steps in the semiconductor fabrication process. In such a manner, wafer values can be predicted for a given step that account for monitored or virtually-generated wafer values from previous steps in the semiconductor fabrication process, example features of which are described in greater detail in the ’066 patent. As another example, outputs of forecast ML model models may be provided as inputs to monitor ML models for subsequent steps in the semiconductor fabrication process. By doing so, the fabrication control engine 110 can test future states in a semiconductor fabrication process, including across a multi- product mix. Such interactions may provide a virtual process exploration of normal operation of the semiconductor fabrication process (e.g., without explicit process control and manual adaptation, adjustment, or control of applied process parameters). _{[0063] As yet another example, outputs of optimization ML model models} may be provided as inputs to monitor ML models for subsequent steps in the semiconductor fabrication process. By doing so, the fabrication control engine 110 can test future states in a semiconductor fabrication process, including across a multi-product mix that involve active process control. Such interactions may provide a virtual process exploration of actively-controlled operation of the semiconductor fabrication process (e.g., with explicit process control and with manual adaptation, adjustment, or control of applied process parameters). Any combination of interactions can be supported between ML models of various steps in the semiconductor fabrication process, and specific interaction paths can be dynamically determined by the fabrication control engine 110. As model evaluation and operation of ML models can be relatively quick (e.g., less than 1 second output determinations in many cases), the fabrication control engine 110 can explore a large number of use cases via the ensemble of ML models 600 for a semiconductor fabrication 202406809 process. Through such exploration, the fabrication control engine 110 can determine optimal product mixes, improved downtime scheduling, optimal operation and process parameter control across multi-product mixes, and more. _{[0064] Through the fabrication control technology described herein (e.g., via} ensembles of ML models), the fabrication control engine 110 may perform any number or type of control operations for the semiconductor fabrication process. A control operation may refer to any operation, task, adjustment, or action to change a semiconductor fabrication process. Example control operations may thus include performing or rescheduling of downtime and tool repairs, adjusting an order or sequence of circuit designs for fabrication, explicit control or adjustment of applied process parameters for one or more steps in the semiconductor fabrication process, and more. _{[0065] The fabrication control engine 110 may perform control operations} responsive to any criteria, which may be based on the exploration, optimization, or predicted future states of wafer values or process steps determined through any of the ML models described herein. For instance, the fabrication control engine 110 may perform a control operation responsive to a determination that the predicted wafer value or the predicted process parameters for the given step of the semiconductor fabrication process at the given future time point fail to satisfy an acceptable threshold. Such thresholds may be individually specified or configured according to predetermined standards. Thresholds applied by the fabrication control engine 110 may be specific to any particular wafer value, metrology value, process parameter, or other measurable aspect of a semiconductor fabrication process. As such, the ensemble of ML models described herein may be leveraged and utilized to control operation of semiconductor fabrication processes in increasingly flexible, adaptable, and effective ways, including with real-time adjustments during fabrications or adaptations and forecasting for future circuit design fabrications. _{[0066] Figure 7 shows an example of logic 700 that a system may implement} to support control of semiconductor fabrication processes through an 202406809 ensemble of ML models. For example, the computing system 100 may implement the logic 700 as hardware, executable instructions stored on a machine-readable medium, or as a combination of both. The computing system 100 may implement the logic 700 via the fabrication control engine 110, through which the computing system 100 may perform or execute the logic 700 as a method. The following description of the logic 700 is provided using the fabrication control engine 110 as an example. However, other implementation options by computing systems are possible. _{[0067] In implementing the logic 700, the fabrication control engine 110 may} control a semiconductor fabrication process for circuit designs (702). Such control by the fabrication control engine 110 may include accessing an ensemble of ML models for the semiconductor process (704), and the ensemble of ML models may include a given forecast ML model configured to predict a wafer value and process parameters for a given step of the semiconductor fabrication process at a given future time point for a given circuit design. Control by the fabrication control engine 110 may also include performing a control operation for the semiconductor fabrication process responsive to a determination that the predicted wafer value or the predicted process parameters for the given step of the semiconductor fabrication process at the given future time point fail to satisfy an acceptable threshold (706). _{[0068] The logic 700 shown in Figure 7 provides an illustrative example by} which a computing system 100 may support control of semiconductor fabrication processes through an ensemble of ML models according to the present disclosure. Additional or alternative steps in the logic 700 are contemplated herein, including according to any of the various features described herein for the fabrication control engine 110. _{[0069] Figure 8 shows an example of a computing system 800 that supports} control of semiconductor fabrication processes through an ensemble of ML models. The computing system 800 may include a processor 810, which may take the form of a single or multiple processors. The processor(s) 810 may include a central processing unit (CPU), microprocessor, or any hardware 202406809 device suitable for executing instructions stored on a machine-readable medium. The computing system 800 may include a machine-readable medium 820. The machine-readable medium 820 may take the form of any non-transitory electronic, magnetic, optical, or other physical storage device that stores executable instructions, such as the fabrication control instructions 822 shown in Figure 8. As such, the machine-readable medium 820 may be, for example, Random Access Memory (RAM) such as a dynamic RAM (DRAM), flash memory, spin-transfer torque memory, an Electrically-Erasable Programmable Read-Only Memory (EEPROM), a storage drive, an optical disk, and the like. _{[0070] The computing system 800 may execute instructions stored on the} machine-readable medium 820 through the processor 810. Executing the instructions (e.g., the fabrication control instructions 822) may cause the computing system 800 to perform or implement any of the fabrication control technology described herein, including according to any aspect of the fabrication control engine 110. _{[0071] For example, execution of the fabrication control instructions 822 by} the processor 810 may cause the computing system 800 to control a semiconductor fabrication process for circuit designs, including by accessing an ensemble of ML models for the semiconductor process The ensemble of ML models may include a given forecast ML model configured to predict a wafer value and process parameters for a given step of the semiconductor fabrication process at a given future time point for a given circuit design. Execution of the fabrication control instructions 822 by the processor 810 may cause the computing system 800 to control the semiconductor fabrication process also by performing a control operation for the semiconductor fabrication process responsive to a determination that the predicted wafer value or the predicted process parameters for the given step of the semiconductor fabrication process at the given future time point fail to satisfy an acceptable threshold. 202406809 _{[0072] Any additional or alternative aspects of the fabrication control} technology as described herein may be implemented via the fabrication control instructions 822. _{[0073] The systems, methods, devices, and logic described above, including} the fabrication control engine 110, may be implemented in many different ways in many different combinations of hardware, logic, circuitry, and executable instructions stored on a machine-readable medium. For example, the fabrication control engine 110 may include circuitry in a controller, a microprocessor, or an application specific integrated circuit (ASIC), or may be implemented with discrete logic or components, or a combination of other types of analog or digital circuitry, combined on a single integrated circuit or distributed among multiple integrated circuits. A product, such as a computer program product, may include a storage medium and machine-readable instructions stored on the medium, which when executed in an endpoint, computer system, or other device, cause the device to perform operations according to any of the description above, including according to any features of the fabrication control engine 110. _{[0074] The processing capability of the systems, devices, and engines} described herein, including the fabrication control engine 110, may be distributed among multiple system components, such as among multiple processors and memories, optionally including multiple distributed processing systems or cloud/network elements. Parameters, databases, and other data structures may be separately stored and managed, may be incorporated into a single memory or database, may be logically and physically organized in many different ways, and may be implemented in many ways, including data structures such as linked lists, hash tables, or implicit storage mechanisms. Programs may be parts (e.g., subroutines) of a single program, separate programs, distributed across several memories and processors, or implemented in many different ways, such as in a library (e.g., a shared library). _{[0075] While various examples have been described above, many more} implementations are possible.

Claims

202406809 CLAIMS _{1. A method comprising:} controlling, by a computing system, a semiconductor fabrication process for circuit designs, including by: accessing an ensemble of machine-learning (ML) models for the semiconductor process, wherein the ensemble of ML models comprises a given forecast ML model configured to predict a wafer value and process parameters for a given step of the semiconductor fabrication process at a given future time point for a given circuit design; and performing a control operation for the semiconductor fabrication process responsive to a determination that the predicted wafer value or the predicted process parameters for the given step of the semiconductor fabrication process at the given future time point fail to satisfy an acceptable threshold. _{2. The method of claim 1, wherein the ensemble of ML models further} comprises a respective forecast ML model for each other respective step of the semiconductor fabrication process. _{3. The method of claim 1 or 2, wherein the given forecast ML model for} the given step of the semiconductor fabrication process takes, as inputs: wafer values for previous steps in the semiconductor fabrication process for a sequence of fabrications of the given circuit design; process parameters applied for the given step of the semiconductor fabrication process for the sequence of fabrications of the given circuit design; and a circuit design identifier of the given circuit design. _{4. The method of any of claims 1-3, wherein the ensemble of ML models} further comprises a given optimization ML model configured to predict optimal process parameters to expressly apply to the given step of the 202406809 semiconductor fabrication process at the given future time point for the given step of the semiconductor fabrication process to achieve target wafer values. 5. The method of claim 4, wherein the given optimization ML model for the given step of the semiconductor fabrication process takes, as inputs: the target wafer values for the given future time point; wafer values for previous steps in the semiconductor fabrication process for a sequence of fabrications of the given circuit design; process parameters applied for the given step of the semiconductor fabrication process for the sequence of fabrications of the given circuit design; and a circuit design identifier of the given circuit design. _{6. The method of claims 4 or 5, wherein the ensemble of ML models} further comprises a respective optimization ML model for each other respective step of the semiconductor fabrication process. _{7. The method of claim 1, wherein performing the control operation} comprises rescheduling fabrication of the given circuit design through the semiconductor fabrication process until after a maintenance process has been performed on a tool used in the semiconductor fabrication process. _{8. A system comprising:} a processor; and a non-transitory machine-readable medium comprising instructions that, when executed by the processor, cause a computing system to control a semiconductor fabrication process for circuit designs, including by: accessing an ensemble of machine-learning (ML) models for the semiconductor process, wherein the ensemble of ML models comprises a given forecast ML model configured to predict a wafer value and process parameters for a given step of the semiconductor 202406809 fabrication process at a given future time point for a given circuit design; and performing a control operation for the semiconductor fabrication process responsive to a determination that the predicted wafer value or the predicted process parameters for the given step of the semiconductor fabrication process at the given future time point fail to satisfy an acceptable threshold. _{9. The system of claim 8, wherein the ensemble of ML models further} comprises a respective forecast ML model for each other respective step of the semiconductor fabrication process. 10. The system or claim 8 or 9, wherein the given forecast ML model for the given step of the semiconductor fabrication process takes, as inputs: wafer values for previous steps in the semiconductor fabrication process for a sequence of fabrications of the given circuit design; process parameters applied for the given step of the semiconductor fabrication process for the sequence of fabrications of the given circuit design; and a circuit design identifier of the given circuit design. 11. The system of any of claims 8-10, wherein the ensemble of ML models further comprises a given optimization ML model configured to predict optimal process parameters to expressly apply to the given step of the semiconductor fabrication process at the given future time point for the given step of the semiconductor fabrication process to achieve target wafer values. 12. The system of claim 8, wherein the given optimization ML model for the given step of the semiconductor fabrication process takes, as inputs: the target wafer values for the given future time point; 202406809 wafer values for previous steps in the semiconductor fabrication process for a sequence of fabrications of the given circuit design; process parameters applied for the given step of the semiconductor fabrication process for the sequence of fabrications of the given circuit design; and a circuit design identifier of the given circuit design. 13. The system of claim 11 or 12, wherein the ensemble of ML models further comprises a respective optimization ML model for each other respective step of the semiconductor fabrication process. 14. The system of claim 8, wherein the instructions cause the computing system to perform the control operation by rescheduling fabrication of the given circuit design through the semiconductor fabrication process until after a maintenance process has been performed on a tool used in the semiconductor fabrication process. 15. A non-transitory machine-readable medium comprising instructions that, when executed by a processor, cause a computing system to perform a method according to any of claims 1-7.