WO2025263823A1 - Electronic device comprising printed circuit boards bonded to each other, and manufacturing method therefor - Google Patents

Abstract

This electronic device may comprise a first PCB, a second PCB, conductive materials, and non-conductive materials. The first PCB can include a first substrate, a first non-conductive layer, and first conductive pads positioned in each of corresponding openings in the first non-conductive layer. The second PCB can include a second substrate, a second non-conductive layer, and second conductive pads positioned in each of corresponding openings in the second non-conductive layer. The conductive materials can be disposed between the first conductive pads and the second conductive pads corresponding to each of the first conductive pads. The non-conductive materials can encompass each of the conductive materials. Each of first openings in the first non-conductive layer can be connected to each of second openings in the second non-conductive layer according to the first non-conductive layer making contact with the second non-conductive layer. The first openings and the second openings can provide spaces for accommodating the first conductive pads, the second conductive pads, the conductive materials and the non-conductive materials.

Description

Electronic device comprising interconnected printed circuit boards and method for manufacturing the same

The present disclosure relates to an electronic device including interconnected printed circuit boards and a method for manufacturing the same.

An electronic device may include a printed circuit board (PCB) on which various components are arranged. The PCB may be connected to another PCB. For example, the PCB and the other PCB may be bonded by positioning a pad portion of the other PCB over the pad portion of the PCB and then applying pressure and heating.

The above information may be provided as background art to aid in understanding the present disclosure. No claim or determination is made as to whether any of the above is applicable as prior art in connection with the present disclosure.

In one embodiment, an electronic device may include a first printed circuit board (PCB), a second PCB, conductive materials, and non-conductive materials. The first PCB may include a first substrate; a first non-conductive layer disposed on the first substrate, the first non-conductive layer including first openings; and first conductive pads disposed on the first substrate, the first non-conductive layer being positioned in corresponding openings of the first openings of the first non-conductive layer, respectively. The second PCB may include a second substrate; a second non-conductive layer disposed on the second substrate, the second non-conductive layer facing the first non-conductive layer, the second non-conductive layer being positioned in corresponding openings of the second openings of the second non-conductive layer, the second conductive pads being positioned in corresponding openings of the second non-conductive layer, respectively, and facing the first conductive pads, respectively. The conductive materials may be disposed between the first conductive pads and second conductive pads corresponding to each of the first conductive pads. Non-conductive materials may surround each of the conductive materials. As the first non-conductive layer contacts the second non-conductive layer, the first openings and the second openings corresponding to each of the first openings may be connected. The first openings and the second openings corresponding to each of the first openings may provide a space for accommodating the first conductive pads, the second conductive pads, the conductive materials, and the non-conductive materials.

In one embodiment, a method of manufacturing an electronic device may include: soldering solder bumps to each of the first conductive pads of the first PCB; attaching a non-conductive layer to the first PCB or the second PCB so as to cover the solder bumps of the first PCB or the second conductive pads of the second PCB; aligning the first PCB and the second PCB so that the non-conductive layer is positioned between the first PCB and the second PCB; and vertically hot pressing the aligned first PCB and the second PCB so that the conductive materials are formed from the solder bumps and the non-conductive materials are formed from the non-conductive layer.

In one embodiment, an electronic device may include a first PCB including a first pad portion; and a second PCB including a second pad portion coupled to the first pad portion of the first PCB. The first pad portion of the first PCB may include a first solder mask layer having a first opening area; and a first conductive pad positioned within the first opening area of the first solder mask layer. The second pad portion of the second PCB may include a second solder mask layer having a second opening area; and a second conductive pad positioned within the second opening area of the second solder mask layer so as to face the first conductive pad of the first PCB. The second solder mask layer may be in contact with the first solder mask layer such that the second opening area and the first opening area are connected. The electronic device may include: solder that connects the first conductive pad and the second conductive pad and is disposed within a space including the first opening area and the second opening area; and a non-conductive material that is disposed within the space so as to at least partially surround the solder.

In one embodiment, a board assembly may include a first printed circuit board (PCB), a second PCB, conductive materials, and non-conductive materials. The first PCB may include a first substrate; a first non-conductive layer disposed on the first substrate, the first non-conductive layer including first openings; and first conductive pads disposed on the first substrate, the first non-conductive layer being positioned in corresponding openings of the first openings of the first non-conductive layer, respectively. The second PCB may include a second substrate; a second non-conductive layer disposed on the second substrate, the second non-conductive layer facing the first non-conductive layer, the second non-conductive layer being positioned in corresponding openings of the second openings of the second non-conductive layer, respectively, facing the first conductive pads. The conductive materials may be disposed between the first conductive pads and second conductive pads corresponding to each of the first conductive pads. Non-conductive materials may surround each of the conductive materials. As the first non-conductive layer contacts the second non-conductive layer, the first openings and the second openings corresponding to each of the first openings may be connected. The first openings and the second openings corresponding to each of the first openings may provide a space for accommodating the first conductive pads, the second conductive pads, the conductive materials, and the non-conductive materials.

In connection with the description of the drawings, the same or similar reference numerals may be used for the same or similar components.

FIG. 1A is a diagram illustrating an electronic device according to one embodiment.

FIG. 1b is a diagram illustrating printed circuit boards (PCBs) of an electronic device according to one embodiment.

FIG. 2 is a drawing showing interconnected PCBs of an electronic device according to one embodiment.

FIG. 3 is a drawing showing interconnected PCBs of an electronic device according to one embodiment.

FIG. 4 is a drawing showing interconnected PCBs of an electronic device according to one embodiment.

FIG. 5 is a flowchart illustrating a method for manufacturing interconnected PCBs of an electronic device according to one embodiment.

FIG. 6A is a drawing illustrating a method for manufacturing interconnected PCBs of an electronic device according to one embodiment.

FIG. 6b is a drawing illustrating a method for manufacturing interconnected PCBs of an electronic device according to one embodiment.

FIG. 6c is a drawing illustrating a method for manufacturing interconnected PCBs of an electronic device according to one embodiment.

FIG. 6d is a drawing illustrating a method for manufacturing interconnected PCBs of an electronic device according to one embodiment.

FIG. 7 is a block diagram of an electronic device within a network environment according to various embodiments.

Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings so that those skilled in the art can easily implement the present disclosure. However, the present disclosure may be implemented in various different forms and is not limited to the embodiments described herein. In connection with the description of the drawings, the same or similar reference numerals may be used for identical or similar components. Furthermore, in the drawings and related descriptions, descriptions of well-known functions and configurations may be omitted for clarity and conciseness.

FIG. 1A is a diagram illustrating an electronic device according to one embodiment.

FIG. 1b is a diagram illustrating printed circuit boards (PCBs) of an electronic device according to one embodiment.

Referring to FIG. 1A, according to one embodiment, an electronic device (10) may include a housing forming an exterior of the electronic device (10). For example, the housing of the electronic device (10) may include a head portion (11) and a shaft portion (12) extending from the head portion (11). However, the shape of the housing of the electronic device (10) is not limited to the illustrated example.

In one embodiment, the electronic device (10) may include a speaker for outputting sound (e.g., the sound output module (755) of FIG. 7). In one embodiment, the electronic device (10) may be an audio output device such as a headphone, a headset, earphones, earbuds, or a speaker, but is not limited thereto. For example, the electronic device (10) may include various types of devices. For example, the electronic device (10) may include a portable communication device such as a smart phone, an electronic watch, an electronic ring, or a wearable device such as a head mounted display (HMD). For example, the electronic device may include a computer device, a portable multimedia device, a portable medical device, a camera, or a home appliance device.

In one embodiment, the electronic device (10) may include a first PCB (100), a second PCB (200), and a semiconductor package (300) disposed within the housing. At least some of the hardware components of the electronic device (10), for example, a processor (e.g., processor (720) of FIG. 7), a memory (e.g., memory (730) of FIG. 7), and a communication circuit (e.g., communication module (790) of FIG. 7) of the electronic device (10), may be integrated into the semiconductor package (300). The semiconductor package (300) may be referred to as a system in package (SiP) or a system on package (SoP).

Referring to FIG. 1B, the first PCB (100) may be placed between the second PCB (200) and the semiconductor package (300). The first PCB (100) and the second PCB (200) may be physically and electrically connected, and the second PCB (200) and the semiconductor package (300) may be physically and electrically connected. The semiconductor package (300) and the first PCB (100) may be electrically connected via the second PCB (200).

In one embodiment, the first PCB (100) may be coupled to the second PCB (200). For example, the first PCB (100) may include a first pad portion (101), and the second PCB (200) may include a second pad portion (201). For example, the first pad portion (101) of the first PCB (100) may be coupled to the second pad portion (201) of the second PCB (200). For example, the first pad portion (101) of the first PCB (100) may be bonded to the second pad portion (201) of the second PCB (200). For example, the first pad portion (101) of the first PCB (100) may include first conductive pads (130). The first conductive pads (130) may be electrically connected to the second conductive pads of the second PCB (200) (e.g., the second conductive pads (230) of FIG. 2), respectively. Each of the first pad portion (101) and the second pad portion (201) may be referred to as a bonding portion, a joining portion, or a connecting portion. In one embodiment, the first PCB (100) and the second PCB (200) bonded to the first PCB (100) may be referred to as a substrate assembly. The substrate assembly may further include a semiconductor package (300).

In the following, duplicate descriptions of components having the same reference numerals shown in different drawings may not be repeated. In the following description, reference numerals in other drawings may be referred to.

Hereinafter, in FIG. 2, the bonding structure of the first pad portion (101) of the first PCB (100) and the second pad portion (201) of the second PCB (200) is described.

FIG. 2 is a drawing showing interconnected PCBs of an electronic device according to one embodiment.

Referring to FIG. 2, according to one embodiment, a first PCB (100) (or first pad portion (101)) may include a first substrate (110), a first non-conductive layer (120), and first conductive pads (130).

For example, the first non-conductive layer (120) may be disposed on the first substrate (110). For example, the first non-conductive layer (120) may at least partially form a surface of the first PCB (100). For example, the first non-conductive layer (120) may include first openings (125). The first openings (125) may be referred to as, for example, first opening areas or first opening portions of the first non-conductive layer (120).

For example, the thickness of the first non-conductive layer (120) of the first PCB (100) may be greater than the thicknesses of the first conductive pads (130). For example, the thickness of the first non-conductive layer (120) of the first PCB (100) may be, but is not limited to, about 20 μm to about 100 μm. The first non-conductive layer (120) of the first PCB (100) may be referred to as a solder resist, a solder resist layer, a solder mask, a solder mask layer, an insulating layer, or a protective layer.

For example, the first conductive pads (130) may be disposed on the first substrate (110). For example, the first conductive pads (130) may be respectively positioned within the first openings (125) of the first non-conductive layer (120). For example, the first conductive pads (130) may be formed of an electrically conductive material. For example, the first conductive pads (130) may be formed of, but are not limited to, copper. For example, the thicknesses of the first conductive pads (130) may be, but are not limited to, about 10 μm to 20 μm.

For example, the diameter (D1) of each of the first conductive pads (130), such as a non-solder mask defined pad (NSMD pad), may be formed to be smaller than the diameter (D2) of each of the first openings (125) so as to be spaced apart from the first non-conductive layer (120), but is not limited thereto. For example, the diameter (D1) of each of the first conductive pads (130), such as a solder mask defined pad (SMD pad), may be formed to be equal to or greater than the diameter (D2) of each of the first openings (125) so as to be in contact with the first non-conductive layer (120). When the diameter (D1) of each of the first conductive pads (130) is formed to be larger than the diameter (D2) of each of the corresponding first openings (125), the edge portion of each of the first conductive pads (130) may be covered by the first non-conductive layer (120).

In one embodiment, the first PCB (100) (or the first pad portion (101)) may include a first conductive pattern, such as a conductive pattern (135), positioned in a different layer from the first conductive pads (130). For example, the first substrate (110) may be formed of one or more substrates. For example, the first substrate (110) may include one or more dielectric substrates. For example, the first conductive pads (130) may be formed on one surface of a first dielectric substrate of the first substrate (110), and the first conductive pattern may be formed on the other surface of the first dielectric substrate of the first substrate (110) or on one surface of a second dielectric substrate of the first substrate (110). In one embodiment, the first PCB (100) (or the first pad portion (101)) may not include a conductive via that at least partially penetrates one or more of the dielectric substrates of the first substrate (110). For example, the first pad portion (101) of the first PCB (100) may not include a conductive via that penetrates the first dielectric substrate of the first substrate (110) on which the first conductive pads (130) are positioned.

According to one embodiment, the second PCB (200) (or second pad portion (201)) may include a second substrate (210), a second non-conductive layer (220), and second conductive pads (230).

For example, the second non-conductive layer (220) may be disposed on the second substrate (210). For example, the second non-conductive layer (220) may at least partially form a surface of the second PCB (200). For example, the second non-conductive layer (220) may face the first non-conductive layer (120). For example, the second non-conductive layer (220) may include second openings (225). The second openings (225) may be referred to as, for example, second opening areas or second opening portions of the second non-conductive layer (220).

For example, the second openings (225) of the second non-conductive layer (220) may correspond to each of the first openings (125) of the first non-conductive layer (120). For example, the thickness of the second non-conductive layer (220) of the second PCB (200) may be greater than the thicknesses of the second conductive pads (230). For example, the thickness of the second non-conductive layer (220) of the second PCB (200) may be, but is not limited to, about 20 μm to about 100 μm. The second non-conductive layer (220) of the second PCB (200) may be referred to as a solder resist, a solder resist layer, a solder mask, a solder mask layer, an insulating layer, or a protective layer.

For example, the second conductive pads (230) may be disposed on the second substrate (210). For example, the second conductive pads (230) may be respectively positioned within the second openings (225) of the second non-conductive layer (220). For example, each of the second conductive pads (230) may face each of the first conductive pads (130). For example, the second conductive pads (230) may be formed of an electrically conductive material. For example, the second conductive pads (230) may be formed of, but are not limited to, copper. For example, the thicknesses of the second conductive pads (230) may be, but are not limited to, about 10 μm to 20 μm.

For example, as in the NSMD pad, the diameter (D3) of each of the second conductive pads (230) may be formed to be smaller than the diameter (D4) of each of the second openings (225) so as to be spaced apart from the second non-conductive layer (220), but is not limited thereto. For example, as in the SMD pad, the diameter (D3) of each of the second conductive pads (230) may be formed to be equal to or larger than the diameter (D4) of each of the second openings (225) so as to be in contact with the second non-conductive layer (220). When the diameter (D3) of each of the second conductive pads (230) is formed to be larger than the diameter (D4) of each of the corresponding second openings (225), the edge portion of each of the second conductive pads (230) may be covered by the second non-conductive layer (220).

In one embodiment, the second PCB (200) (or the second pad portion (201)) may include a second conductive pattern, such as a conductive pattern (235), positioned in a different layer from the second conductive pads (230). For example, the second substrate (210) may be formed of one or more substrates. For example, the second substrate (210) may include one or more dielectric substrates. For example, the second conductive pads (230) may be formed on one surface of a first dielectric substrate of the second substrate (210), and the second conductive pattern may be formed on the other surface of the first dielectric substrate of the second substrate (210) or on one surface of the second dielectric substrate of the second substrate (210). In one embodiment, the second PCB (200) (or the second pad portion (201)) may not include a conductive via that at least partially penetrates one or more of the dielectric substrates of the second substrate (210). For example, the second pad portion (201) of the second PCB (200) may not include a conductive via that penetrates the first dielectric substrate of the second substrate (210) on which the second conductive pads (230) are positioned.

According to one embodiment, the electronic device may include conductive materials (310) and non-conductive materials (320). For example, the conductive materials (310) may electrically and physically connect the first conductive pads (130) and the second conductive pads (230), respectively. For example, the conductive materials (310) may be disposed between the first conductive pads (130) of the first PCB (100) and the second conductive pads (230) of the second PCB (200), respectively, corresponding to the first conductive pads (130) and the first conductive pads (130). For example, the conductive materials (310) may be formed of solder. For example, the conductive materials (310) may be formed of a solderable metal or alloy. For example, non-conductive materials (320) can surround each of the conductive materials (310).

In one embodiment, the first non-conductive layer (120) can be in contact with the second non-conductive layer (220). For example, a surface (120A) of the first non-conductive layer (120) can be in contact with a surface (220A) of the second non-conductive layer (220). For example, the surface (120A) of the first non-conductive layer (120) can be substantially flat. For example, the surface (220A) of the second non-conductive layer (220) can be substantially flat.

In one embodiment, the first openings (125) of the first non-conductive layer (120) and the second openings (225) of the second non-conductive layer (220) may be connected, respectively. For example, as the first non-conductive layer (120) and the second non-conductive layer (220) come into contact, the first openings (125) and the second openings (225) corresponding to the first openings (125) may be connected, respectively. In one embodiment, the first conductive pads (130), the second conductive pads (230), the conductive materials (310), and the non-conductive materials (320) may be accommodated within the spaces provided by the first openings (125) and the first openings (125). Conductive materials (310) can be attached to first conductive pads (130), second conductive pads (230), and non-conductive materials (320) within the space. Non-conductive materials (320) can be attached to first substrate (110), second substrate (210), first non-conductive layer (120), second non-conductive layer (220), first conductive pad (130), second conductive pad (230), and conductive materials (310) within the space.

In one embodiment, the first PCB (100) and/or the second PCB (200) may include a rigid PCB (RPCB), a flexible PCB (FPCB), a rigid-flexible PCB (RFPCB), or a stretchable PCB.

For example, the first substrate (110) of the first PCB (100) and/or the second substrate (210) of the second PCB (200) may be formed, at least partially, rigidly. For non-limiting examples, the first substrate (110) of the first PCB (100) and/or the second substrate (210) of the second PCB (200) may be formed, at least partially, of an epoxy-based resin such as flame retardant 4 (FR4), glass, or ceramic.

For example, the first substrate (110) of the first PCB (100) and/or the second substrate (210) of the second PCB (200) may be formed to be, at least partially, flexible (or bendable). For example, but not limited to, the first substrate (110) of the first PCB (100) and/or the second substrate (210) of the second PCB (200) may be formed of a resin such as polyimide.

For example, the first substrate (110) of the first PCB (100) and/or the second substrate (210) of the second PCB (200) may be formed, at least partially, to be stretchable. For non-limiting examples, the first substrate (110) of the first PCB (100) and/or the second substrate (210) of the second PCB (200) may be formed of a resin such as urethane.

For a non-limiting example, the first PCB (100) and/or the second PCB (200) may be a package substrate (e.g., a substrate of a semiconductor package (300)) on which one or more semiconductor chips are mounted. For a non-limiting example, the first PCB (100) and/or the second PCB (200) may be a package substrate of a SIP (system in package) or SOP (system on package).

For example, but not limited to, the first PCB (100) or the second PCB (200) may be an interposer substrate for connecting other components, such as the package substrate and the FPCB.

FIG. 3 is a drawing showing interconnected PCBs of an electronic device according to one embodiment.

Referring to FIG. 3, in one embodiment, the second non-conductive layer (220) of the second PCB (200) may include an outer side (220C) extending from the second substrate (210) to the surface (120A) of the first non-conductive layer (120).

According to one embodiment, the electronic device may further include another non-conductive material (350). The other non-conductive material (350) may be formed of substantially the same material as the non-conductive materials (320), for example, but not limited to.

For example, another non-conductive material (350) may be attached to the surface (120A) of the first non-conductive layer (120) and the outer side (220C) of the second non-conductive layer (220). For example, another non-conductive material (350) may be attached to at least the boundary between the surface (120A) of the first non-conductive layer (120) and the outer side (220C) of the second non-conductive layer (220). Accordingly, the bonding strength between the first PCB (100) and the second PCB (200) may be improved.

FIG. 4 is a drawing showing interconnected PCBs of an electronic device according to one embodiment.

Referring to FIG. 4, according to one embodiment, the second conductive pads (230) of the second PCB (200) may include a first pad (231) and a second pad (232). In one embodiment, the second PCB (200) may further include a conductive pattern (430).

For example, the conductive pattern (430) may be disposed on the second substrate (210). For example, the conductive pattern (430) may extend from the first pad (231) to the second pad (232). For example, the conductive pattern (430) may electrically connect the first pad (231) and the second pad (232).

For example, the conductive pattern (430) may be at least partially covered by the second non-conductive layer (220). For example, both ends of the conductive pattern (430) may be covered by non-conductive materials (320), and the middle portion between the both ends of the conductive pattern (430) may be covered by the second non-conductive layer (220).

For example, the second non-conductive layer (220) may include a first portion (221) laminated on the conductive pattern (430) and a second portion (222) laminated on the second substrate (210). For example, the second portion (222) of the second non-conductive layer (220) may extend from the first portion (221). In one embodiment, a surface (221A) of the first portion (221) and a surface (222A) of the second portion (222) extending from the surface (221A) of the first portion (221) may be substantially flat. Accordingly, the first non-conductive layer (120) and the second non-conductive layer (220) may be in close contact.

Referring to the drawings below, a method for joining the first PCB (100) and the second PCB (200) is described.

FIG. 5 is a flowchart illustrating a method for manufacturing interconnected PCBs of an electronic device according to one embodiment.

FIGS. 6A, 6B, 6C, and 6D are drawings illustrating a method for manufacturing interconnected PCBs of an electronic device according to one embodiment.

Referring to FIG. 5, in step (501), a first PCB and a second PCB may be prepared. For example, referring to FIG. 6a, a first PCB (100) and a second PCB (200) may be prepared.

For example, first conductive pads (130) may be formed on a first substrate (110) of a first PCB (100). Thereafter, a first non-conductive layer (120) may be formed on the first substrate (110) to have a substantially flat surface. For example, the first non-conductive layer (120) may be formed using DFSR (dry film solder resist). For example, DFSR may be laminated on the first substrate (110). Thereafter, by exposing and developing the DFSR, first openings (125) may be formed so that the first conductive pads (130) are exposed. By using a film-type DFSR with a uniform surface roughness on the first substrate (110), an SR dam (solder resist dam) may be formed. Accordingly, it is possible to prevent uneven movement and uneven curing of the resin (e.g., non-conductive layer (660)) filled between the first PCB (100) and the second PCB (200), and the occurrence of unintended short circuits and non-bonding that may occur due to this. If an ink-type SR other than DFSR is used, it may not be able to sufficiently perform the role of the SR dam, and thus the above-described problems may occur.

After the formation of the first openings (125), solder bumps (650) may be formed on the first conductive pads (130) of the first PCB (100). For example, the solder bumps (650) may be formed from solder paste (or metal paste). The solder bumps (650) may include various types of solder bumps, such as, but not limited to, solder balls, stud bumps, or pillar bumps.

For example, second conductive pads (230) may be formed on a second substrate (210) of a second PCB (200). Thereafter, a second non-conductive layer (220) may be formed on the second substrate (210) to have a substantially flat surface. For example, the second non-conductive layer (220) may be formed using DFSR. For example, DFSR may be laminated on the second substrate (210). Thereafter, by exposing and developing the DFSR, second openings (225) may be formed to expose the second conductive pads (230).

Referring to FIG. 5, in step (502), a non-conductive layer may be attached. For example, referring to FIG. 6b, a non-conductive layer (660) may be attached to a first PCB (100). For example, the non-conductive layer (660) may be attached on a first non-conductive layer (120) of the first PCB (100) to cover solder bumps (650) of the first PCB (100). Alternatively, referring to FIG. 6c, the non-conductive layer (660) may be attached to a second PCB (200). For example, the non-conductive layer (660) may be attached on a second non-conductive layer (220) of the second PCB (200) to cover second conductive pads (230) (or second openings (225)) of the second PCB (200). The non-conductive layer (660) may include, for example, a non-conductive paste or a non-conductive film. For example, the non-conductive paste may be applied onto the first PCB (100) or the second PCB (200). For example, the non-conductive film may be attached onto the first PCB (100) or the second PCB (200). For example, the non-conductive film may be pre-adhered to the first PCB (100) or the second PCB (200) by applying heat. For non-limiting examples, the non-conductive layer (660) may be formed of an epoxy- or acrylic-based resin. In one embodiment, the non-conductive layer (660) may further include a flux (or solder flux). Accordingly, a separate flux application process may be omitted through step (502).

Referring to FIG. 5, in step (503), the first PCB and the second PCB may be aligned. For example, referring to FIG. 6d, the first PCB (100) and the second PCB (200) may be aligned such that a non-conductive layer (660) is positioned therebetween. For example, the first PCB (100) and the second PCB (200) may be aligned such that each of the first conductive pads (130) faces each of the second conductive pads (230). In FIG. 6d, the non-conductive layer (660) attached to the first PCB (100) is exemplified, but as in FIG. 6c, the non-conductive layer (660) may be attached to the second PCB (200).

Referring to FIG. 5, in step (504), the first PCB and the second PCB may be bonded. For example, referring to FIG. 6d, the first PCB (100) and the second PCB (200) may be bonded by hot pressing the first PCB (100) and the second PCB (200) aligned with each other in the vertical direction (1). For example, the first PCB (100) and the second PCB (200) may be bonded using a hot bar process.

For example, when the first PCB (100) and the second PCB (200) are pressed in the vertical direction (1), the first non-conductive layer (120) of the first PCB (100) and the second non-conductive layer (220) of the second PCB (200) can be brought into contact, and the first openings (125) of the first non-conductive layer (120) and the second openings (225) of the second non-conductive layer (220) can be connected.

For example, solder bumps (650) can be soldered to first conductive pads (130) and second conductive pads (230) within the first openings (125) and second openings (225) by heat and pressure. Accordingly, conductive materials (310) can be formed from the solder bumps (650).

For example, the non-conductive layer (660) can be melted by heat and pressure, and the melted non-conductive layer (660) can be filled into the first openings (125) and the second openings (225) to surround the conductive materials (310). Thereafter, the melted non-conductive layer (660) can be hardened within the first openings (125) and the second openings (225). Accordingly, non-conductive materials (320) can be formed from the non-conductive layer (660).

In one embodiment, the first non-conductive layer (120) and the second non-conductive layer (220) of the first PCB (100) are brought into contact with each other so that the molten solder bumps (650) and the molten non-conductive layer (660) do not move out of the first openings (125) and the second openings (225). In this regard, at least a portion of the first non-conductive layer (120) defining the first openings (125) may be referred to as a first dam area or a first dam portion, and at least a portion of the second non-conductive layer (220) defining the second openings (225) may be referred to as a second dam area or a second dam portion.

In a comparative example, an underfill process or a side-fill process may be used to form non-conductive materials (320) between the first PCB (100) and the second PCB (200). However, the underfill process or the side-fill process is a process that uses a capillary phenomenon to introduce a non-conductive material into the joint between the first PCB (100) and the second PCB (200), and thus has a problem in that the flow of the non-conductive material is hindered as the density of the conductive pads of the first PCB (100) and the second PCB (200) increases. Accordingly, in a comparative example, a method of applying a non-conductive material around the joint between the first PCB (100) and the second PCB (200), such as glob top, may be used, but this has a problem in that the application process and the curing process of the non-conductive material must be performed separately from soldering. According to one embodiment, the above-described problem can be solved by forming non-conductive materials (320) using a non-conductive layer (660).

In the comparative example, unlike the illustration in FIG. 2, the surface (120A) of the first non-conductive layer (120) and the surface (220A) of the second non-conductive layer (220) may be spaced apart from each other. In the comparative example, unlike the illustration in FIG. 2, the surface (120A) of the first non-conductive layer (120) and/or the surface (220A) of the second non-conductive layer (220) may be formed unevenly. In the comparative example, when an ink-type solder resist is used, the surface roughness may be relatively large (for example, but not limited to, about 7 μm to about 8 μm). For example, the ink-type solder resist may contain more solvent than DFSR, and an uneven surface may be formed depending on the shrinkage variation of the solvent. This shrinkage variation of the solvent may occur, for example, depending on the presence or absence of a conductive pattern underneath. In the comparative example, unlike the illustration in FIG. 4, a bend may be formed between the first portion (221) where the second non-conductive layer (220) covers the conductive pattern (430) and the second portion (222) where it does not. In the comparative examples, when step (504) is performed, the molten non-conductive layer (660) may move unevenly, resulting in sections where the non-conductive layer (660) is not attached or empty spaces. Accordingly, the bonding strength between the first PCB (100) and the second PCB (200) may be reduced. In addition, as the molten non-conductive layer (660) drags the solder bumps (650), the solder between the first conductive pads (130) and the second conductive pads (230) may be detached, or a short circuit may occur in an unintended location. In one embodiment, the first non-conductive layer (120) and the second non-conductive layer (220) may have relatively low surface roughness (for example, about 3 μm or less) regardless of the conductive pattern (430) therebelow. The first non-conductive layer (120) and the second non-conductive layer (220) in contact with the first non-conductive layer (120) may function as a dam to prevent uneven movement of the non-conductive layer (660), thereby preventing the problem of the comparative example described above.

An electronic device according to a comparative example may include a conductive via located in a first pad portion (101) of a first PCB (100) and/or a second pad portion (201) of a second PCB (200). The conductive via may reduce the phenomenon of uneven movement of the molten non-conductive layer (660) described above by providing a space for the molten non-conductive layer (660) to move, but the wiring density may be reduced due to the conductive via. In one embodiment, the electronic device does not include a conductive via located in the first pad portion (101) of the first PCB (100) and the second pad portion (201) of the second PCB (200), thereby improving the wiring density of the first PCB (100) and the second PCB (200), and preventing a problem caused by uneven movement of the non-conductive layer (660) as described above.

FIG. 7 is a block diagram of an electronic device (701) within a network environment (700) according to various embodiments.

Referring to FIG. 7, in a network environment (700), an electronic device (701) may communicate with an electronic device (702) via a first network (798) (e.g., a short-range wireless communication network), or may communicate with at least one of an electronic device (704) or a server (708) via a second network (799) (e.g., a long-range wireless communication network). According to one embodiment, the electronic device (701) may communicate with the electronic device (704) via the server (708). According to one embodiment, the electronic device (701) may include a processor (720), a memory (730), an input module (750), an audio output module (755), a display module (760), an audio module (770), a sensor module (776), an interface (777), a connection terminal (778), a haptic module (779), a camera module (780), a power management module (788), a battery (789), a communication module (790), a subscriber identification module (796), or an antenna module (797). In some embodiments, the electronic device (701) may omit at least one of these components (e.g., the connection terminal (778)), or may have one or more other components added. In some embodiments, some of these components (e.g., the sensor module (776), the camera module (780), or the antenna module (797)) may be integrated into one component (e.g., the display module (760)).

The processor (720) may control at least one other component (e.g., a hardware or software component) of the electronic device (701) connected to the processor (720) by executing, for example, software (e.g., a program (740)), and may perform various data processing or calculations. According to one embodiment, as at least a part of the data processing or calculation, the processor (720) may store a command or data received from another component (e.g., a sensor module (776) or a communication module (790)) in a volatile memory (732), process the command or data stored in the volatile memory (732), and store the resulting data in a non-volatile memory (734). According to one embodiment, the processor (720) may include a main processor (721) (e.g., a central processing unit or an application processor) or a secondary processor (723) (e.g., a graphics processing unit, a neural processing unit (NPU), an image signal processor, a sensor hub processor, or a communication processor) that may operate independently or together therewith. For example, if the electronic device (701) includes a main processor (721) and a secondary processor (723), the secondary processor (723) may be configured to use less power than the main processor (721) or to be specialized for a given function. The secondary processor (723) may be implemented separately from the main processor (721) or as a part thereof.

The auxiliary processor (723) may control at least a portion of functions or states associated with at least one component (e.g., a display module (760), a sensor module (776), or a communication module (790)) of the electronic device (701), for example, on behalf of the main processor (721) while the main processor (721) is in an inactive (e.g., sleep) state, or together with the main processor (721) while the main processor (721) is in an active (e.g., application execution) state. In one embodiment, the auxiliary processor (723) (e.g., an image signal processor or a communication processor) may be implemented as a part of another functionally related component (e.g., a camera module (780) or a communication module (790)). In one embodiment, the auxiliary processor (723) (e.g., a neural network processing unit) may include a hardware structure specialized for processing artificial intelligence models. The artificial intelligence models may be generated through machine learning. This learning can be performed, for example, in the electronic device (701) itself where the artificial intelligence model is executed, or can be performed through a separate server (e.g., server (708)). The learning algorithm can include, for example, supervised learning, unsupervised learning, semi-supervised learning, or reinforcement learning, but is not limited to the examples described above. The artificial intelligence model can include a plurality of artificial neural network layers. The artificial neural network can be one of a deep neural network (DNN), a convolutional neural network (CNN), a recurrent neural network (RNN), a restricted Boltzmann machine (RBM), a deep belief network (DBN), a bidirectional recurrent deep neural network (BRDNN), deep Q-networks, or a combination of two or more of the above, but is not limited to the examples described above. In addition to the hardware structure, the artificial intelligence model can additionally or alternatively include a software structure.

The memory (730) can store various data used by at least one component (e.g., the processor (720) or the sensor module (776)) of the electronic device (701). The data can include, for example, software (e.g., the program (740)) and input data or output data for commands related thereto. The memory (730) can include a volatile memory (732) or a non-volatile memory (734).

The program (740) may be stored as software in the memory (730) and may include, for example, an operating system (742), middleware (744), or an application (746).

The input module (750) can receive commands or data to be used in a component of the electronic device (701) (e.g., a processor (720)) from an external source (e.g., a user) of the electronic device (701). The input module (750) can include, for example, a microphone, a mouse, a keyboard, a key (e.g., a button), or a digital pen (e.g., a stylus pen).

The audio output module (755) can output audio signals to the outside of the electronic device (701). The audio output module (755) can include, for example, a speaker or a receiver. The speaker can be used for general purposes, such as multimedia playback or recording playback. The receiver can be used to receive incoming calls. According to one embodiment, the receiver can be implemented separately from the speaker or as part of the speaker.

The display module (760) can visually provide information to an external party (e.g., a user) of the electronic device (701). The display module (760) may include, for example, a display, a holographic device, or a projector and a control circuit for controlling the device. According to one embodiment, the display module (760) may include a touch sensor configured to detect a touch, or a pressure sensor configured to measure the intensity of a force generated by the touch.

The audio module (770) can convert sound into an electrical signal, or vice versa, convert an electrical signal into sound. According to one embodiment, the audio module (770) can acquire sound through the input module (750), output sound through the sound output module (755), or an external electronic device (e.g., electronic device (702)) (e.g., speaker or headphone) directly or wirelessly connected to the electronic device (701).

The sensor module (776) can detect the operating status (e.g., power or temperature) of the electronic device (701) or the external environmental status (e.g., user status) and generate an electrical signal or data value corresponding to the detected status. According to one embodiment, the sensor module (776) can include, for example, a gesture sensor, a gyro sensor, a barometric pressure sensor, a magnetic sensor, an acceleration sensor, a grip sensor, a proximity sensor, a color sensor, an IR (infrared) sensor, a biometric sensor, a temperature sensor, a humidity sensor, or an illuminance sensor.

The interface (777) may support one or more designated protocols that may be used to directly or wirelessly connect the electronic device (701) with an external electronic device (e.g., the electronic device (702)). In one embodiment, the interface (777) may include, for example, a high definition multimedia interface (HDMI), a universal serial bus (USB) interface, an SD card interface, or an audio interface.

The connection terminal (778) may include a connector through which the electronic device (701) may be physically connected to an external electronic device (e.g., the electronic device (702)). According to one embodiment, the connection terminal (778) may include, for example, an HDMI connector, a USB connector, an SD card connector, or an audio connector (e.g., a headphone connector).

The haptic module (779) can convert electrical signals into mechanical stimuli (e.g., vibration or movement) or electrical stimuli that a user can perceive through tactile or kinesthetic sensations. According to one embodiment, the haptic module (779) can include, for example, a motor, a piezoelectric element, or an electrical stimulation device.

The camera module (780) can capture still images and videos. According to one embodiment, the camera module (780) may include one or more lenses, image sensors, image signal processors, or flashes.

The power management module (788) can manage the power supplied to the electronic device (701). According to one embodiment, the power management module (788) can be implemented as, for example, at least a part of a power management integrated circuit (PMIC).

A battery (789) may power at least one component of the electronic device (701). In one embodiment, the battery (789) may include, for example, a non-rechargeable primary battery, a rechargeable secondary battery, or a fuel cell.

The communication module (790) may support the establishment of a direct (e.g., wired) communication channel or a wireless communication channel between the electronic device (701) and an external electronic device (e.g., electronic device (702), electronic device (704), or server (708)), and the performance of communication through the established communication channel. The communication module (790) may operate independently from the processor (720) (e.g., application processor) and may include one or more communication processors that support direct (e.g., wired) communication or wireless communication. According to one embodiment, the communication module (790) may include a wireless communication module (792) (e.g., a cellular communication module, a short-range wireless communication module, or a global navigation satellite system (GNSS) communication module) or a wired communication module (794) (e.g., a local area network (LAN) communication module, or a power line communication module). Among these communication modules, a corresponding communication module can communicate with an external electronic device (704) via a first network (798) (e.g., a short-range communication network such as Bluetooth, wireless fidelity (WiFi) direct, or infrared data association (IrDA)) or a second network (799) (e.g., a long-range communication network such as a legacy cellular network, a 5G network, a next-generation communication network, the Internet, or a computer network (e.g., a LAN or WAN)). These various types of communication modules can be integrated into a single component (e.g., a single chip) or implemented as multiple separate components (e.g., multiple chips). The wireless communication module (792) can verify or authenticate the electronic device (701) within a communication network such as the first network (798) or the second network (799) by using subscriber information (e.g., an international mobile subscriber identity (IMSI)) stored in the subscriber identification module (796).

The wireless communication module (792) can support 5G networks and next-generation communication technologies following the 4G network, such as NR access technology (new radio access technology). The NR access technology can support high-speed transmission of high-capacity data (eMBB (enhanced mobile broadband)), minimization of terminal power and connection of multiple terminals (mMTC (massive machine type communications)), or high reliability and low latency communications (URLLC (ultra-reliable and low-latency communications)). The wireless communication module (792) can support, for example, a high-frequency band (e.g., mmWave band) to achieve a high data transmission rate. The wireless communication module (792) may support various technologies for securing performance in a high-frequency band, such as beamforming, massive multiple-input and multiple-output (MIMO), full dimensional MIMO (FD-MIMO), array antenna, analog beam-forming, or large scale antenna. The wireless communication module (792) may support various requirements specified in the electronic device (701), an external electronic device (e.g., the electronic device (704)), or a network system (e.g., the second network (799)). According to one embodiment, the wireless communication module (792) may support a peak data rate (e.g., 20 Gbps or more) for eMBB realization, a loss coverage (e.g., 164 dB or less) for mMTC realization, or a U-plane latency (e.g., 0.5 ms or less for downlink (DL) and uplink (UL), or 1 ms or less for round trip) for URLLC realization.

The antenna module (797) can transmit or receive signals or power to or from an external device (e.g., an external electronic device). According to one embodiment, the antenna module (797) may include an antenna including a radiator formed of a conductor or a conductive pattern formed on a substrate (e.g., a PCB). According to one embodiment, the antenna module (797) may include a plurality of antennas (e.g., an array antenna). In this case, at least one antenna suitable for a communication method used in a communication network, such as the first network (798) or the second network (799), may be selected from the plurality of antennas by, for example, the communication module (790). A signal or power may be transmitted or received between the communication module (790) and the external electronic device through the selected at least one antenna. According to some embodiments, in addition to the radiator, another component (e.g., a radio frequency integrated circuit (RFIC)) may be additionally formed as a part of the antenna module (797).

According to various embodiments, the antenna module (797) may form a mmWave antenna module. According to one embodiment, the mmWave antenna module may include a printed circuit board, an RFIC disposed on or adjacent a first side (e.g., a bottom side) of the printed circuit board and capable of supporting a designated high-frequency band (e.g., a mmWave band), and a plurality of antennas (e.g., an array antenna) disposed on or adjacent a second side (e.g., a top side or a side side) of the printed circuit board and capable of transmitting or receiving signals in the designated high-frequency band.

At least some of the above components can be interconnected and exchange signals (e.g., commands or data) with each other via a communication method between peripheral devices (e.g., a bus, GPIO (general purpose input and output), SPI (serial peripheral interface), or MIPI (mobile industry processor interface)).

According to one embodiment, commands or data may be transmitted or received between the electronic device (701) and an external electronic device (704) via a server (708) connected to a second network (799). Each of the external electronic devices (702 or 704) may be the same or a different type of device as the electronic device (701). According to one embodiment, all or part of the operations executed in the electronic device (701) may be executed in one or more of the external electronic devices (702, 704, or 708). For example, when the electronic device (701) is to perform a certain function or service automatically or in response to a request from a user or another device, the electronic device (701) may, instead of or in addition to executing the function or service itself, request one or more external electronic devices to perform the function or at least a part of the service. One or more external electronic devices that receive the request may execute at least a portion of the requested function or service, or an additional function or service related to the request, and transmit the result of the execution to the electronic device (701). The electronic device (701) may process the result as is or additionally and provide it as at least a portion of a response to the request. For this purpose, cloud computing, distributed computing, mobile edge computing (MEC), or client-server computing technology may be used, for example. The electronic device (701) may provide an ultra-low latency service by using distributed computing or mobile edge computing, for example. In another embodiment, the external electronic device (704) may include an Internet of Things (IoT) device. The server (708) may be an intelligent server utilizing machine learning and/or a neural network. According to one embodiment, the external electronic device (704) or the server (708) may be included in the second network (799). The electronic device (701) can be applied to intelligent services (e.g., smart home, smart city, smart car, or healthcare) based on 5G communication technology and IoT-related technology.

Below, examples of the present disclosure are illustrated.

In a first example, an electronic device may include a first PCB (100), a second PCB (200), conductive materials (310), and non-conductive materials (320). The first PCB (100) may include: a first substrate (110); a first non-conductive layer (120) disposed on the first substrate (110) and including first openings (125); and first conductive pads (130) disposed on the first substrate (110) and positioned respectively in corresponding openings among the first openings (125) of the first non-conductive layer (120). The second PCB (200) may include: a second substrate (210); a second non-conductive layer (220) disposed on the second substrate (210), facing the first non-conductive layer (120), and including second openings (225); And it may include second conductive pads (230) disposed on the second substrate (210), each positioned within a corresponding opening among the second openings (225) of the second non-conductive layer (220), and facing each of the first conductive pads (130). The conductive materials (310) may be disposed between the first conductive pads (130) and the second conductive pads (230) corresponding to each of the first conductive pads (130). The non-conductive materials (320) may surround each of the conductive materials (310). As the first non-conductive layer (120) comes into contact with the second non-conductive layer (220), the first openings (125) and the second openings (225) corresponding to each of the first openings (125) may be connected. The first openings (125) and the second openings (225) corresponding to each of the first openings (125) can provide a space for accommodating the first conductive pads (130), the second conductive pads (230), the conductive materials (310), and the non-conductive materials (320). Accordingly, even if the first PCB (100) and the second PCB (200) have a high wiring density, the first PCB (100) and the second PCB (200) can be firmly joined, and the reliability of the electrical connection between the conductive pads can be improved.

In a second example, the second PCB (200) according to the first example may include a conductive pattern (430) disposed on the second substrate (210) and at least partially covered by the second non-conductive layer (220). The second non-conductive layer (220) may include a first portion (221) laminated on the conductive pattern (430); and a second portion (222) extending from the first portion (221) and laminated on the second substrate (210). A surface (221A) of the first portion (221) and a surface (222A) of the second portion (222) extending from the surface (221A) of the first portion (221) may be substantially flat.

In a third example, the second conductive pads (230) of the second PCB (200) according to the second example may include a first pad (231) and a second pad (232). The conductive pattern (430) of the second PCB (200) may extend from the first pad (231) to the second pad (232).

In a fourth example, the second PCB (200) according to any one of the first to third examples may include a pad portion (201) in which the second conductive pads (230) are positioned. The second PCB (200) may not include a conductive via positioned within the pad portion (201).

In the fifth example, the thickness of the second non-conductive layer (220) according to any one of the first to fourth examples may be 20 μm to 100 μm.

In a sixth example, the second non-conductive layer (220) of the second PCB (200) according to any one of the first to fifth examples may include an outer side surface (220C) extending from the second substrate (210) to the surface (120A) of the first non-conductive layer (120). The electronic device may include another non-conductive material (350) attached to the surface (120A) of the first non-conductive layer (120) and the outer side surface (220C) of the second non-conductive layer (220). Accordingly, the bonding strength between the first PCB (100) and the second PCB (200) may be improved.

In the seventh example, the first non-conductive layer (120) according to any one of the first to sixth examples may be a solder resist layer forming a portion of the surface of the first PCB (100). The second non-conductive layer (220) may be a solder resist layer forming a portion of the surface of the second PCB (200).

In the eighth example, the second substrate (210) of the second PCB (200) according to any one of the first to seventh examples may be formed to be bendable or stretchable.

In the ninth example, at least a part of the first substrate (110) of the first PCB (100) according to any one of the first to eighth examples may be formed rigidly.

In the 10th example, the second PCB (200) according to any one of the first to ninth examples may be a package substrate of a semiconductor chip.

In the eleventh example, the conductive materials (310) according to any one of the first to tenth examples may be formed of solder.

In the 12th example, the second PCB (200) according to any one of the first to eleventh examples may include a conductive pattern located on a different layer from the second conductive pads (230).

In the 13th example, the electronic device according to any one of the first to twelfth examples may be a mobile phone, an electronic watch, or an earphone.

In a fourteenth example, the method for manufacturing the electronic device according to any one of the first to thirteenth examples comprises: a step of soldering solder bumps (650) to each of the first conductive pads (130) of the first PCB (100); a step (502) of attaching a non-conductive layer (660) to the first PCB (100) or the second PCB (200) so as to cover the solder bumps (650) of the first PCB (100) or the second conductive pads (230) of the second PCB (200); a step (503) of aligning the first PCB (100) and the second PCB (200) so that the non-conductive layer (660) is positioned between the first PCB (100) and the second PCB (200); And it may include a step (504) of hot pressing the first PCB (100) and the second PCB (200) aligned with each other in a vertical direction so that the conductive materials (310) are formed from the solder bumps (650) and the non-conductive materials (320) are formed from the non-conductive layer (660). Accordingly, even if the conductive pads of the first PCB (100) and the second PCB (200) have a fine pitch, the reliability of the physical and electrical bonding of the first PCB (100) and the second PCB (200) can be improved.

In the 15th example, the manufacturing method according to the 14th example may include a step of forming the first non-conductive layer (120) of the first PCB (100) using a dry film solder resist prior to soldering the solder bumps (650).

In the 16th example, the non-conductive layer (660) according to the 14th example or the 15th example may include a non-conductive film or a non-conductive paste.

In the 17th example, the non-conductive film or the non-conductive paste according to the 16th example may further include solder flux. Accordingly, by omitting a separate flux application process, process efficiency can be improved.

In an eighteenth example, an electronic device may include a first PCB (100) including a first pad portion (101); and a second PCB (200) including a second pad portion (201) coupled to the first pad portion (101) of the first PCB (100). The first pad portion (101) of the first PCB (100) may include a first solder mask layer (120) having a first opening area (125); and a first conductive pad (130) positioned within the first opening area (125) of the first solder mask layer (120). The second pad portion (201) of the second PCB (200) may include a second solder mask layer (220) having a second opening area (225); And the second conductive pad (231) may be positioned within the second opening area (225) of the second solder mask layer (220) so as to face the first conductive pad (130) of the first PCB (100). The second solder mask layer (220) may be in contact with the first solder mask layer (120) such that the second opening area (225) and the first opening area (125) are connected. The electronic device may include: solder (310) that connects the first conductive pad (130) and the second conductive pad (231) and is disposed within a space including the first opening area (125) and the second opening area (225); and a non-conductive material (320) that is disposed within the space so as to at least partially surround the solder (310).

In the 19th example, the second pad portion (201) of the second PCB (200) according to the 18th example may include a substrate (210) on which the second conductive pad (231) is arranged; a third conductive pad (232) arranged on the substrate (210); and a conductive pattern (430) arranged on the substrate (110) and extending from the second conductive pad (231) to the third conductive pad (232). The second solder mask layer (220) may include a first portion (221) laminated on the conductive pattern (430); and a second portion (222) laminated on the substrate (210) and extending from the first portion (221). The surface (221A) of the first portion (221) and the surface (222A) of the second portion (222) extending from the surface (221A) of the first portion (221) may be substantially flat.

In the 20th example, the first pad portion (101) of the first PCB (100) according to the 18th example or the 19th example may include a plurality of first layers, and may not include a conductive via penetrating a layer in which the first conductive pad (130) is positioned among the plurality of first layers. The second pad portion (201) of the second PCB (200) may include a plurality of second layers, and may not include a conductive via penetrating a layer in which the second conductive pad (231) is positioned among the plurality of second layers.

Electronic devices according to the various embodiments disclosed in this document may take various forms. Electronic devices may include, for example, portable communication devices (e.g., smartphones), computer devices, portable multimedia devices, portable medical devices, cameras, wearable devices, or home appliances. Electronic devices according to the embodiments disclosed in this document are not limited to the aforementioned devices.

The various embodiments of this document and the terminology used therein are not intended to limit the technical features described in this document to specific embodiments, but should be understood to include various modifications, equivalents, or substitutes of the embodiments. In connection with the description of the drawings, similar reference numerals may be used for similar or related components. The singular form of a noun corresponding to an item may include one or more of the items, unless the context clearly indicates otherwise. In this document, each of the phrases "A or B", "at least one of A and B", "at least one of A or B", "A, B, or C", "at least one of A, B, and C", and "at least one of A, B, or C" can include any one of the items listed together in the corresponding phrase among those phrases, or all possible combinations thereof. Terms such as "first," "second," or "first" or "second" may be used merely to distinguish one component from another, and do not limit the components in any other respect (e.g., importance or order). When a component (e.g., a first component) is referred to as "coupled" or "connected" to another component (e.g., a second component), with or without the terms "functionally" or "communicatively," it means that the component can be connected to the other component directly (e.g., wired), wirelessly, or through a third component.

The term "module" used in various embodiments of this document may include a unit implemented in hardware, software, or firmware, and may be used interchangeably with terms such as logic, logic block, component, or circuit. A module may be an integral component, or a minimum unit or part of such a component that performs one or more functions. For example, according to one embodiment, a module may be implemented in the form of an application-specific integrated circuit (ASIC).

Various embodiments of the present document may be implemented as software (e.g., a program (740)) including one or more instructions stored in a storage medium (e.g., an internal memory (736) or an external memory (738)) readable by a machine (e.g., an electronic device (701)). For example, a processor (e.g., a processor (720)) of the machine (e.g., an electronic device (701)) may call at least one instruction among the one or more instructions stored from the storage medium and execute it. This enables the machine to operate to perform at least one function according to the at least one called instruction. The one or more instructions may include code generated by a compiler or code executable by an interpreter. The machine-readable storage medium may be provided in the form of a non-transitory storage medium. Here, 'non-transitory' simply means that the storage medium is a tangible device and does not contain signals (e.g., electromagnetic waves), and the term does not distinguish between cases where data is stored semi-permanently or temporarily on the storage medium.

According to one embodiment, the method according to the various embodiments disclosed in the present document may be provided as included in a computer program product. The computer program product may be traded as a product between a seller and a buyer. The computer program product may be distributed in the form of a machine-readable storage medium (e.g., compact disc read only memory (CD-ROM)), or may be distributed online (e.g., downloaded or uploaded) via an application store (e.g., Play Store ^™ ) or directly between two user devices (e.g., smart phones). In the case of online distribution, at least a portion of the computer program product may be temporarily stored or temporarily generated in a machine-readable storage medium, such as the memory of a manufacturer's server, an application store's server, or an intermediary server.

According to various embodiments, each component (e.g., a module or a program) of the above-described components may include one or more entities, and some of the entities may be separated and arranged in other components. According to various embodiments, one or more components or operations of the aforementioned components may be omitted, or one or more other components or operations may be added. Alternatively or additionally, a plurality of components (e.g., a module or a program) may be integrated into a single component. In such a case, the integrated component may perform one or more functions of each of the plurality of components identically or similarly to those performed by the corresponding component among the plurality of components prior to the integration. According to various embodiments, the operations performed by a module, program, or other component may be executed sequentially, in parallel, iteratively, or heuristically, or one or more of the operations may be executed in a different order, omitted, or one or more other operations may be added.

Claims (15)

In electronic devices, A first printed circuit board (PCB), wherein the first PCB comprises: 1st substrate, a first non-conductive layer disposed on the first substrate and including first openings, and comprising first conductive pads disposed on the first substrate and each positioned in a corresponding opening among the first openings of the first non-conductive layer; Second PCB, said second PCB: Second article, a second non-conductive layer disposed on the second substrate, facing the first non-conductive layer, and including second openings; and and second conductive pads disposed on the second substrate, each of which is positioned within a corresponding opening among the second openings of the second non-conductive layer, and facing each of the first conductive pads; Conductive materials disposed between the first conductive pads and second conductive pads corresponding to each of the first conductive pads; and Non-conductive materials surrounding each of the above conductive materials; As the first non-conductive layer comes into contact with the second non-conductive layer, the first openings and the second openings corresponding to each of the first openings are connected, The first openings and the second openings corresponding to each of the first openings provide a space for accommodating the first conductive pads, the second conductive pads, the conductive materials, and the non-conductive materials. Electronic devices. In claim 1, The second PCB comprises a conductive pattern disposed on the second substrate and at least partially covered by the second non-conductive layer, The second non-conductive layer is: A first part laminated on the above conductive pattern; and A second portion extending from the first portion and laminated on the second substrate, The surface of the first portion and the surface of the second portion extending from the surface of the first portion are substantially flat, Electronic devices. In claim 2, The second conductive pads of the second PCB include a first pad and a second pad, The conductive pattern of the second PCB extends from the first pad to the second pad. Electronic devices. In any one of claims 1 to 3, The second PCB includes a pad portion where the second conductive pads are positioned, The second PCB does not include a conductive via located within the pad portion. Electronic devices. In any one of claims 1 to 4, The thickness of the second non-conductive layer is 20 μm to 100 μm, Electronic devices. In any one of claims 1 to 5, The second non-conductive layer of the second PCB includes an outer side extending from the second substrate to the surface of the first non-conductive layer, The electronic device comprises another non-conductive material attached to the surface of the first non-conductive layer and the outer side of the second non-conductive layer. Electronic devices. In any one of claims 1 to 6, The above first non-conductive layer is a solder resist layer that forms a part of the surface of the first PCB, The second non-conductive layer is a solder resist layer that forms part of the surface of the second PCB. Electronic devices. In any one of claims 1 to 7, The second substrate of the second PCB is formed to be bendable or stretchable. Electronic devices. In any one of claims 1 to 8, At least a portion of the first substrate of the first PCB is formed rigidly, Electronic devices. In any one of claims 1 to 9, The above second PCB is a package substrate of a semiconductor chip. Electronic devices. In any one of claims 1 to 10, The above conductive materials are formed as solder, Electronic devices. In any one of claims 1 to 11, The second PCB includes a conductive pattern located on a different layer from the second conductive pads. Electronic devices. In any one of claims 1 to 12, The above electronic device is a mobile phone, an electronic watch, or an earphone. Electronic devices. In a method for manufacturing the electronic device according to any one of claims 1 to 13, A step of soldering solder bumps to each of the first conductive pads of the first PCB; A step of attaching a non-conductive layer to the first PCB or the second PCB so as to cover the solder bumps of the first PCB or the second conductive pads of the second PCB; A step of aligning the first PCB and the second PCB so that the non-conductive layer is positioned between the first PCB and the second PCB; and A step of vertically hot pressing the first PCB and the second PCB aligned with each other so that the conductive materials are formed from the solder bumps and the non-conductive materials are formed from the non-conductive layer; Manufacturing method. In claim 14, A step of forming the first non-conductive layer of the first PCB using a dry film solder resist prior to soldering the solder bumps, Manufacturing method.