WO2025162700A1

WO2025162700A1 - Multi-definition implicit neural representation video encoding

Info

Publication number: WO2025162700A1
Application number: PCT/EP2025/050637
Authority: WO
Inventors: Pierre Hellier; Bharath Bhushan DAMODARAN; Francois Schnitzler; Anne Lambert
Original assignee: InterDigital CE Patent Holdings SAS
Current assignee: InterDigital CE Patent Holdings SAS
Priority date: 2024-01-30
Filing date: 2025-01-13
Publication date: 2025-08-07
Anticipated expiration: 2026-07-30

Abstract

Methods and apparatus are provided for maximizing the encoding and decoding of compressed video over a set of content at different resolutions. In one embodiment, encoding is performed to maintain a quality level. In another embodiment, a lightweight additional bitstream adapts an implicit neural representation to a required video resolution. Decoding embodiments are also provided.

Description

MULTI-DEFINITION IMPLICIT NEURAL REPRESENTATION VIDEO ENCODING

CROSS REFERENCE TO RELATED APPLICATION

This application claims the benefit of European Serial No.24305156.2 filed January 30, 2024, which is incorporated by reference herein in its entirety.

TECHNICAL FIELD

At least one of the present embodiments generally relates to a method or an apparatus for efficient cloud streaming.

BACKGROUND

The general aspects described herein relate to approaches for neural compression. Several organizations are investigating this topic. Implicit Neural Representations (I NR) based compression techniques are relatively new and are investigated by research groups in academia and in a few companies. The aspects described herein focus on 2D (two-dimensional) applications and video compression, but I NR is being investigated for many other signals, in particular 3D scenes or objects. These approaches have a far lower computational complexity than end-to-end neural compression approaches.

SUMMARY

At least one of the present embodiments generally relates to a method or an apparatus for maximizing the encoding and decoding over a set of video content at different resolutions.

According to a first aspect, there is provided a method. The method comprises steps for determining parameters for an implicit neural representation of a neural network; and encoding video using the implicit neural representation.

According to a second aspect, there is provided another method. The method comprises steps for determining parameters for an implicit neural representation of a neural network; and decoding video using the implicit neural representation.

According to another aspect, there is provided an apparatus. The apparatus comprises a processor and a memory. The processor can be configured to operate on digital video data according to the aforementioned methods. According to another aspect, there is provided an apparatus. The apparatus comprises a processor and a memory. The processor can be configured to encode a block of a video or decode video data by executing any of the aforementioned methods.

According to another general aspect of at least one embodiment, there is provided a device comprising an apparatus according to any of the decoding embodiments; and at least one of (i) an antenna configured to receive a signal, the signal including the video block, (ii) a band limiter configured to limit the received signal to a band of frequencies that includes the video block, or (iii) a display configured to display an output representative of the video block.

According to another general aspect of at least one embodiment, there is provided a non-transitory computer readable medium containing data content generated according to any of the described encoding embodiments or variants.

According to another general aspect of at least one embodiment, there is provided a signal comprising video data generated according to any of the described encoding embodiments or variants.

According to another general aspect of at least one embodiment, video data or a bitstream is formatted to include data content generated according to any of the described encoding embodiments or variants.

According to another general aspect of at least one embodiment, there is provided a computer program product comprising instructions which, when the program is executed by a computer, cause the computer to carry out any of the described decoding embodiments or variants.

These and other aspects, features and advantages of the general aspects will become apparent from the following detailed description of exemplary embodiments, which is to be read in connection with the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

Figure 1 illustrates an example of a simple neural network which can be used for Implicit Neural Representations (INR).

Figure 2 illustrates examples of content definition that can be used.

Figure 3 illustrates one embodiment of a first method under the described aspects. Figure 4 illustrates one embodiment of a second method under the described aspects

Figure 5 illustrates one embodiment of an apparatus under the described aspects.

Figure 6 illustrates a standard, generic, video compression scheme.

Figure 7 illustrates a standard, generic, video decompression scheme.

Figure 8 illustrates a processor-based system for encoding/decoding under the general described aspects.

DETAILED DESCRIPTION

The embodiments described here are in the field of learning-based compression, such as through implicit neural representations (INR) and generally relate to efficient cloud streaming, for example, in the context of two-dimensional signals and video compression.

To achieve high compression efficiency, image and video coding schemes usually employ block-based prediction, including motion vector prediction, and transform to leverage spatial and temporal redundancy in the video content. Generally, intra or inter prediction is used to exploit the intra or inter frame correlation, then the differences between the original block and the predicted block, often denoted as prediction errors or prediction residuals, are transformed, quantized, and entropy coded. To reconstruct the video, the compressed data are decoded by inverse processes corresponding to the entropy coding, quantization, transform, and prediction.

In the HEVC (High Efficiency Video Coding) video compression standard, motion compensated temporal prediction is employed to exploit the redundancy that exists between successive pictures of a video.

The described embodiments are in the context of implicit neural representations, used for example, for video compression. Figure 1 illustrates a simple neural network used for implicit neural representation (INR). Such a neural network used for INR can be referred to as an INR network. INR parameterizes a signal as a function 199, which takes coordinates 111 as input and outputs values 121 of a signal at these coordinates. INR has recently been applied to image, videos or 3D objects among other applications. In the image case, the inputs 111 can be pixel coordinates X=(x,y) and the INR may output 121 the color values C_x = (r,g, b) or (y,u, v) of the input pixel. The input coordinates may be modified by a transformation before being used as input for the neural network. This transformation can be a Fourier mapping, coordinate transformation, normalization etc. In this invention, we will mainly focus on coordinate transform, prior to any Fourier embedding, which will be discussed hereafter.

The INR can be used to reconstruct a signal by computing the signal values for every necessary coordinate input. It can be used to upsample a signal by generating output for input coordinates corresponding to the upsampled pixels, for example the mean of the coordinates between two consecutive pixels for upsampling by a factor of 2.

An INR network 100 is typically a neural network, composed of multiple neural layers, such as fully connected layers. In Figure 1 , the network has four layers. Intermediate outputs are represented by circles. Each neural layer can be described as a function that first multiplies the input by a tensor, adds a vector called the bias and then applies a nonlinear function on the resulting values. The shape (and other characteristics) of the tensor and the type of non-linear functions are called the architecture of the network. We will denote the values of the tensor and the bias by the term “weights”. The weights and, if applicable, the parameters of the non-linear functions, are called the parameters 9 of the network. The architecture and the parameters define a “model”. We will use f_g to denote an INR function parameterized by 0.

A typical process to encode a signal using an INR is done by optimizing the weights 9 (or a subset of them) of the INR network to reconstruct the signal and optionally encoding them to create the output bitstream. For an image I of size (M x TV), the weights 0 can for example be optimized by minimizing the following loss function: where D is a distortion which quantifies the difference between the reconstructed image by f₀ to the original image I, #/ is the number of pixels of image I, R is the bitrate of the encoded parameters and A a trade-off parameter between D and R. D could be any differentiable distortion measure, such as mean squared error as in the second equation. M and N are the width and height of an image. Other metrics such as LPIPS (learned perceptual image patch similarity) can also be used in this case. The optimization of the weights 9 is typically performed by a machine learning approach such as a batch gradient descent method.

To decompress the signal, f_g is evaluated at all relevant coordinates. These coordinates can be selected at decoding. A typical choice would be all pixel coordinates for an image or video. As an example, for a 256x256 pixel image, these coordinates could be all pairs (%,y) for all x e {0,1, ...,255} and y e {0,1, ...,255}. Other choices are possible, for example to upsample, downsample or extend the original image.

The described embodiments can be used to compress a set of images, representing the same content but at different resolution. This allows limiting the number of bitstreams associated with a given content, and minimize the cloud storage, while keeping the capability to generate a bitstream for any definition required by the end-user.

When it comes to cloud streaming, service providers like facebook or youtube encode each content into a bitstream stored on the server. For every codec used (for instance, av1 and hevc), for each content definition required by the end-device (from SD to UHDTV) and for every quality level (typically, 5 levels of QP, chosen for rate control), a bitstream is computed and stored. Figure 2 illustrates some content definition that can be used.

One goal of the described embodiments is to minimize the number of bitstreams generated for every content definition/resolution, and propose mechanisms to ensure that the INR is either valid for a range of content definition (realization mode 1), or to propose a lightweight additional bitstream (realization mode 2).

The following description proposes two modes to maximize the encoding over a set of content at different resolution. The first mode is an encoding technique ensuring the quality is maintained. The second mode is an encoding technique where a lightweight additional bitstream adapts the INR representation to a required resolution.

Assume as input, there is a collection of the same input content, at various resolution, noted as {7_f, i E {0,/?} }, where I_o stands for the lowest resolution content, and I_R the highest resolution content. The obvious solution consists in computing an INR function for each resolution, leading to a collection of functions (f_e., i e {0,7?} }. One goal of the described embodiments is to limit the amount of information stored on the server side, by two different means as described below.

Average INR optimizer

A first solution is to ensure, at the encoder side, that the INR is valid for a range of input resolutions. To do so, a single INR function f_g is overfitted to all images by minimizing the following loss function:

In this embodiment, the INR function is optimized to reach a maximum quality on average.

Once optimized, the INR function is transformed into a bitstream using any known encoding technique, and decoded using function evaluation.

Variant mode: INR Updates

Another mode is an INR is first overfitted. This can be done in two ways. The first is either using the previously described average INR optimizer.

A second way is by overfitting the INR on a particular resolution, known to be the most used instreaming (for instance, HD video).

In both cases, this leads to a reference INR, noted and a final quality D_ref = D_MSE(I_ref, f_e ). Once optimized, the INR function is transformed into a bitstream using any known encoding technique, and decoded using function evaluation.

It might occur that this INR is sub-optimal for all resolution levels. Hence, we propose to first identify the resolution levels where the quality is less than expected, and second to learn an additional lightweight stream. These two steps are performed as follows

First, let us define a lower bound quality metric, that be either an absolute value, or a given percentage of the reference quality, for instance D_tow = 1.05 * D_ref where the coefficient can be adjusted by the user or service. Second, let us compute the list of resolution indices where the quality has not been reached. This set is defined as C = i E [0,7?] s. t. D_MSE Let us note that the threshold can be defined according to other metrics such as PSNR, and the comparison sign should be changed accordingly.

Third, an update on the weights INR 69t for each resolution i to be corrected is computed as 69t = argmin_S9 D_MSE (l_b f_d ,+a^ + /?||<50||) . The second term is added, weighted by a factor /?, so that the residual correction 89_L is as small as possible, hence leading to a lighter bistream that would be efficiently compressed by a known arithmetic coder. Once optimized, the update 89_L is transformed into a bitstream using any known encoding technique.

Finally, when the user/device requires a bitstream at a given resolution to the server, the server either sends the reference INR, or a corrected version. Both INR weights are encapsulated into a bitstream.

In a variant embodiment, the reference bitstream is first sent to obtain a first decoded image. Then, the additional residual bitstream is sent to bring the correction. That allows at the decoder level for a progressive decoding.

The above-described embodiments cover both the 2D encoding of videos, as well as the encoding of 3D scenes (multi-view imaging, point clouds).

These approaches have a far lower computational complexity than end-to-end neural compression approaches.

One embodiment of a method 300 under the general aspects described here is shown in Figure 3. The method commences at start block 301 and control proceeds to block 310 for determining parameters for an implicit neural representation of a neural network. Control proceeds from block 310 to block 320 for encoding video using the implicit neural representation.

One embodiment of a method 400 under the general aspects described here is shown in Figure 4. The method commences at start block 401 and control proceeds to block 410 for determining parameters for an implicit neural representation of a neural network. Control proceeds from block 410 to block 420 for decoding video using the implicit neural representation.

Figure 5 shows one embodiment of an apparatus 500 for encoding, decoding, compressing or decompressing, or filtering of video data using the aforementioned methods. The apparatus comprises Processor 510 and can be interconnected to a memory 520 through at least one port. Both Processor 510 and memory 520 can also have one or more additional interconnections to external connections.

Processor 510 is also configured to either insert or receive information in a bitstream and, either compressing, encoding, or decoding using any of the described aspects.

The embodiments described here include a variety of aspects, including tools, features, embodiments, models, approaches, etc. Many of these aspects are described with specificity and, at least to show the individual characteristics, are often described in a manner that may sound limiting. However, this is for purposes of clarity in description, and does not limit the application or scope of those aspects. Indeed, all of the different aspects can be combined and interchanged to provide further aspects. Moreover, the aspects can be combined and interchanged with aspects described in earlier filings as well.

The aspects described and contemplated in this application can be implemented in many different forms. Figures 6, 7, and 8 provide some embodiments, but other embodiments are contemplated and the discussion of Figures 6, 7, and 8 does not limit the breadth of the implementations. At least one of the aspects generally relates to video encoding and decoding, and at least one other aspect generally relates to transmitting a bitstream generated or encoded. These and other aspects can be implemented as a method, an apparatus, a computer readable storage medium having stored thereon instructions for encoding or decoding video data according to any of the methods described, and/or a computer readable storage medium having stored thereon a bitstream generated according to any of the methods described.

In the present application, the terms “reconstructed” and “decoded” may be used interchangeably, the terms “pixel” and “sample” may be used interchangeably, the terms “image,” “picture” and “frame” may be used interchangeably. Usually, but not necessarily, the term “reconstructed” is used at the encoder side while “decoded” is used at the decoder side.

Various methods are described herein, and each of the methods comprises one or more steps or actions for achieving the described method. Unless a specific order of steps or actions is required for proper operation of the method, the order and/or use of specific steps and/or actions may be modified or combined.

Various methods and other aspects described in this application can be used to modify modules, for example, the intra prediction, entropy coding, and/or decoding modules (160, 260, 145, 230), of a video encoder 100 and decoder 200 as shown in Figure 6 and Figure 7. Moreover, the present aspects are not limited to WC or HEVC, and can be applied, for example, to other standards and recommendations, whether pre-existing or future-developed, and extensions of any such standards and recommendations (including WC and HEVC). Unless indicated otherwise, or technically precluded, the aspects described in this application can be used individually or in combination.

Various numeric values are used in the present application. The specific values are for example purposes and the aspects described are not limited to these specific values.

Figure 6 illustrates an encoder 100. Variations of this encoder 100 are contemplated, but the encoder 100 is described below for purposes of clarity without describing all expected variations.

Before being encoded, the video sequence may go through pre-encoding processing (101), for example, applying a color transform to the input color picture (e.g., conversion from RGB 4:4:4 to YCbCr 4:2:0), or performing a remapping of the input picture components in order to get a signal distribution more resilient to compression (for instance using a histogram equalization of one of the color components). Metadata can be associated with the pre-processing and attached to the bitstream.

In the encoder 100, a picture is encoded by the encoder elements as described below. The picture to be encoded is partitioned (102) and processed in units of, for example, CUs. Each unit is encoded using, for example, either an intra or inter mode. When a unit is encoded in an intra mode, it performs intra prediction (160). In an inter mode, motion estimation (175) and compensation (170) are performed. The encoder decides (105) which one of the intra mode or inter mode to use for encoding the unit, and indicates the intra/inter decision by, for example, a prediction mode flag. Prediction residuals are calculated, for example, by subtracting (110) the predicted block from the original image block.

The prediction residuals are then transformed (125) and quantized (130). The quantized transform coefficients, as well as motion vectors and other syntax elements, are entropy coded (145) to output a bitstream. The encoder can skip the transform and apply quantization directly to the non-transformed residual signal. The encoder can bypass both transform and quantization, i.e., the residual is coded directly without the application of the transform or quantization processes.

The encoder decodes an encoded block to provide a reference for further predictions. The quantized transform coefficients are de-quantized (140) and inverse transformed (150) to decode prediction residuals. Combining (155) the decoded prediction residuals and the predicted block, an image block is reconstructed. In-loop filters (165) are applied to the reconstructed picture to perform, for example, deblocking/SAO (Sample Adaptive Offset) filtering to reduce encoding artifacts. The filtered image is stored at a reference picture buffer (180).

Figure 7 illustrates a block diagram of a video decoder 200. In the decoder 200, a bitstream is decoded by the decoder elements as described below. Video decoder 200 generally performs a decoding pass reciprocal to the encoding pass as described in Figure 6. The encoder 100 also generally performs video decoding as part of encoding video data.

In particular, the input of the decoder includes a video bitstream, which can be generated by video encoder 100. The bitstream is first entropy decoded (230) to obtain transform coefficients, motion vectors, and other coded information. The picture partition information indicates how the picture is partitioned. The decoder may therefore divide (235) the picture according to the decoded picture partitioning information. The transform coefficients are de-quantized (240) and inverse transformed (250) to decode the prediction residuals. Combining (255) the decoded prediction residuals and the predicted block, an image block is reconstructed. The predicted block can be obtained (270) from intra prediction (260) or motion- compensated prediction (i.e. , inter prediction) (275). In-loop filters (265) are applied to the reconstructed image. The filtered image is stored at a reference picture buffer (280).

The decoded picture can further go through post-decoding processing (285), for example, an inverse color transform (e.g. conversion from YcbCr 4:2:0 to RGB 4:4:4) or an inverse remapping performing the inverse of the remapping process performed in the pre-encoding processing (101). The post-decoding processing can use metadata derived in the pre-encoding processing and signaled in the bitstream.

Figure 8 illustrates a block diagram of an example of a system in which various aspects and embodiments are implemented. System 1000 can be embodied as a device including the various components described below and is configured to perform one or more of the aspects described in this document. Examples of such devices include, but are not limited to, various electronic devices such as personal computers, laptop computers, smartphones, tablet computers, digital multimedia set top boxes, digital television receivers, personal video recording systems, connected home appliances, and servers. Elements of system 1000, singly or in combination, can be embodied in a single integrated circuit (IC), multiple ICs, and/or discrete components. For example, in at least one embodiment, the processing and encoder/decoder elements of system 1000 are distributed across multiple ICs and/or discrete components. In various embodiments, the system 1000 is communicatively coupled to one or more other systems, or other electronic devices, via, for example, a communications bus or through dedicated input and/or output ports. In various embodiments, the system 1000 is configured to implement one or more of the aspects described in this document.

The system 1000 includes at least one processor 1010 configured to execute instructions loaded therein for implementing, for example, the various aspects described in this document. Processor 1010 can include embedded memory, input output interface, and various other circuitries as known in the art. The system 1000 includes at least one memory 1020 (e.g., a volatile memory device, and/or a nonvolatile memory device). System 1000 includes a storage device 1040, which can include non-volatile memory and/or volatile memory, including, but not limited to, Electrically Erasable Programmable Read-Only Memory (EEPROM), Read-Only Memory (ROM), Programmable Read-Only Memory (PROM), Random Access Memory (RAM), Dynamic Random Access Memory (DRAM), Static Random Access Memory (SRAM), flash, magnetic disk drive, and/or optical disk drive. The storage device 1040 can include an internal storage device, an attached storage device (including detachable and non-detachable storage devices), and/or a network accessible storage device, as non-limiting examples.

System 1000 includes an encoder/decoder module 1030 configured, for example, to process data to provide an encoded video or decoded video, and the encoder/decoder module 1030 can include its own processor and memory. The encoder/decoder module 1030 represents module(s) that can be included in a device to perform the encoding and/or decoding functions. As is known, a device can include one or both of the encoding and decoding modules. Additionally, encoder/decoder module 1030 can be implemented as a separate element of system 1000 or can be incorporated within processor 1010 as a combination of hardware and software as known to those skilled in the art.

Program code to be loaded onto processor 1010 or encoder/decoder 1030 to perform the various aspects described in this document can be stored in storage device 1040 and subsequently loaded onto memory 1020 for execution by processor 1010. In accordance with various embodiments, one or more of processor 1010, memory 1020, storage device 1040, and encoder/decoder module 1030 can store one or more of various items during the performance of the processes described in this document. Such stored items can include, but are not limited to, the input video, the decoded video or portions of the decoded video, the bitstream, matrices, variables, and intermediate or final results from the processing of equations, formulas, operations, and operational logic.

In some embodiments, memory inside of the processor 1010 and/or the encoder/decoder module 1030 is used to store instructions and to provide working memory for processing that is needed during encoding or decoding. In other embodiments, however, a memory external to the processing device (for example, the processing device can be either the processor 1010 or the encoder/decoder module 1030) is used for one or more of these functions. The external memory can be the memory 1020 and/or the storage device 1040, for example, a dynamic volatile memory and/or a non-volatile flash memory. In several embodiments, an external non-volatile flash memory is used to store the operating system of, for example, a television. In at least one embodiment, a fast external dynamic volatile memory such as a RAM is used as working memory for video coding and decoding operations, such as for MPEG-2 (MPEG refers to the Moving Picture Experts Group, MPEG-2 is also referred to as ISO/IEC 13818, and 13818-1 is also known as H.222, and 13818-2 is also known as H.262), HEVC (HEVC refers to High Efficiency Video Coding, also known as H.265 and MPEG-H Part 2), or VVC (Versatile Video Coding, a new standard being developed by JVET, the Joint Video Experts Team).

The input to the elements of system 1000 can be provided through various input devices as indicated in block 1130. Such input devices include, but are not limited to, (i) a radio frequency (RF) portion that receives an RF signal transmitted, for example, over the air by a broadcaster, (ii) a Component (COMP) input terminal (or a set of COMP input terminals), (iii) a Universal Serial Bus (USB) input terminal, and/or (iv) a High Definition Multimedia Interface (HDMI) input terminal. Other examples, not shown in Figure 8, include composite video. In various embodiments, the input devices of block 1130 have associated respective input processing elements as known in the art. For example, the RF portion can be associated with elements suitable for (i) selecting a desired frequency (also referred to as selecting a signal, or band-limiting a signal to a band of frequencies), (ii) downconverting the selected signal, (iii) band-limiting again to a narrower band of frequencies to select (for example) a signal frequency band which can be referred to as a channel in certain embodiments, (iv) demodulating the downconverted and bandlimited signal, (v) performing error correction, and (vi) demultiplexing to select the desired stream of data packets. The RF portion of various embodiments includes one or more elements to perform these functions, for example, frequency selectors, signal selectors, band-limiters, channel selectors, filters, downconverters, demodulators, error correctors, and demultiplexers. The RF portion can include a tuner that performs various of these functions, including, for example, downconverting the received signal to a lower frequency (for example, an intermediate frequency or a near-baseband frequency) or to baseband. In one set-top box embodiment, the RF portion and its associated input processing element receives an RF signal transmitted over a wired (for example, cable) medium, and performs frequency selection by filtering, downconverting, and filtering again to a desired frequency band. Various embodiments rearrange the order of the above-described (and other) elements, remove some of these elements, and/or add other elements performing similar or different functions. Adding elements can include inserting elements in between existing elements, such as, for example, inserting amplifiers and an analog-to-digital converter. In various embodiments, the RF portion includes an antenna.

Additionally, the USB and/or HDMI terminals can include respective interface processors for connecting system 1000 to other electronic devices across USB and/or HDMI connections. It is to be understood that various aspects of input processing, for example, Reed-Solomon error correction, can be implemented, for example, within a separate input processing IC or within processor 1010 as necessary. Similarly, aspects of USB or HDMI interface processing can be implemented within separate interface les or within processor 1010 as necessary. The demodulated, error corrected, and demultiplexed stream is provided to various processing elements, including, for example, processor 1010, and encoder/decoder 1030 operating in combination with the memory and storage elements to process the datastream as necessary for presentation on an output device. Various elements of system 1000 can be provided within an integrated housing, Within the integrated housing, the various elements can be interconnected and transmit data therebetween using suitable connection arrangement, for example, an internal bus as known in the art, including the Inter-IC (I2C) bus, wiring, and printed circuit boards.

The system 1000 includes communication interface 1050 that enables communication with other devices via communication channel 1060. The communication interface 1050 can include, but is not limited to, a transceiver configured to transmit and to receive data over communication channel 1060. The communication interface 1050 can include, but is not limited to, a modem or network card and the communication channel 1060 can be implemented, for example, within a wired and/or a wireless medium.

Data is streamed, or otherwise provided, to the system 1000, in various embodiments, using a wireless network such as a Wi-Fi network, for example IEEE 802.11 (IEEE refers to the Institute of Electrical and Electronics Engineers). The WiFi signal of these embodiments is received over the communications channel 1060 and the communications interface 1050 which are adapted for Wi-Fi communications. The communications channel 1060 of these embodiments is typically connected to an access point or router that provides access to external networks including the Internet for allowing streaming applications and other over-the-top communications. Other embodiments provide streamed data to the system 1000 using a set-top box that delivers the data over the HDMI connection of the input block 1130. Still other embodiments provide streamed data to the system 1000 using the RF connection of the input block 1130. As indicated above, various embodiments provide data in a nonstreaming manner. Additionally, various embodiments use wireless networks other than Wi-Fi, for example a cellular network or a Bluetooth network.

The system 1000 can provide an output signal to various output devices, including a display 1100, speakers 1110, and other peripheral devices 1120. The display 1100 of various embodiments includes one or more of, for example, a touchscreen display, an organic light-emitting diode (OLED) display, a curved display, and/or a foldable display. The display 1100 can be for a television, a tablet, a laptop, a cell phone (mobile phone), or another device. The display 1100 can also be integrated with other components (for example, as in a smart phone), or separate (for example, an external monitor for a laptop). The other peripheral devices 1120 include, in various examples of embodiments, one or more of a stand-alone digital video disc (or digital versatile disc) (DVR, for both terms), a disk player, a stereo system, and/or a lighting system. Various embodiments use one or more peripheral devices 1120 that provide a function based on the output of the system 1000. For example, a disk player performs the function of playing the output of the system 1000.

In various embodiments, control signals are communicated between the system 1000 and the display 1100, speakers 1110, or other peripheral devices 1120 using signaling such as AV.Link, Consumer Electronics Control (CEC), or other communications protocols that enable device-to-device control with or without user intervention. The output devices can be communicatively coupled to system 1000 via dedicated connections through respective interfaces 1070, 1080, and 1090. Alternatively, the output devices can be connected to system 1000 using the communications channel 1060 via the communications interface 1050. The display 1100 and speakers 1110 can be integrated in a single unit with the other components of system 1000 in an electronic device such as, for example, a television. In various embodiments, the display interface 1070 includes a display driver, such as, for example, a timing controller (T Con) chip.

The display 1100 and speaker 1110 can alternatively be separate from one or more of the other components, for example, if the RF portion of input 1130 is part of a separate set-top box. In various embodiments in which the display 1100 and speakers 1110 are external components, the output signal can be provided via dedicated output connections, including, for example, HDMI ports, USB ports, or COMP outputs.

The embodiments can be carried out by computer software implemented by the processor 1010 or by hardware, or by a combination of hardware and software. As a non-limiting example, the embodiments can be implemented by one or more integrated circuits. The memory 1020 can be of any type appropriate to the technical environment and can be implemented using any appropriate data storage technology, such as optical memory devices, magnetic memory devices, semiconductor-based memory devices, fixed memory, and removable memory, as non-limiting examples. The processor 1010 can be of any type appropriate to the technical environment, and can encompass one or more of microprocessors, general purpose computers, special purpose computers, and processors based on a multi-core architecture, as nonlimiting examples. Various implementations involve decoding. “Decoding”, as used in this application, can encompass all or part of the processes performed, for example, on a received encoded sequence to produce a final output suitable for display. In various embodiments, such processes include one or more of the processes typically performed by a decoder, for example, entropy decoding, inverse quantization, inverse transformation, and differential decoding. In various embodiments, such processes also, or alternatively, include processes performed by a decoder of various implementations described in this application.

As further examples, in one embodiment “decoding” refers only to entropy decoding, in another embodiment “decoding” refers only to differential decoding, and in another embodiment “decoding” refers to a combination of entropy decoding and differential decoding. Whether the phrase “decoding process” is intended to refer specifically to a subset of operations or generally to the broader decoding process will be clear based on the context of the specific descriptions and is believed to be well understood by those skilled in the art.

Various implementations involve encoding. In an analogous way to the above discussion about “decoding”, “encoding” as used in this application can encompass all or part of the processes performed, for example, on an input video sequence to produce an encoded bitstream. In various embodiments, such processes include one or more of the processes typically performed by an encoder, for example, partitioning, differential encoding, transformation, quantization, and entropy encoding. In various embodiments, such processes also, or alternatively, include processes performed by an encoder of various implementations described in this application.

As further examples, in one embodiment “encoding” refers only to entropy encoding, in another embodiment “encoding” refers only to differential encoding, and in another embodiment “encoding” refers to a combination of differential encoding and entropy encoding. Whether the phrase “encoding process” is intended to refer specifically to a subset of operations or generally to the broader encoding process will be clear based on the context of the specific descriptions and is believed to be well understood by those skilled in the art.

Note that the syntax elements as used herein are descriptive terms. As such, they do not preclude the use of other syntax element names.

When a figure is presented as a flow diagram, it should be understood that it also provides a block diagram of a corresponding apparatus. Similarly, when a figure is presented as a block diagram, it should be understood that it also provides a flow diagram of a corresponding method/process.

Various embodiments may refer to parametric models or rate distortion optimization. In particular, during the encoding process, the balance or trade-off between the rate and distortion is usually considered, often given the constraints of computational complexity. It can be measured through a Rate Distortion Optimization (RDO) metric, or through Least Mean Square (LMS), Mean of Absolute Errors (MAE), or other such measurements. Rate distortion optimization is usually formulated as minimizing a rate distortion function, which is a weighted sum of the rate and of the distortion. There are different approaches to solve the rate distortion optimization problem. For example, the approaches may be based on an extensive testing of all encoding options, including all considered modes or coding parameters values, with a complete evaluation of their coding cost and related distortion of the reconstructed signal after coding and decoding. Faster approaches may also be used, to save encoding complexity, in particular with computation of an approximated distortion based on the prediction or the prediction residual signal, not the reconstructed one. Mix of these two approaches can also be used, such as by using an approximated distortion for only some of the possible encoding options, and a complete distortion for other encoding options. Other approaches only evaluate a subset of the possible encoding options. More generally, many approaches employ any of a variety of techniques to perform the optimization, but the optimization is not necessarily a complete evaluation of both the coding cost and related distortion.

The implementations and aspects described herein can be implemented in, for example, a method or a process, an apparatus, a software program, a data stream, or a signal. Even if only discussed in the context of a single form of implementation (for example, discussed only as a method), the implementation of features discussed can also be implemented in other forms (for example, an apparatus or program). An apparatus can be implemented in, for example, appropriate hardware, software, and firmware. The methods can be implemented in, for example, a processor, which refers to processing devices in general, including, for example, a computer, a microprocessor, an integrated circuit, or a programmable logic device. Processors also include communication devices, such as, for example, computers, cell phones, portable/personal digital assistants (“PDAs”), and other devices that facilitate communication of information between end-users. Reference to “one embodiment” or “an embodiment” or “one implementation” or “an implementation”, as well as other variations thereof, means that a particular feature, structure, characteristic, and so forth described in connection with the embodiment is included in at least one embodiment. Thus, the appearances of the phrase “in one embodiment” or “in an embodiment” or “in one implementation” or “in an implementation”, as well any other variations, appearing in various places throughout this application are not necessarily all referring to the same embodiment.

Additionally, this application may refer to “determining” various pieces of information. Determining the information can include one or more of, for example, estimating the information, calculating the information, predicting the information, or retrieving the information from memory.

Further, this application may refer to “accessing” various pieces of information. Accessing the information can include one or more of, for example, receiving the information, retrieving the information (for example, from memory), storing the information, moving the information, copying the information, calculating the information, determining the information, predicting the information, or estimating the information.

Additionally, this application may refer to “receiving” various pieces of information. Receiving is, as with “accessing”, intended to be a broad term. Receiving the information can include one or more of, for example, accessing the information, or retrieving the information (for example, from memory). Further, “receiving” is typically involved, in one way or another, during operations such as, for example, storing the information, processing the information, transmitting the information, moving the information, copying the information, erasing the information, calculating the information, determining the information, predicting the information, or estimating the information.

It is to be appreciated that the use of any of the following “/”, “and/or”, and “at least one of”, for example, in the cases of “A/B”, “A and/or B” and “at least one of A and B”, is intended to encompass the selection of the first listed option (A) only, or the selection of the second listed option (B) only, or the selection of both options (A and B). As a further example, in the cases of “A, B, and/or C” and “at least one of A, B, and C”, such phrasing is intended to encompass the selection of the first listed option (A) only, or the selection of the second listed option (B) only, or the selection of the third listed option (C) only, or the selection of the first and the second listed options (A and B) only, or the selection of the first and third listed options (A and C) only, or the selection of the second and third listed options (B and C) only, or the selection of all three options (A and B and C). This may be extended, as is clear to one of ordinary skill in this and related arts, for as many items as are listed.

Also, as used herein, the word “signal” refers to, among other things, indicating something to a corresponding decoder. For example, in certain embodiments the encoder signals a particular one of a plurality of transforms, coding modes or flags. In this way, in an embodiment the same transform, parameter, or mode is used at both the encoder side and the decoder side. Thus, for example, an encoder can transmit (explicit signaling) a particular parameter to the decoder so that the decoder can use the same particular parameter. Conversely, if the decoder already has the particular parameter as well as others, then signaling can be used without transmitting (implicit signaling) to simply allow the decoder to know and select the particular parameter. By avoiding transmission of any actual functions, a bit savings is realized in various embodiments. It is to be appreciated that signaling can be accomplished in a variety of ways. For example, one or more syntax elements, flags, and so forth are used to signal information to a corresponding decoder in various embodiments. While the preceding relates to the verb form of the word “signal”, the word “signal” can also be used herein as a noun.

As will be evident to one of ordinary skill in the art, implementations can produce a variety of signals formatted to carry information that can be, for example, stored or transmitted. The information can include, for example, instructions for performing a method, or data produced by one of the described implementations. For example, a signal can be formatted to carry the bitstream of a described embodiment. Such a signal can be formatted, for example, as an electromagnetic wave (for example, using a radio frequency portion of spectrum) or as a baseband signal. The formatting can include, for example, encoding a data stream and modulating a carrier with the encoded data stream. The information that the signal carries can be, for example, analog or digital information. The signal can be transmitted over a variety of different wired or wireless links, as is known. The signal can be stored on a processor-readable medium.

The preceding sections describe a number of embodiments, across various claim categories and types. Features of these embodiments can be provided alone or in any combination. Further, embodiments can include one or more of the following features, devices, or aspects, alone or in any combination, across various claim categories and types:

At least one embodiment comprises determining parameters for an implicit neural representation of a neural network.

At least one embodiment comprises the above embodiment wherein determination of parameters comprises minimizing a loss function over a range of video resolutions.

At least one embodiment comprises the above embodiment wherein parameters comprise weights for the implicit neural representation.

At least one embodiment comprises any of the above embodiments and further refining weights of an implicit neural representation to adapt the implicit neural representation to a particular resolution(s).

At least one embodiment comprises the above embodiment wherein the refined weights constitute an additional bitstream.

At least one embodiment comprises the above embodiments wherein the additional bitstream and the implicit neural representation are encoded and/or decoded.

At least one embodiment comprises encoding and/or decoding the embodiment above.

At least one embodiment comprises any encoding or decoding operation based on the above operations.

At least one embodiment comprises a bitstream or signal that includes one or more of the described syntax elements, or variations thereof.

At least one embodiment comprises a bitstream or signal that includes syntax conveying information generated according to any of the embodiments described.

At least one embodiment comprises creating and/or transmitting and/or receiving and/or decoding according to any of the embodiments described.

At least one embodiment comprises a method, process, apparatus, medium storing instructions, medium storing data, or signal according to any of the embodiments described.

At least one embodiment comprises inserting in the signaling syntax elements that enable the decoder to determine decoding information in a manner corresponding to that used by an encoder. At least one embodiment comprises creating and/or transmitting and/or receiving and/or decoding a bitstream or signal that includes one or more of the described syntax elements, or variations thereof.

At least one embodiment comprises a TV, set-top box, cell phone, tablet, or other electronic device that performs transform method(s) according to any of the embodiments described.

At least one embodiment comprises a TV, set-top box, cell phone, tablet, or other electronic device that performs transform method(s) determination according to any of the embodiments described, and that displays (e.g., using a monitor, screen, or other type of display) a resulting image.

At least one embodiment comprises a TV, set-top box, cell phone, tablet, or other electronic device that selects, bandlimits, or tunes (e.g., using a tuner) a channel to receive a signal including an encoded image, and performs transform method(s) according to any of the embodiments described. At least one embodiment comprises a TV, set-top box, cell phone, tablet, or other electronic device that receives (e.g., using an antenna) a signal over the air that includes an encoded image, and performs transform method(s).

Claims

1. A method, comprising: determining parameters for an implicit neural representation of a neural network; and, encoding video using the implicit neural representation.

2. An apparatus, comprising: a memory, and a processor, configured to: determine parameters for an implicit neural representation of a neural network; and, encode video using the implicit neural representation.

3. A method, comprising: determining parameters for an implicit neural representation of a neural network; and, decoding video using the implicit neural representation.

4. An apparatus, comprising: a memory, and a processor, configured to: determine parameters for an implicit neural representation of a neural network; and, decode video using the implicit neural representation.

5. The method of Claim 1 or 3, or the apparatus of Claim 2 or 4, wherein said determining of parameters for the implicit neural representation comprises minimizing a loss function over a range of video resolutions.

6. The method of Claim 1 or 3, or the apparatus of Claim 2 or 4, wherein said determining of parameters for the implicit neural representation comprises minimizing a loss function for a particular video resolution.

7. The method or the apparatus of any one of Claim 5 or 6, wherein said determined parameters comprise at least one weight.

8. The method or the apparatus of Claim 7, further comprising determining at least one correction factor to be applied to at least one weight for a corresponding video resolution value.

9. The method or the apparatus of Claim 8, wherein said correction factor is incorporated into data encoded separately from said implicit neural representation.

10. The method or the apparatus of Claim 8, wherein said correction factor is applied to said at least one weight and encoded along with said implicit neural representation.

11 . The method of any one of Claims 1 , 3, 5-10, or the apparatus of any one of Claims 2, 4, or 5-10, wherein information is encapsulated in a bitstream used for said neural network.

12. A device comprising: an apparatus according to Claim 2; and at least one of (i) an antenna configured to receive a signal, the signal including a video block, (ii) a band limiter configured to limit the received signal to a band of frequencies that includes the video block, and (iii) a display configured to display an output representative of the video block.

13. A non-transitory computer readable medium containing data content generated according to the method of any one of claims 1 , 3, or 5 through 11 , or by the apparatus of any one of claims 2, 4, or 5 through 11 , for playback using a processor.

14. A signal comprising video data generated according to the method of any one of claims 1 , or 3, or 5 through 11 , or by the apparatus of any one of claims 2, or 4, or 5 through 11 , for playback using a processor.

15. A computer program product comprising instructions which, when the program is executed by a computer, cause the computer to carry out the method of any one of claims 1 , or 3 or 5 through 11 .