WO2018061817A1 - Gate driving circuit and light emission device having same - Google Patents

Abstract

A gate driving circuit comprises: an on-voltage application unit that applies, to a gate terminal, an on-voltage equal to or greater than a threshold voltage; an on-voltage variation unit that varies the on-voltage; and an off-voltage application unit that applies, to the gate terminal, an off-voltage lower than the threshold voltage that removes charges from a parasitic capacitance between the gate terminal and a first terminal. The on-voltage variation unit varies the on-voltage in such a manner that a first on-voltage equal to or greater than the threshold voltage is applied at the beginning of an on-interval of the semiconductor switching element and a second on-voltage lower than the first on-voltage and equal to or greater than the threshold voltage is applied at the end of the on-interval. In this way, a gate driving circuit capable of further shortening the turn-off time of a semiconductor switching element is provided.

Description

Gate drive circuit and light emitting device including the same

The present invention relates to a gate driving circuit for driving a semiconductor switching element by applying a voltage to the gate terminal with respect to the semiconductor switching element having a gate terminal, and a light emitting device including the gate driving circuit.

Conventionally, when a semiconductor light emitting device such as a laser diode is caused to emit light in a pulsed manner, a semiconductor switching device having a gate terminal such as a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) is used. At this time, in order to increase the switching speed of the semiconductor switching element, it is required to shorten the time required for the transition from the ON state to the OFF state (hereinafter referred to as “turn-off”) for the semiconductor switching element. Yes.

Therefore, for example, a gate drive circuit has been proposed in which a negative voltage is applied to the gate terminal to shorten the turn-off time when the semiconductor switching element is turned off (see, for example, Patent Documents 1 and 2).

However, in recent years, further switching operation speed has been demanded for semiconductor switching elements. That is, there is a demand for a switching operation with shorter turn-on time and turn-off time of the semiconductor switching element.

Japanese Patent Laid-Open No. 8-14997 JP 2000-216671 A

The present invention provides a gate driving circuit capable of shortening the turn-on time and the turn-off time of a semiconductor switching element, and a light emitting device including the same.

In the present invention, the first terminal, the second terminal connected to the higher potential side than the first terminal, and the voltage higher than the threshold voltage are applied, so that the first terminal and the second terminal are electrically connected. And a gate drive circuit for driving an N-channel type semiconductor switching element having a gate terminal. The gate drive circuit includes an on-voltage applying unit that applies an on-voltage that is equal to or higher than a threshold voltage to a gate terminal, an on-voltage variable unit that changes an on-voltage applied by the on-voltage applying unit, and a gate terminal that is lower than the threshold voltage. And an off-voltage applying unit that applies an off-voltage that draws charges from the parasitic capacitance between the gate terminal and the first terminal. The on-voltage variable unit applies, as an on-voltage, a first on-voltage that is equal to or higher than a threshold voltage at the start of the on-period of the semiconductor switching element, is lower than the first on-voltage at the end of the on-period, and The ON voltage is changed and applied to the gate terminal of the semiconductor switching element so that the second ON voltage equal to or higher than the threshold voltage is applied.

According to this configuration, at the end of the ON period of the semiconductor switching element, a second ON voltage that is lower than the first ON voltage is applied to the gate terminal. Therefore, the amount of charge accumulated in the parasitic capacitance (hereinafter referred to as “gate parasitic capacitance”) between the gate terminal and the first terminal of the semiconductor switching element is such that a constant first on-voltage is obtained during the on-period. Compared to the case where the voltage is continuously applied. As a result, charges can be quickly extracted from the gate parasitic capacitance at the time of turn-off. As a result, the turn-off time of the semiconductor switching element can be shortened.

Furthermore, when the semiconductor switching element transitions from the off state to the on state (hereinafter referred to as “turn on”), a first on voltage higher than the second on voltage is applied to the gate terminal. Thereby, the turn-on time of the semiconductor switching element can be shortened.

Further, according to the present invention, a first terminal, a second terminal connected to a lower potential side than the first terminal, and a voltage equal to or lower than a threshold voltage are applied between the first terminal and the second terminal. Is a gate drive circuit for driving a P-channel type semiconductor switching element having a gate terminal for conducting. The gate drive circuit includes an on-voltage applying unit that applies an on-voltage less than or equal to a threshold voltage to the gate terminal, an on-voltage variable unit that changes the on-voltage applied by the on-voltage applying unit, and a gate terminal that is higher than the threshold voltage. And an off-voltage applying unit that applies an off-voltage that draws charges from the parasitic capacitance between the gate terminal and the first terminal. The on-voltage variable unit applies, as an on-voltage, a first on-voltage that is equal to or lower than a threshold voltage at the start of the on-period of the semiconductor switching element, is higher than the first on-voltage at the end of the on-period, and The on-voltage applied to the gate terminal of the semiconductor switching element is changed so that the second on-voltage below the threshold voltage is applied.

According to this configuration, the second on-voltage higher than the first on-voltage is applied to the gate terminal at the end of the on-period of the semiconductor switching element. For this reason, the amount of charge accumulated in the gate parasitic capacitance of the switching element is smaller than that in the case where the first on-voltage is continuously applied in the on-period. As a result, charges can be quickly extracted from the gate parasitic capacitance at the time of turn-off. As a result, the turn-off time of the semiconductor switching element can be shortened.

Furthermore, when the semiconductor switching element is turned on, a first on-voltage that is lower than the second on-voltage is applied to the gate terminal. Thereby, the turn-on time of the semiconductor switching element can be shortened.

The light-emitting device of the present invention includes a light-emitting element, a semiconductor switching element that switches between supply and stop of current to the light-emitting element, and the gate drive circuit that drives the semiconductor switching element.

According to this configuration, a light-emitting device with a short turn-on time and turn-off time of the light-emitting element can be realized by a gate drive circuit having a simple circuit configuration.

Furthermore, at the end of the ON period of the semiconductor switching element, a gate potential difference applied to the semiconductor switching element is smaller than the first ON voltage, and a second ON voltage is applied to the gate terminal. For this reason, the amount of charge accumulated in the gate parasitic capacitance of the switching element is smaller than that in the case where the first on-voltage is continuously applied in the on-period. As a result, charges can be quickly extracted from the gate parasitic capacitance at the time of turn-off, and the turn-off time can be shortened. As a result, it is possible to quickly switch between supply and stop of the current flowing through the light emitting element.

FIG. 1 is a block diagram showing a configuration of a gate drive circuit according to Embodiment 1 of the present invention. FIG. 2 is a time chart showing the output signal of the on-voltage applying unit in the gate drive circuit according to the embodiment, and a time chart showing the voltage of the gate terminal in the semiconductor switching element driven by the gate drive circuit. FIG. 3 is a block diagram showing the configuration of the gate drive circuit according to Embodiment 2 of the present invention. FIG. 4 is a block diagram showing the configuration of the gate drive circuit according to Embodiment 3 of the present invention. FIG. 5 is a time chart showing the output signal of the on-voltage applying unit in the gate drive circuit according to the embodiment, and a time chart showing the voltage of the gate terminal in the semiconductor switching element driven by the gate drive circuit. FIG. 6 is a block diagram showing the configuration of the gate drive circuit according to Embodiment 4 of the present invention.

Hereinafter, a gate drive circuit and a light-emitting device including the gate drive circuit according to embodiments of the present invention will be described with reference to the drawings.

(Embodiment 1)
Hereinafter, the circuit configuration of the light emitting device including the gate driving circuit and the gate driving circuit according to the first embodiment will be described with reference to FIG.

FIG. 1 is a block diagram showing a configuration of a light emitting device including a gate drive circuit 2 and a gate drive circuit 2 according to Embodiment 1 of the present invention.

As shown in FIG. 1, the light emitting device 1 of the present embodiment includes a gate drive circuit 2, a light emitting element LD, a semiconductor switching element Q1, and the like.

The light emitting device 1 according to the present embodiment is used as a light source in a distance image camera of a TOF (Time Of Flight) system that creates a three-dimensional distance distribution image, for example. The TOF range image camera first irradiates a subject with laser light. Next, the reflected light is measured with a two-dimensional image sensor. Then, the distance to the subject is calculated based on the flight time of light. Thus, the camera creates a three-dimensional distance distribution image.

The light emitting element LD is configured by, for example, a laser diode that emits light when supplied with current. In this embodiment, a laser diode having two terminals will be described as an example.

In addition, the light emitting device 1 of the present embodiment repeats switching between conduction and non-conduction of the semiconductor switching element Q1 in units of nanoseconds, for example, and repeatedly switches light emission and non-light emission of the light emitting element LD at high speed. Operate.

Semiconductor switching elements Q1 has a first terminal _{t 1,} the second terminal _{t 2} is connected to the high potential side of the first terminal _{t 1,} and has a gate terminal _{t G.} Semiconductor switching element Q1, the gate terminal t _G, the threshold voltage or higher is applied between the first terminal t ₁ and the second terminal t ₂ is conductive. The semiconductor switching element Q1 of the present embodiment is composed of an N channel type MOSFET. Therefore, a source terminal corresponding to the first terminal t _1, the drain terminal corresponding to the second terminal t _2, and the gate terminal t _G. Note that the above threshold voltage, the potential difference between the gate terminal t _G and the first terminal (the source terminal t _1). The threshold voltage in the present embodiment is, for example, + 3V.

The gate drive circuit 2 includes an on-voltage application unit 3, an on-voltage variable unit 4, an off-voltage application unit 5, and the like.

The on-voltage application unit 3 includes, for example, a driver IC, and is connected to an FPGA (Field Programmable Gate Array) that generates a pulse signal (not shown), a first voltage power supply V1, and a GND. The FPGA outputs a pulse signal having a predetermined pulse width to the on-voltage applying unit 3 in accordance with imaging mode information input from the outside. The first voltage power supply V1 is a constant voltage power supply that applies a predetermined voltage. The first voltage source V1 applies a first ON voltage higher than the threshold voltage to the gate terminal t _G of the semiconductor switching element Q1. The first voltage source V1 of the embodiment, as the predetermined voltage, the first constant voltage _{V 1} (e.g., + 17 V) to be applied to the gate terminal _{t G.}

The on-voltage variable unit 4 includes a capacitor C1, a first differentiation circuit 7, a second voltage power supply V2, and the like. Capacitor C1, the output terminal 3a of the on-voltage applying unit 3 is connected between the gate terminal t _G of the semiconductor switching element Q1. First differentiating circuit 7 includes series circuit 6, one end of which is connected to the connection point J1 of the capacitor C1 and the gate terminal t _G. The second voltage power supply V2 is connected to the other end of the first resistor R1 of the series circuit 6. The series circuit 6 of the present embodiment includes a diode D1 whose anode is connected to the connection point J1, and a first resistor R1 whose one end is connected in series with the cathode of the diode D1. The second voltage power supply V2 is a constant voltage power supply that applies a predetermined voltage. The second voltage source V2, to the gate terminal t _G of the semiconductor switching elements Q1, lower than the first ON voltage and the threshold voltage or more second on-voltage of the semiconductor switching element Q1 is applied. The second voltage power supply V2 of the present embodiment applies a second constant voltage V ₂ (for example, +5 V) as a predetermined voltage to the on-voltage variable unit 4.

Off voltage applying unit 5, a capacitor C1, and includes a second resistor R2 connected between the gate terminal t _G and the first terminal t ₁ of the semiconductor switching elements Q1 _(source terminal), the second differentiating circuit Constitute. At this time, the second resistor R2 has one end connected to the connection point J1 and the other end connected to GND.

Semiconductor switching elements Q1, during the first terminal _{t 1} and the second terminal _{t 2,} the third resistor R3, connected in parallel. The third resistor R3, by passing a small current to the configured light emitting element LD laser diode generates a voltage drop to the laser diode to lower the potential of the second terminal t ₂ of the semiconductor switching element Q1. Thus, by reducing the voltage change at the time of switching, reducing the effect of parasitic capacitance between the gate terminal t _G first terminal t ₁ and the second terminal t ₂ of the semiconductor switching elements Q1.

Note that the circuit configurations of the first differentiating circuit 7 and the second differentiating circuit (off-voltage applying unit 5) are not limited to the above-described configurations, and may be other configurations.

As described above, the light emitting device 1 including the gate driving circuit 2 and the gate driving circuit 2 of the present embodiment is configured.

Hereinafter, the operation of the light emitting device 1 including the gate driving circuit 2 and the gate driving circuit 2 will be described with reference to FIG.

FIG. 2 is a time chart showing the output signal of the on-voltage applying unit in the gate drive circuit according to the embodiment, and a time chart showing the voltage of the gate terminal in the semiconductor switching element driven by the gate drive circuit. The upper time chart of FIG. 2 shows the output signal of the on-voltage application unit 3 of the gate drive circuit 2. Lower time chart in Figure 2 shows the voltage applied to the gate terminal t _G of the semiconductor switching elements Q1 which is driven by the gate drive circuit 2.

As shown in FIG. 2, the on-voltage applying unit 3 uses the voltage of the first on-voltage V _ON1 to turn on the HIGH signal based on the pulse signal output from the FPGA, when the pulse signal is HIGH. 4 is output. On the other hand, the on-voltage applying unit 3 outputs a LOW signal to the on-voltage variable unit 4 at a voltage of 0 V when the pulse signal is LOW. The period in which the ON voltage applying unit 3 outputs a HIGH signal corresponds to the ON period _{T ON} of the semiconductor switching element Q1. The period during which the on-voltage applying unit 3 outputs a LOW signal corresponds to the off-period T _OFF of the semiconductor switching element Q1.

Upon turn-on of the semiconductor switching elements Q1, at the beginning of the ON period T _ON, the output terminal 3a of the on-voltage applying unit 3 to the capacitor C1, the first constant voltages V ₁ is set to a first voltage source V1 _(for example, A HIGH signal corresponding to + 17V is output. Accordingly, the ON voltage applied to the gate terminal _{t G} of the semiconductor switching element Q1, the first differentiating circuit 7 first on-voltage _{V ON1} (e.g., + 17 V) until suddenly increases. At this time, charges are accumulated in the capacitor C1. Further, parasitic capacitance between the gate terminal t _G and the first terminal t _{1 (source} terminal) of the semiconductor switching elements Q1 (hereinafter, referred to as "gate parasitic capacitance") also, the charge is accumulated.

Then, with the rise of the ON voltage, the voltage applied to the gate terminal t _G of the semiconductor switching element Q1, the threshold voltage (e.g., + 3V) when it becomes more, the first terminal t ₁ and the second terminal t ₂ Is in a conductive state. Thus, the first terminal _{t 1} from the second terminal _{t 2} of the semiconductor switching elements _Q1, a current flows. In this embodiment, it becomes conductive state source terminal t ₁ and the drain terminal t ₂ of the semiconductor switching elements Q1, the drain current flows. As a result, current is supplied from the second voltage power supply V2 to the light emitting element LD via the fourth resistor R4, and the light emitting element LD emits light.

Then, on the voltage applied to the gate terminal _{t G} is greater than the threshold voltage, the first on-voltage _{V ON1} (e.g., + 17 V) until suddenly increases. Thereafter, the ON voltage decreases with the time constant of the first differentiating circuit 7. The ON voltage is a total value of the second constant voltage V ₂ (for example, + 5V) set to the second voltage power supply V2 and the voltage V _D1 (for example, + 0.6V) generated between both ends of the diode D1. It is maintained at a certain second ON voltage V _ON2 (for example, +5.6 V). Note that in the on-period T _ON, after the first on-voltage V _ON1 is applied, the voltage applied to the gate terminal t _G (corresponding to the waveform of the lower α region in FIG. 2) is convex downward It gradually decreases with the slope of.

The gate terminal _{t G} second on-voltage _{V ON2} (e.g., + 5.6 V) even in a state of being applied, the voltage applied to the gate terminal _{t G} is the threshold voltage (e.g., + 3V) is greater than or equal, therefore, The conduction state of the semiconductor switching element Q1 is maintained, and the light emitting element LD continues to emit light. Even in this state, charges are accumulated in the capacitor C1. Specifically, the capacitor C1 is charged with the first on-voltage _{V ON1} (e.g., + 17 V) and the voltage difference between the second on-voltage _{V ON2} (e.g., + 5.6 V) (e.g., + 11.4 V) .

On the other hand, when the semiconductor switching element Q1 is turned off, a LOW signal is output from the output terminal 3a of the on-voltage applying unit 3 to the capacitor C1 at the start of the off period _TOFF . Accordingly, the voltage difference which has been charged in the capacitor C1 (for example, + 11.4 V) corresponding to the charge is discharged in a reverse bias is applied to the gate terminal t _G of the semiconductor switching element Q1. The reverse bias charge is withdrawn from the parasitic capacitance between the gate terminal t _G and the first terminal t _{1 (source} terminal). Then, the voltage applied to the gate terminal _{t G} of the semiconductor switching element Q1, a first OFF voltage _{V OFF1} (e.g., -11.4V) until drops rapidly.

At this time, the voltage applied to the gate terminal t _G is the threshold voltage (e.g., + 3V) when it becomes less than, the semiconductor switching element Q1 is turned off. Thereby, the current to the light emitting element LD is stopped, and the light emitting element LD enters a non-light emitting state.

Then, the voltage applied to the gate terminal _{t G} is from less than the threshold voltage, the first off-voltage _{V OFF1} (e.g., -11.4V) until drops rapidly. Thereafter, the voltage rises with the time constant of the off-voltage applying unit 5 (second differential circuit). Then, the voltage applied to the gate terminal _{t G} is maintained at the second turn-off voltage _{V OFF2} (e.g., 0V). Note that in the OFF period T _OFF, after the first off-voltage V _OFF1 is applied, the voltage applied to the gate terminal t _G (corresponding to the waveform of the lower β region of FIG. 2) is convex upward It gradually rises with a slope of.

The second off-voltage _{V OFF2} to a gate terminal _{t G} (e.g., 0V) even in a state where it is applied, the voltage applied to the gate terminal _{t G} is the threshold voltage (e.g., + 3V) lower than. Therefore, the non-conducting state of the semiconductor switching element Q1 is maintained, and the light emitting element LD is maintained in the non-light emitting state.

The semiconductor switching element Q1 repeats a series of operations of an on period T _ON and an off period T _OFF . As a result, the switching operation of the light emitting element LD between light emission and non-light emission is repeatedly executed.

As described above, the gate driving circuit 2 and the light emitting device 1 including the gate driving circuit 2 operate.

The effects of the above configuration and operation will be described below.

First, the gate driving circuit 2, at the end of the ON period _{T ON} of the semiconductor switching elements Q1, first ON voltage _{V ON1} (e.g., + 17 V) lower than the second on-voltage _{V ON2} (e.g., + 5.6 V) There is applied to the gate terminal t _G. Therefore, the amount of charges accumulated in the gate parasitic capacitance of the semiconductor switching element Q1 is in the on-period T _ON, constant first ON voltage V _{ON1 (e.g.,} + 17 V) smaller than when continues to be applied. As a result, when the semiconductor switching element Q1 is turned off, charges can be quickly extracted from the gate parasitic capacitance. As a result, the turn-off time of the semiconductor switching element Q1 can be shortened.

In addition, when the semiconductor switching element Q1 is turned on, the gate driving circuit 2 has, for example, 2 as compared with the second on-voltage V _ON2 (for example, +5.6 V) with respect to the first terminal t ₁ (source terminal). more than double of the first on-voltage _{V ON1} (e.g., + 17 V) is applied to the gate terminal _{t G} a. Therefore, the ON voltage of the gate terminal t _G is the time to exceed the threshold voltage becomes short. Thereby, the turn-on time when the semiconductor switching element Q1 is turned on can be further shortened.

Further, the gate driving circuit 2 has a second off voltage V _OFF2 (for example, higher than the first off voltage V _OFF1 (for example, −11.4 V)) applied to the gate terminal t _G immediately before turning on the semiconductor switching element Q1. , 0V) is applied. Therefore, when the semiconductor switching element Q1 is turned on, the difference between the voltage immediately before turning on and the threshold voltage is small compared to the case where the constant first off voltage _VOFF1 is continuously applied. Thereby, the turn-on time of the semiconductor switching element Q1 can be further shortened.

Further, the light emitting device 1, the second voltage source V2, the current supply to the light emitting element LD, and is configured to perform both the application of the second on-voltage V _ON2 to the gate terminal t _G. Therefore, the light-emitting device 1 can be reduced in size as compared with a configuration in which application is performed with separate power sources.

(Embodiment 2)
Hereinafter, the circuit configuration of the light emitting device 11 including the gate driving circuit 12 and the gate driving circuit 12 according to the second embodiment will be described with reference to FIG.

FIG. 3 is a block diagram showing a configuration of the light emitting device 11 including the gate drive circuit 12 and the gate drive circuit 12 according to Embodiment 2 of the present invention.

In this embodiment, the configuration of the on-voltage variable section 14 in the gate drive circuit 12 is different from that in the first embodiment. Other configurations are the same. Therefore, the same reference numerals are given to the same configurations in the second embodiment as those in the first embodiment, and the description thereof is omitted.

As shown in FIG. 3, the light emitting device 11 of the present embodiment includes a gate driving circuit 12, a light emitting element LD, a semiconductor switching element Q1, and the like.

The gate drive circuit 12 includes an on-voltage application unit 3, an on-voltage variable unit 14, an off-voltage application unit 5, and the like.

The on-voltage variable unit 14 includes a capacitor C1, a first differentiation circuit 7, a Zener diode ZD, and the like. Capacitor C1, the output terminal 3a of the on-voltage applying unit 3 is connected between the gate terminal t _G of the semiconductor switching element Q1. First differentiating circuit 7 includes a capacitor C1, a series circuit 6 having one end connected to the connection point J1 and the gate terminal t _G of the semiconductor switching element Q1. The series circuit 6 includes a diode D1 whose anode is connected to the connection point J1, and a first resistor R1 whose one end is connected in series with the cathode of the diode D1. The Zener diode ZD has a cathode connected to the other end of the first resistor R1 (an end of the first resistor R1 that is not connected to the diode D1). The anode of the Zener diode ZD is connected to the first terminal t ₁ (source terminal) of the semiconductor switching element Q1.

Note that the Zener voltage value of the Zener diode ZD is higher than a threshold voltage (for example, + 3V), for example, + 5V. Therefore, in the on-voltage varying unit 14 of this embodiment, the Zener voltage value corresponds to a second constant voltage V ₂ which is set by the second voltage source V2 of the first embodiment.

As described above, the gate driving circuit 12 and the light emitting device 11 including the gate driving circuit 12 according to the present embodiment are configured and operate as follows.

That is, the light emitting device 11 of the present embodiment, as in the first embodiment, during the turn-on of the semiconductor switching elements Q1, on the voltage applied to the gate terminal t _G is the first by a first differentiating circuit 7 The voltage rapidly rises to the ON voltage V _ON1 (for example, + 17V). Thereafter, the ON voltage decreases with the time constant of the first differentiating circuit 7. Then, the ON voltage is a Zener voltage value (for example, +5 V) of the Zener diode ZD corresponding to the second constant voltage V ₂ of the first embodiment, and a voltage V _D1 (for example, +0.6 V) generated between both ends of the diode D1. ) And the second on-voltage V _ON2 (for example, +5.6 V).

Thus, similarly to the light emitting device 1 of the first embodiment, at the end of the ON period _{T ON,} lower than the first ON voltage _{V ON1,} second on-voltage _{V ON2} is applied to the gate terminal _{t G} . Therefore, the amount of charges accumulated in the gate parasitic capacitance of the semiconductor switching element Q1 is in the on-period T _ON, smaller compared with the case where a certain first on-voltage V _ON1 is continuously applied. As a result, when the semiconductor switching element Q1 is turned off, charges are quickly extracted from the gate parasitic capacitance, and the turn-off time of the semiconductor switching element Q1 can be shortened. As a result, it is possible to quickly switch between supply and stop of the current flowing through the light emitting element LD.

(Embodiment 3)
Hereinafter, the circuit configuration of the light emitting device 21 including the gate driving circuit 22 and the gate driving circuit 22 according to the third embodiment will be described with reference to FIG.

FIG. 4 is a block diagram showing a configuration of the gate drive circuit 22 according to Embodiment 3 of the present invention.

The third embodiment is different from the first embodiment in that the semiconductor switching element Q2 is configured by a P-channel type MOSFET. Therefore, the same reference numerals are given to the same configurations in the third embodiment as those in the first embodiment, and the description thereof is omitted.

As shown in FIG. 4, the light emitting device 21 of the present embodiment includes a gate drive circuit 22, a light emitting element LD, a semiconductor switching element Q2, and the like.

The semiconductor switching element Q2 is composed of a P-channel type MOSFET. Therefore, the threshold voltage of the semiconductor switching element Q2 in the present embodiment is, for example, −3V.

The gate drive circuit 22 includes an on-voltage application unit 3, an on-voltage variable unit 24, an off-voltage application unit 25, and the like.

Similarly to the first embodiment, the on-voltage applying unit 3 is connected to the FPGA, the first voltage power supply V1, and GND. The first voltage power supply V1 is a constant voltage power supply that applies a predetermined voltage. The first voltage source V1 is lower than the threshold voltage to the gate terminal t _G of the semiconductor switching elements Q2, applying a first turn-on voltage. To the first voltage source V1 of the embodiment relative to the potential of the third power supply voltage V3, as the predetermined voltage, the first constant voltage _{V 1} (e.g., -17 V) to be applied to the gate terminal _{t G.}

The on-voltage variable unit 24 includes a capacitor C1, a first differentiation circuit 27, and the like. Capacitor C1, the output terminal 3a of the on-voltage applying unit 3 is connected between the gate terminal t _G of the semiconductor switching element Q2. The first differentiating circuit 27 includes a capacitor C1, a series circuit 26 of which one end is connected to the connection point J1 and the gate terminal t _G of the semiconductor switching element Q2. The series circuit 26 includes a diode D1 whose cathode is connected to the connection point J1, and a first resistor R1 whose one end is connected in series with the anode of the diode D1. The other end of the first resistor R1 is connected to GND.

Off voltage applying unit 25 includes a capacitor C1 and includes a second resistor R2 connected between the semiconductor switching element Q2 gate terminal t _G and the first terminal t _{1 (source} terminal), the second differentiating circuit Constitute. At this time, one end of the second resistor R2 is connected to the connection point J1, and the other end is connected to the third voltage power source V3.

In the semiconductor switching element Q2, a third voltage power supply V3 that outputs a third constant voltage is connected to a first terminal t ₁ (source terminal).

In addition, a fourth resistor R4 is connected in series between GND and the light emitting element LD. The fourth resistor R4 is provided to adjust the magnitude of the current supplied to the light emitting element LD.

Note that the circuit configurations of the first differentiating circuit 27 and the second differentiating circuit (corresponding to the off-voltage applying unit 25) are not limited to the above-described configurations, and may be other configurations.

As described above, the light emitting device 21 including the gate driving circuit 22 and the gate driving circuit 22 according to the present embodiment is configured.

Hereinafter, the operation of the light emitting device 21 including the gate driving circuit 22 and the gate driving circuit 22 will be described with reference to FIG.

Figure 5 is a time chart showing the output signal of the on-voltage applying unit 3 in the gate drive circuit 22 according to the embodiment, and the voltage of the gate terminal t _G of the semiconductor switching element Q2 which is driven by the gate drive circuit 22 It is a time chart which shows. The upper time chart of FIG. 5 shows the output signal of the on-voltage application unit 3 of the gate drive circuit 22. Lower time chart in FIG. 5 shows a voltage applied to the gate terminal t _G of the semiconductor switching element Q2 which is driven by the gate drive circuit 22.

As illustrated in FIG. 5, the on-voltage applying unit 3 outputs a HIGH signal and a LOW signal to the on-voltage variable unit 24 based on the pulse signal output from the FPGA, as in the first embodiment. Pulse signal via a capacitor C1, is applied to the gate terminal t _G of the semiconductor switching element Q2.

Specifically, when the turn-on of the semiconductor switching elements Q2, at the beginning of the ON period _{T ON,} the output terminal 3a of the on-voltage applying unit 3 to the capacitor C1, the first constant voltage _{V 1} (e.g., -17 V) corresponding LOW signal is output. Accordingly, the ON voltage applied to the gate terminal _{t G} of the semiconductor switching element Q2, the first differentiating circuit 7 first on-voltage _{V ON1} (e.g., -17 V) to decrease rapidly. At this time, charges are accumulated in the capacitor C1. In addition, charges are also accumulated in the gate parasitic capacitance of the semiconductor switching element Q2.

Along with the decrease in the ON voltage, the voltage applied to the gate terminal t _G of the semiconductor switching element Q2, the threshold voltage (e.g., -3 V) when it becomes equal to or less than, the first terminal t ₁ and the second terminal t ₂ becomes conductive. Thereby, the first terminal _{t 1} current flows from the second terminal _{t 2} of the semiconductor switching element Q2. In this embodiment, as a source terminal t ₁ and the drain terminal t ₂ is the conductive state of the semiconductor switching element Q2, the drain current flows. Thereby, a current is supplied from the third voltage power supply V3 to the light emitting element LD via the fourth resistor R4, and the light emitting element LD emits light.

Then, on the voltage applied to the gate terminal _{t G} is the threshold voltage, the first on-voltage _{V ON1} (e.g., -17 V) to decrease rapidly. Thereafter, the ON voltage increases with the time constant of the first differentiating circuit 7. The ON voltage is a total value of a third constant voltage (for example, −5V) set in the third voltage power supply V3 and a voltage V _D1 (for example, −0.6V) generated across the diode D1. there second on-voltage _{V ON2} (e.g., -5.6V) is maintained at. Note that in the on-period T _ON, after the first on-voltage V _ON1 is applied, the voltage applied to the gate terminal t _G (corresponding to the waveform of the lower α region in FIG. 5) is convex upward It gradually increases with the slope of.

Second on-voltage _{V ON2} to the gate terminal _{t G} (e.g., -5.6V) even in a state where it is applied, the voltage applied to the gate terminal _{t G} is the threshold voltage (e.g., -3 V) is lower than. Therefore, the conduction state of the semiconductor switching element Q2 is maintained, and the light emitting element LD continues to emit light. Even in this state, charges are accumulated in the capacitor C1. Specifically, the capacitor C1 is charged with a first turn-on voltage _{V ON1} (e.g., -17 V) voltage difference between the second on-voltage _{V ON2} (e.g., -5.6V) (e.g., -11.4V) Is done.

On the other hand, when the semiconductor switching element Q2 is turned off, a LOW signal is output from the output terminal 3a of the on-voltage applying unit 3 to the capacitor C1 at the start of the off-period _TOFF . Accordingly, the voltage difference which has been charged in the capacitor C1 (e.g., -11.4V) corresponding charge is discharged, a reverse bias is applied to the gate terminal t _G of the semiconductor switching element Q2. The reverse bias charge is withdrawn from the parasitic capacitance between the gate terminal t _G and the first terminal t _{1 (source} terminal). Then, the voltage applied to the gate terminal _{t G} of the semiconductor switching element Q2, the first off-voltage _{V OFF1} (e.g., + 11.4 V) until suddenly increases.

At this time, the voltage applied to the gate terminal t _G is the threshold voltage (e.g., -3 V) at the time exceeds the semiconductor switching element Q2 is turned off. Thereby, the current to the light emitting element LD is stopped, and the light emitting element LD enters a non-light emitting state.

Then, the voltage applied to the gate terminal _{t G} may exceed the threshold voltage, the first off-voltage _{V OFF1} (e.g., + 11.4 V) until suddenly increases. Thereafter, the voltage decreases with the time constant of the off-voltage applying unit 5 (second differential circuit). Then, the voltage applied to the gate terminal _{t G} is maintained at the second turn-off voltage _{V OFF2} (e.g., 0V). Note that the voltage applied to the gate terminal t _G after the first off voltage V _OFF1 is applied in the off period T _OFF (corresponding to the waveform in the lower β region in FIG. 5) is convex downward. It gradually decreases with the slope of.

The gate terminal _{t G} second off voltage _{V OFF2} (e.g., 0V) even in a state where it is applied, the voltage applied to the gate terminal _{t G} is the threshold voltage (e.g., -3 V) is higher than. Therefore, the non-conducting state of the semiconductor switching element Q2 is maintained, and the light emitting element LD is maintained in the non-light emitting state.

The semiconductor switching element Q2 repeats a series of operations of an on period T _ON and an off period T _OFF . As a result, the switching operation of the light emitting element LD between light emission and non-light emission is repeatedly executed.

As described above, the gate drive circuit 22 and the light emitting device 21 including the gate drive circuit 22 operate.

And also in the light-emitting device 21 of this Embodiment, the effect similar to Embodiment 1 is acquired.

That is, the turn-on time and turn-off time of the semiconductor switching element Q2 can be shortened by the above operation.

(Embodiment 4)
Hereinafter, a circuit configuration of the light emitting device including the gate driving circuit and the gate driving circuit according to this embodiment will be described with reference to FIG.

FIG. 6 is a block diagram showing a configuration of the light emitting device 31 including the gate drive circuit 32 and the gate drive circuit 32 according to Embodiment 4 of the present invention.

In the present embodiment, the configuration of the on-voltage variable section 34 in the gate drive circuit 32 is different from that in the third embodiment. Other configurations are the same. Therefore, the same reference numerals are given to the same configurations in the fourth embodiment as those in the third embodiment, and the description thereof is omitted.

As shown in FIG. 6, the light emitting device 31 of the present embodiment includes a gate drive circuit 32, a light emitting element LD, a semiconductor switching element Q2, and the like.

Note that the semiconductor switching element Q2 is formed of a P-channel MOSFET as in the third embodiment. Therefore, the threshold voltage of the semiconductor switching element Q2 in the present embodiment is, for example, −3V.

The gate drive circuit 32 includes an on-voltage application unit 3, an on-voltage variable unit 34, an off-voltage application unit 35, and the like.

The first voltage power supply V1 of the gate drive circuit 32 is a constant voltage power supply that applies a predetermined voltage. The first voltage source V1 is the gate terminal t _G of the semiconductor switching elements Q2, applied lower than the threshold voltage, the first on-voltage. The first voltage source V1 of the embodiment, as the predetermined voltage, the first constant voltage _{V 1} (e.g., -17 V) to be applied to the gate terminal _{t G.}

The on-voltage variable unit 34 includes a capacitor C1, a first differentiation circuit 37, a Zener diode ZD, and the like. Capacitor C1, the output terminal 3a of the on-voltage applying unit 3 is connected between the gate terminal t _G of the semiconductor switching element Q2. The first differentiating circuit 37 includes a capacitor C1, a series circuit 36 having one end connected to a connection point J1 and the gate terminal t _G of the semiconductor switching element Q2. The series circuit 36 includes a diode D1 whose cathode is connected to the connection point J1, and a first resistor R1 whose one end is connected in series with the anode of the diode D1. The Zener diode ZD has an anode connected to the other end of the first resistor R1, and a cathode connected to the first terminal t ₁ (source terminal) of the semiconductor switching element Q2. Note that the Zener voltage value of the Zener diode ZD corresponds to the third constant voltage output from the third voltage power supply V3 of the third embodiment.

Off voltage applying unit 35 includes a capacitor C1, and includes a second resistor R2 connected between the semiconductor switching element Q2 gate terminal t _G and the first terminal t _{1 (source} terminal), the second differentiating circuit Constitute. At this time, one end of the second resistor R2 is connected to the connection point J1, and the other end is connected to the third voltage power source V3 and the cathode of the Zener diode ZD.

The semiconductor switching element Q2 has a first terminal t ₁ (source terminal) connected to the third voltage power supply V3. Thereby, the voltage of the first terminal t ₁ (source terminal) of the semiconductor switching element Q2 is fixed to the third voltage power supply V3.

The circuit configurations of the first differentiating circuit 37 and the second differentiating circuit (corresponding to the off-voltage applying unit 35) are not limited to the above-described configurations, and may be other configurations.

As described above, the gate drive circuit 32 and the light emitting device 31 including the gate drive circuit 32 according to the present embodiment are configured.

And the light-emitting device 31 provided with the said gate drive circuit 32 and the gate drive circuit 32 operate | moves similarly to Embodiment 3. FIG.

Also, in the light emitting device 31 of the present embodiment, the same effect as in the third embodiment can be obtained.

That is, the turn-on time and turn-off time of the semiconductor switching element Q2 can be shortened by the above operation.

It should be noted that the gate drive circuit of the present invention is not limited to the above-described embodiment, and it is needless to say that various changes can be made without departing from the gist of the present invention.

For example, in the above embodiment, the on-period T _ON, after the first on-voltage V _ON1 is applied, the voltage applied to the gate terminal t _G is a shape that gradually decreases convex slope downward Although described as an example, it is not limited to this. It may be a shape that gradually increases with a convex slope upward, or another shape.

In the above embodiment, the on-period T _ON, has been described in example of switching the voltage applied to the gate terminal t _G in the first on-voltage V _ON1 and second on-voltage V _ON2, not limited to this. For example, after applying the first on-voltage V _ON1 to the gate terminal t _G, the voltage may be continuously and gradually reduces the applied to the gate terminal t _G. In this case, the turn-off just before, the second on-voltage _{V ON2} applied to the gate terminal _{t G} is lower than the first ON voltage _{V ON1.} For this reason, the amount of charge accumulated in the gate parasitic capacitance is smaller than when the constant first on-voltage V _ON1 is continuously applied. Thereby, the turn-off time of the semiconductor switching element can be shortened.

Further, in the above embodiment, after the first off voltage V _OFF1 is applied in the off period T _OFF , the voltage applied to the gate terminal t _G gradually decreases with a convex slope upward. Although described as an example, it is not limited to this. For example, it may be a shape that gradually increases downward with a convex inclination or another shape.

In the above embodiment, in the OFF period _{T OFF,} but the voltage applied to the gate terminal _{t G} described switching example in the first OFF voltage _{V OFF1} and second off-voltage _{V OFF2,} not limited to this. For example, after applying the first off-voltage V _OFF1 to the gate terminal t _G, the voltage may be continuously gradually increased to be applied to the gate terminal t _G.

In this case, the turn-on immediately before the voltage applied to the gate terminal _{t G} is higher than the first OFF voltage _{V OFF1.} Therefore, if than continue to apply a constant first OFF voltage V _OFF1, the time until the voltage of the gate terminal t _G exceeds the threshold voltage is shortened. Thereby, the turn-on time of the semiconductor switching element can be further shortened.

Further, in the above-described embodiment, the ratio between the first ON voltage V _ON1 with a first reference terminal t ₁ and the second on-voltage V _ON2 is described more than two times as an example, not limited thereto. For example, the first on-voltage _{V ON1} ratio between the second on-voltage _{V ON2} is higher than the threshold voltage, and is higher than the second on-voltage _{V ON2,} may be less than 2 times. In this case, the turn-off just before the voltage applied to the gate terminal t _G is lower than the first ON voltage V _ON1. Therefore, the amount of charge accumulated in the gate parasitic capacitance is smaller than when the constant first on-voltage V _ON1 is continuously applied. Thereby, the turn-off time of the semiconductor switching element can be shortened.

In the above embodiment, the semiconductor switching elements Q1 and Q2 have been described as being configured using MOSFETs. However, semiconductor switching elements such as IGBTs (Insulated Gate Bipolar Transistors) may be used.

In the above embodiment, a laser diode having two terminals has been described as an example of the light emitting element LD, but is not limited thereto. For example, a laser diode having three terminals, an LED (Light Emitting Diode), an incandescent lamp, a fluorescent lamp, or the like may be used as the light emitting element LD.

In the above embodiment, the configuration in which the light-emitting device 1 is used as a flash for a TOF type distance image camera is described as an example. However, the present invention is not limited to this, and the light-emitting device 1 may be used as a lighting device, for example. Good. Specifically, the light-emitting device 1 can be used for a lighting device having a light control function for changing the brightness of emitted light.

As described above, according to the present invention, the first terminal, the second terminal connected to the higher potential side than the first terminal, and the voltage higher than the threshold voltage are applied. This is a gate driving circuit for driving an N-channel type semiconductor switching element having a gate terminal conducting between two terminals. The gate drive circuit includes an on-voltage applying unit that applies an on-voltage that is equal to or higher than a threshold voltage to a gate terminal, an on-voltage variable unit that changes an on-voltage applied by the on-voltage applying unit, and a gate terminal that is lower than the threshold voltage. And an off-voltage applying unit that applies to the gate terminal an off-voltage that draws charges from the parasitic capacitance between the gate terminal and the first terminal. The on-voltage variable unit applies, as an on-voltage, a first on-voltage that is equal to or higher than a threshold voltage at the start of the on-period of the semiconductor switching element, and at the end of the on-period, The ON voltage is changed and applied to the gate terminal of the semiconductor switching element so as to apply a second ON voltage that is lower than the ON voltage and equal to or higher than the threshold voltage.

According to this configuration, at the end of the ON period of the semiconductor switching element, the second ON voltage lower than the first ON voltage is applied to the gate terminal. Therefore, the amount of charge accumulated in the parasitic capacitance (hereinafter referred to as “gate parasitic capacitance”) between the gate terminal and the first terminal of the semiconductor switching element is such that a constant first on-voltage is obtained during the on-period. Compared to the case where the voltage is continuously applied. As a result, charges can be quickly extracted from the gate parasitic capacitance at the time of turn-off. As a result, the turn-off time of the semiconductor switching element can be shortened.

Furthermore, when the semiconductor switching element is turned on, a first on-voltage higher than the second on-voltage is applied to the gate terminal. Thereby, the turn-on time of the semiconductor switching element can be shortened.

In the gate drive circuit of the present invention, it is preferable that the ratio of the first on-voltage and the second on-voltage with reference to the first terminal is twice or more.

According to this configuration, when the semiconductor switching element is turned on, the first on-voltage more than twice the second on-voltage is applied to the gate terminal. Therefore, the time until the voltage at the gate terminal exceeds the threshold voltage is shortened. Thereby, the turn-on time when turning on the semiconductor switching element can be further shortened.

In the gate drive circuit of the present invention, the ON voltage variable unit has one end connected to the capacitor connected between the output terminal and the gate terminal of the ON voltage application unit, and the connection point between the capacitor and the gate terminal. And a first differentiating circuit that lowers the applied voltage from the first on voltage after applying the first on voltage to the gate terminal. Furthermore, the on-voltage variable unit includes a voltage power source that is connected to the other end of the series circuit and applies a predetermined voltage so that the second on-voltage is continuously applied to the gate terminal. The series circuit preferably includes a diode and a first resistor connected in series with the diode.

According to this configuration, the turn-on time and the turn-off time of the semiconductor switching element can be shortened while realizing the gate drive circuit with a simple circuit configuration.

In the gate drive circuit of the present invention, the ON voltage variable unit has one end connected to the capacitor connected between the output terminal and the gate terminal of the ON voltage application unit, and the connection point between the capacitor and the gate terminal. And a first differentiating circuit that lowers the applied voltage from the first on voltage after applying the first on voltage to the gate terminal. Further, the ON voltage variable unit has a predetermined voltage so that the anode is connected to the other end of the series circuit, the cathode is connected to the first terminal of the semiconductor switching element, and the second ON voltage is continuously applied to the gate terminal. A Zener diode is applied. The series circuit preferably includes a diode and a first resistor connected in series with the diode.

According to this configuration, the turn-on time and the turn-off time of the semiconductor switching element can be shortened while realizing the gate drive circuit with a simple circuit configuration.

In the gate driving circuit of the present invention, the off-voltage applying unit applies the first off-voltage lower than the threshold voltage at the start of the off-period of the semiconductor switching element as the off-voltage, and at the end of the off-period. Preferably, the off-voltage is applied to the gate terminal of the semiconductor switching element while applying a second off-voltage that is higher than the first off-voltage and lower than the threshold voltage.

According to this configuration, immediately before the semiconductor switching element is turned on, the second off voltage applied to the gate terminal is higher than the first off voltage. Therefore, when the semiconductor switching element is turned on, the time until the voltage of the gate terminal exceeds the threshold voltage is shortened. Thereby, the turn-on time of the semiconductor switching element can be further shortened.

In the gate drive circuit of the present invention, the off-voltage applying unit includes a capacitor and a second resistor connected between the gate terminal and the first terminal, and applies the first off-voltage to the gate terminal. Thereafter, it is preferable to include a second differentiating circuit that raises the applied voltage from the first off voltage and then applies a predetermined voltage so that the second off voltage is continuously applied to the gate terminal.

According to this configuration, the turn-on time and the turn-off time of the semiconductor switching element can be shortened while realizing the gate drive circuit with a simple circuit configuration.

The present invention also provides a first terminal, a second terminal connected to a lower potential side than the first terminal, and a gate that conducts between the first terminal and the second terminal by application of a voltage equal to or lower than a threshold voltage. This is a gate drive circuit for driving a P-channel type semiconductor switching element having a terminal. The gate driving circuit includes: an on-voltage applying unit that applies an on-voltage that is equal to or lower than a threshold voltage to a gate terminal; an on-voltage variable unit that changes an on-voltage applied by the on-voltage applying unit; An off-voltage applying unit that applies an off-voltage that draws charges from the parasitic capacitance between the terminal and the first terminal to the gate terminal is provided. The on-voltage variable unit applies, as an on-voltage, a first on-voltage that is equal to or lower than a threshold voltage at the start of the on-period of the semiconductor switching element, is higher than the first on-voltage at the end of the on-period, and The ON voltage is changed and applied to the gate terminal of the semiconductor switching element so as to apply the second ON voltage equal to or lower than the threshold voltage.

According to this configuration, the second on-voltage higher than the first on-voltage is applied to the gate terminal at the end of the on-period of the semiconductor switching element. For this reason, the amount of charge accumulated in the gate parasitic capacitance of the semiconductor switching element is smaller than that in the case where the constant first on-voltage is continuously applied in the on-period. As a result, charges can be quickly extracted from the gate parasitic capacitance at the time of turn-off. As a result, the turn-off time of the semiconductor switching element can be shortened.

Furthermore, when the semiconductor switching element is turned on, a first on-voltage higher than the second on-voltage is applied to the gate terminal. Thereby, the turn-on time of the semiconductor switching element can be shortened.

In the gate drive circuit of the present invention, it is preferable that the ratio between the first on-voltage and the second on-voltage with reference to the first terminal is twice or more.

According to this configuration, when the semiconductor switching element is turned on, the first on-voltage more than twice the second on-voltage is applied to the gate terminal. Therefore, the time until the voltage at the gate terminal exceeds the threshold voltage is shortened. Thereby, the turn-on time when turning on the semiconductor switching element can be further shortened.

In the gate drive circuit of the present invention, the ON voltage variable unit has one end connected to the capacitor connected between the output terminal and the gate terminal of the ON voltage application unit, and the connection point between the capacitor and the gate terminal. And a first differentiating circuit that raises the applied voltage from the first on-voltage after applying the first on-voltage to the gate terminal. Furthermore, the on-voltage variable unit includes a voltage power source that is connected to the other end of the series circuit and applies a predetermined voltage so that the second on-voltage is continuously applied to the gate terminal. The series circuit preferably includes a diode and a first resistor connected in series with the diode.

According to this configuration, the turn-on time and the turn-off time of the semiconductor switching element can be shortened while realizing the gate drive circuit with a simple circuit configuration.

In the gate drive circuit of the present invention, the ON voltage variable unit has one end connected to the capacitor connected between the output terminal and the gate terminal of the ON voltage application unit, and the connection point between the capacitor and the gate terminal. And a first differentiating circuit that raises the applied voltage from the first on-voltage after applying the first on-voltage to the gate terminal. Further, the ON voltage variable unit has a predetermined voltage so that the anode is connected to the other end of the series circuit, the cathode is connected to the first terminal of the semiconductor switching element, and the second ON voltage is continuously applied to the gate terminal. A Zener diode is applied. The series circuit preferably includes a diode and a first resistor connected in series with the diode.

According to this configuration, the turn-on time and the turn-off time of the semiconductor switching element can be shortened while realizing the gate drive circuit with a simple circuit configuration.

In the gate drive circuit of the present invention, the off-voltage applying unit applies a first off-voltage higher than the threshold voltage at the start of the off-period of the semiconductor switching element as the off-voltage, and at the end of the off-period. It is preferable that the off-voltage is changed and applied to the gate terminal of the semiconductor switching element so that the second off-voltage lower than the first off-voltage and higher than the threshold voltage is applied.

According to this configuration, immediately before the semiconductor switching element is turned on, the second off voltage applied to the gate terminal is lower than the first off voltage. Therefore, when the semiconductor switching element is turned on, the time until the voltage of the gate terminal exceeds the threshold voltage is shortened. Thereby, the turn-on time of the semiconductor switching element can be further shortened.

In the gate drive circuit of the present invention, the off-voltage applying unit includes a capacitor and a second resistor connected between the gate terminal and the first terminal, and applies the first off-voltage to the gate terminal. Thereafter, it is preferable to include a second differentiating circuit that raises the applied voltage from the first off voltage and then applies a predetermined voltage so that the second off voltage is continuously applied to the gate terminal. Here, “to increase the applied voltage from the first off voltage” means, for example, to increase the applied voltage from the first off voltage with reference to the GND voltage.

According to this configuration, the turn-on time and the turn-off time of the semiconductor switching element can be shortened while realizing the gate drive circuit with a simple circuit configuration.

The light-emitting device of the present invention includes a light-emitting element, a semiconductor switching element that switches between supply and stop of a current to the light-emitting element, and the gate drive circuit that drives the semiconductor switching element.

According to this configuration, a light emitting device with a short turn-on time and a short turn-off time can be realized by a gate drive circuit having a simple circuit configuration.

Further, at the end of the ON period of the semiconductor switching element, a second ON voltage lower than the first ON voltage is applied to the gate terminal. For this reason, the amount of charge accumulated in the gate parasitic capacitance of the semiconductor switching element is smaller than that in the case where the constant first on-voltage is continuously applied in the on-period. As a result, the turn-off time can be shortened by quickly extracting charges from the gate parasitic capacitance at the time of turn-off. As a result, it is possible to quickly switch between supply and stop of the current flowing through the light emitting element.

The gate drive circuit of the present invention can be adapted to drive a semiconductor switching element connected in series to a light emitting element for, for example, a TOF range image camera.

1,11,21,31 Light-emitting device 2,12,22,32 Gate drive circuit 3 On-voltage application unit (driver IC)
3a output terminal 4, 14, 24, 34 ON voltage variable section 5, 25, 35 OFF voltage application section 6, 26, 36 series circuit 7, 27, 37 first differentiation circuit Q1, Q2 semiconductor switching element t ₁ first terminal (Source terminal)
t ₂ Second terminal (drain terminal)
t _G gate terminal C1 capacitor D1 diode R1 first resistor R2 second resistor LD light emitting element ZD Zener diode J1 connection point

Claims (13)

A first terminal; a second terminal connected to a higher potential side than the first terminal; and a gate terminal that conducts between the first terminal and the second terminal when a voltage equal to or higher than a threshold voltage is applied. A gate driving circuit for driving an N-channel type semiconductor switching element,
The gate driving circuit includes:
An on-voltage applying unit that applies an on-voltage greater than or equal to the threshold voltage to the gate terminal;
An on-voltage variable unit that changes an on-voltage applied by the on-voltage applying unit;
An off-voltage applying unit that applies to the gate terminal an off-voltage that is lower than the threshold voltage and that extracts a charge from a parasitic capacitance between the gate terminal and the first terminal;
The on-voltage variable unit is configured as the on-voltage.
Applying a first on-voltage that is equal to or higher than the threshold voltage at the start of the on-period of the semiconductor switching element;
At the end of the ON period, a second ON voltage that is lower than the first ON voltage and equal to or higher than the threshold voltage is applied.
A gate drive circuit for applying the on-voltage to the gate terminal of the semiconductor switching element while changing the on-voltage; 2. The gate driving circuit according to claim 1, wherein a ratio of the first on-voltage to the second on-voltage with respect to the first terminal is twice or more. The on-voltage variable unit is
A capacitor connected between the output terminal of the on-voltage applying unit and the gate terminal; and a series circuit having one end connected to a connection point between the capacitor and the gate terminal; and A first differentiating circuit for lowering the applied voltage from the first on-voltage after applying the first on-voltage;
A voltage power source that is connected to the other end of the series circuit and applies a predetermined voltage so that the second on-voltage is continuously applied to the gate terminal;
The gate drive circuit according to claim 1, wherein the series circuit includes a diode and a first resistor connected in series with the diode. The on-voltage variable unit is
A capacitor connected between the output terminal of the on-voltage applying unit and the gate terminal; and a series circuit having one end connected to a connection point between the capacitor and the gate terminal; and A first differentiating circuit for lowering the applied voltage from the first on-voltage after applying the first on-voltage;
A Zener having a cathode connected to the other end of the series circuit, an anode connected to the first terminal of the semiconductor switching element, and a predetermined voltage applied to the gate terminal so that the second ON voltage is continuously applied A diode, and
The gate drive circuit according to claim 1, wherein the series circuit includes a diode and a first resistor connected in series with the diode. The off-voltage applying unit is configured as the off-voltage.
Applying a first off voltage lower than the threshold voltage at the start of the off period of the semiconductor switching element;
At the end of the off period, a second off voltage higher than the first off voltage and lower than the threshold voltage is applied.
The gate drive circuit according to claim 1, wherein the off-voltage is changed and applied to the gate terminal of the semiconductor switching element. The off-voltage applying unit is
The capacitor includes a second resistor connected between the gate terminal and the first terminal, and after applying the first off voltage to the gate terminal, the voltage to be applied is changed from the first off voltage. The gate drive circuit according to claim 5, further comprising: a second differentiation circuit that raises the voltage and then applies a predetermined voltage so that the second off-voltage is continuously applied to the gate terminal. A first terminal; a second terminal connected to a lower potential side than the first terminal; and a gate terminal that conducts between the first terminal and the second terminal when a voltage equal to or lower than a threshold voltage is applied. A gate driving circuit for driving a P-channel type semiconductor switching element,
The gate driving circuit includes:
An on-voltage applying unit that applies an on-voltage less than or equal to the threshold voltage to the gate terminal;
An on-voltage variable unit that changes an on-voltage applied by the on-voltage applying unit;
An off-voltage applying unit that applies an off-voltage that is higher than the threshold voltage and extracts a charge from a parasitic capacitance between the gate terminal and the first terminal to the gate terminal;
The on-voltage variable unit is configured as the on-voltage.
Applying a first on-voltage that is equal to or lower than the threshold voltage at the start of the on-period of the semiconductor switching element;
At the end of the ON period, a second ON voltage that is higher than the first ON voltage and lower than the threshold voltage is applied.
A gate drive circuit for applying the ON voltage while changing the ON voltage to the gate terminal of the semiconductor switching element. The gate drive circuit according to claim 7, wherein a ratio between the first on-voltage and the second on-voltage with respect to the first terminal is twice or more. The on-voltage variable unit is
A capacitor connected between the output terminal of the on-voltage applying unit and the gate terminal; and a series circuit having one end connected to a connection point between the capacitor and the gate terminal; and A first differentiating circuit for raising the applied voltage from the first on-voltage after applying the first on-voltage;
A voltage power source that is connected to the other end of the series circuit and applies a predetermined voltage so that the second on-voltage is continuously applied to the gate terminal;
The gate drive circuit according to claim 7, wherein the series circuit includes a diode and a first resistor connected in series with the diode. The on-voltage variable unit is
A capacitor connected between the output terminal of the on-voltage applying unit and the gate terminal; and a series circuit having one end connected to a connection point between the capacitor and the gate terminal; and A first differentiating circuit for raising the applied voltage from the first on-voltage after applying the first on-voltage;
A Zener having an anode connected to the other end of the series circuit, a cathode connected to the first terminal of the semiconductor switching element, and applying a predetermined voltage so that the second ON voltage is continuously applied to the gate terminal A diode, and
The gate drive circuit according to claim 7, wherein the series circuit includes a diode and a first resistor connected in series with the diode. The off-voltage applying unit is configured as the off-voltage.
Applying a first off voltage higher than the threshold voltage at the start of an off period of the semiconductor switching element;
At the end of the off period, a second off voltage lower than the first off voltage and higher than the threshold voltage is applied.
The gate drive circuit according to claim 7, wherein the off-voltage is changed and applied to the gate terminal of the semiconductor switching element. The off-voltage applying unit is
The capacitor includes a second resistor connected between the gate terminal and the first terminal, and after applying the first off voltage to the gate terminal, the voltage to be applied is changed from the first off voltage. The gate driving circuit according to claim 11, further comprising a second differentiating circuit that raises the voltage and then applies a predetermined voltage so that the second off-voltage is continuously applied to the gate terminal. A light emitting element;
A semiconductor switching element that switches between supply and stop of current to the light emitting element;
The gate driving circuit according to any one of claims 1 and 7, which drives the semiconductor switching element,
A light emitting device comprising:

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