WO2008083221A3 - Programming non-volatile memory with reduced program disturb by using different pre-charge enable voltages - Google Patents

Programming non-volatile memory with reduced program disturb by using different pre-charge enable voltages Download PDF

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Publication number
WO2008083221A3
WO2008083221A3 PCT/US2007/088947 US2007088947W WO2008083221A3 WO 2008083221 A3 WO2008083221 A3 WO 2008083221A3 US 2007088947 W US2007088947 W US 2007088947W WO 2008083221 A3 WO2008083221 A3 WO 2008083221A3
Authority
WO
WIPO (PCT)
Prior art keywords
program disturb
volatile memory
charge enable
different pre
unselected
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/US2007/088947
Other languages
French (fr)
Other versions
WO2008083221A2 (en
Inventor
Gerrit Jan Hemink
Yingda Dong
Jeffrey W Lutze
Dana Lee
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SanDisk Corp
Original Assignee
SanDisk Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US11/618,600 external-priority patent/US7450430B2/en
Priority claimed from US11/618,606 external-priority patent/US7463531B2/en
Application filed by SanDisk Corp filed Critical SanDisk Corp
Priority to KR1020097016023A priority Critical patent/KR101047577B1/en
Priority to CN2007800513231A priority patent/CN101627440B/en
Publication of WO2008083221A2 publication Critical patent/WO2008083221A2/en
Publication of WO2008083221A3 publication Critical patent/WO2008083221A3/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5628—Programming or writing circuits; Data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/08—Address circuits; Decoders; Word-line control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/30—Power supply circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3418—Disturbance prevention or evaluation; Refreshing of disturbed memory data
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1048—Data bus control circuits, e.g. precharging, presetting, equalising

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Read Only Memory (AREA)

Abstract

Unselected groups of non-volatile storage elements are boosted during programming to reduce or eliminate program disturb for targeted, but unselected memory cells connected to a selected word line. Prior to applying a program voltage to the selected word line and boosting the unselected groups, the unselected groups are pre-charged to further reduce or eliminate program disturb by providing a larger boosted potential for the unselected groups. During pre-charging, one or more pre-charge enable signals are provided at different voltages for particular non-volatile storage elements.
PCT/US2007/088947 2006-12-29 2007-12-27 Programming non-volatile memory with reduced program disturb by using different pre-charge enable voltages Ceased WO2008083221A2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
KR1020097016023A KR101047577B1 (en) 2006-12-29 2007-12-27 Nonvolatile Memory Programming with Reduced Program Disturbance by Using Different Precharge Enable Voltages
CN2007800513231A CN101627440B (en) 2006-12-29 2007-12-27 Programming non-volatile memory with reduced program disturb by using different pre-charge enable voltages

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US11/618,606 2006-12-29
US11/618,600 2006-12-29
US11/618,600 US7450430B2 (en) 2006-12-29 2006-12-29 Programming non-volatile memory with reduced program disturb by using different pre-charge enable voltages
US11/618,606 US7463531B2 (en) 2006-12-29 2006-12-29 Systems for programming non-volatile memory with reduced program disturb by using different pre-charge enable voltages

Publications (2)

Publication Number Publication Date
WO2008083221A2 WO2008083221A2 (en) 2008-07-10
WO2008083221A3 true WO2008083221A3 (en) 2008-10-16

Family

ID=39361491

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2007/088947 Ceased WO2008083221A2 (en) 2006-12-29 2007-12-27 Programming non-volatile memory with reduced program disturb by using different pre-charge enable voltages

Country Status (3)

Country Link
KR (1) KR101047577B1 (en)
TW (1) TWI357602B (en)
WO (1) WO2008083221A2 (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102181177B1 (en) 2016-07-29 2020-11-20 웨스턴 디지털 테크놀로지스, 인코포레이티드 Non-binary encoding for non-volatile memory
CN108962324B (en) 2017-05-24 2020-12-15 华邦电子股份有限公司 memory storage device
CN112582009B (en) * 2020-12-11 2022-06-21 武汉新芯集成电路制造有限公司 Monotonic counter and counting method thereof
US11972801B2 (en) 2022-02-07 2024-04-30 Sandisk Technologies, Llc Program voltage dependent program source levels
TWI855786B (en) * 2023-07-21 2024-09-11 旺宏電子股份有限公司 Memory device and pre-charge method

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19612666A1 (en) * 1995-03-31 1996-10-02 Samsung Electronics Co Ltd Non-volatile semiconductor memory, e.g. EEPROM with cells in NAND-structure
US20020126532A1 (en) * 2001-03-06 2002-09-12 Kabushiki Kaisha Toshiba Non-volatile semiconductor memory device
US20040080980A1 (en) * 2002-10-23 2004-04-29 Chang-Hyun Lee Methods of programming non-volatile semiconductor memory devices including coupling voltages and related devices
US20040174748A1 (en) * 2003-03-05 2004-09-09 Lutze Jeffrey W. Self boosting technique
US20050237829A1 (en) * 2004-04-15 2005-10-27 Kabushiki Kaisha Toshiba Non-volatile semiconductor memory device
WO2005104135A1 (en) * 2004-04-13 2005-11-03 Sandisk Corporation Programming inhibit for non-volatile memory based on trapped boosted channel potential
US20070171719A1 (en) * 2005-12-19 2007-07-26 Hemink Gerrit J Method for programming non-volatile memory with reduced program disturb using modified pass voltages

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19612666A1 (en) * 1995-03-31 1996-10-02 Samsung Electronics Co Ltd Non-volatile semiconductor memory, e.g. EEPROM with cells in NAND-structure
US20020126532A1 (en) * 2001-03-06 2002-09-12 Kabushiki Kaisha Toshiba Non-volatile semiconductor memory device
US20040080980A1 (en) * 2002-10-23 2004-04-29 Chang-Hyun Lee Methods of programming non-volatile semiconductor memory devices including coupling voltages and related devices
US20040174748A1 (en) * 2003-03-05 2004-09-09 Lutze Jeffrey W. Self boosting technique
WO2005104135A1 (en) * 2004-04-13 2005-11-03 Sandisk Corporation Programming inhibit for non-volatile memory based on trapped boosted channel potential
US20050237829A1 (en) * 2004-04-15 2005-10-27 Kabushiki Kaisha Toshiba Non-volatile semiconductor memory device
US20070171719A1 (en) * 2005-12-19 2007-07-26 Hemink Gerrit J Method for programming non-volatile memory with reduced program disturb using modified pass voltages

Also Published As

Publication number Publication date
WO2008083221A2 (en) 2008-07-10
TWI357602B (en) 2012-02-01
KR20090117712A (en) 2009-11-12
KR101047577B1 (en) 2011-07-08
TW200841341A (en) 2008-10-16

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