KR20100074521A - Method for fabricating of cmos image sensor - Google Patents

Abstract

The present invention relates to a method for manufacturing a CMOS image sensor that can improve the dark current characteristics,

According to the present invention, a method of manufacturing a CMOS image sensor includes sequentially forming a gate insulating film and a gate electrode in a predetermined region of an active region of a semiconductor substrate in which an active region and an isolation region are defined, and a photodiode region of the active region. Implanting a first impurity into the first impurity region to form a first conductivity type first impurity region, forming an insulating film on the sidewall of the gate electrode, and Si _1-x on the semiconductor substrate around the gate electrode forming a C _x epitaxial layer, implanting a second impurity into the photodiode regions of the active area is characterized in that it comprises a step of forming a second conductivity type second impurity region.

Description

Method for fabricating CMOS image sensor

The present invention relates to a CMOS image sensor, and more particularly to a method for manufacturing a CMOS image sensor that can improve the dark current characteristics.

In general, an image sensor is a semiconductor device that converts an optical image into an electrical signal, and is generally classified into a charge coupled device (CCD) and a CMOS image sensor. A charge coupled device (CCD) has a structure in which MOS capacitors are disposed adjacent to each other, and a charge carrier is stored in an arbitrary MOS capacitor and then transferred to a later MOS capacitor. . The charge coupling device has disadvantages such as a complicated driving method, a large power consumption, and a complicated manufacturing process due to many photoprocess steps. In addition, the charge coupling device has a disadvantage in that it is difficult to integrate a control circuit, a signal processing circuit, an analog-to-digital conversion circuit (A / D converter), and the like into a charge coupling device chip, which makes it difficult to miniaturize a product.

Recently, CMOS image sensors have attracted attention as next-generation image sensors to overcome the disadvantages of charge-coupled devices. The CMOS image sensor uses CMOS technology that uses a control circuit and a signal processing circuit as a peripheral circuit to form MOS transistors corresponding to the number of unit pixels on a semiconductor substrate, thereby outputting each unit pixel by the MOS transistors. It is a device that employs a switching method that detects sequentially. That is, the CMOS image sensor implements an image by sequentially detecting an electrical signal of each unit pixel by a switching method by forming a photodiode and a MOS transistor in the unit pixel. CMOS image sensor has advantages such as low power consumption, simple manufacturing process according to few photo process steps because of CMOS technology. In addition, since the CMOS image sensor can integrate a control circuit, a signal processing circuit, an analog / digital conversion circuit, and the like into the CMOS image sensor chip, the CMOS image sensor has an advantage of easy miniaturization. Therefore, the CMOS image sensor is currently widely used in various application parts such as a digital still camera, a digital video camera, and the like.

However, the general CMOS image sensor is easily extinguished due to the short lifetime of the electrons generated in the photodiode by light, and it takes a long time for the electrons generated deep inside the photodiode to reach the transfer gate and is difficult to reach. There is a problem that dark current occurs.

Accordingly, in order to solve the above problems, an object of the present invention is to provide a method for manufacturing a CMOS image sensor that can improve the dark current characteristics.

Technical problems to be achieved by the present invention are not limited to the technical problems mentioned above, and other technical problems not mentioned above may be clearly understood by those skilled in the art from the following description. There will be.

According to the present invention, a method of manufacturing a CMOS image sensor includes sequentially forming a gate insulating film and a gate electrode in a predetermined region of an active region of a semiconductor substrate in which an active region and an isolation region are defined, and a photodiode region of the active region. Implanting a first impurity into the first impurity region to form a first conductivity type first impurity region, forming an insulating film on the sidewall of the gate electrode, and Si _1-x on the semiconductor substrate around the gate electrode forming a C _x epitaxial layer, implanting a second impurity into the photodiode regions of the active area is characterized in that it comprises a step of forming a second conductivity type second impurity region.

As described above, in the method for manufacturing the CMOS image sensor according to the present invention, a transfer gate is formed by selectively growing a Si _1-x C _x epilayer having a shorter inter-grid distance than the substrate on the semiconductor substrate around the gate electrode. Tensile stress is applied to the lower channel region to increase the mobility of electrons, thereby preventing an afterimage of an image such as a lag.

In addition, since the n-type impurity is not included in the p-type impurity ion region of the photodiode, the net current may be more effectively prevented from disappearing at the surface, thereby improving the dark current.

Hereinafter, with reference to the accompanying drawings, preferred embodiments of the present invention that can specifically realize the above object will be described. At this time, the configuration and operation of the present invention shown in the drawings and described by it will be described by at least one embodiment, by which the technical spirit of the present invention and its core configuration and operation is not limited.

In addition, the terminology used in the present invention is a general term that is currently widely used as much as possible, but in certain cases, the term is arbitrarily selected by the applicant. In this case, since the meaning is described in detail in the description of the present invention, It is to be understood that the present invention is to be understood as the meaning of the term rather than the name.

Hereinafter, the technical objects and features of the present invention will be apparent from the description of the accompanying drawings and the embodiments.

Hereinafter, a method of manufacturing a CMOS image sensor according to an exemplary embodiment of the present invention will be described in detail with reference to the accompanying drawings.

1A to 1D are cross-sectional views illustrating a method of manufacturing the CMOS image sensor according to the present invention.

First, as shown in FIG. 1A, a semiconductor substrate 100 is prepared. Here, the semiconductor substrate 100 can use a high concentration of a first conductivity type, for example, a P + type single crystal silicon substrate. On the surface of the semiconductor substrate 100, for example, a surface for forming a device, a low-concentration first conductivity type, P-type epi layer (not shown) grown by an epitaxial process is grown. This is to increase the ability of the low voltage photodiode to collect photocharges and to improve the photosensitivity by forming large and deep depletion regions in the photodiode.

Thereafter, a pad oxide film (SiOx), a pad nitride film (SiN), and a pad TEOS film are sequentially formed on the semiconductor substrate 100, and RIE (a portion of the epi layer for the device isolation region is defined to define an active region for the transistor. The trench for the device isolation layer is formed by an STI process through reactive ion etching. In addition, an insulating film is formed on the entire surface of the semiconductor substrate 100 including the trench to fill the trench, and the insulating film 120 is formed in the device isolation region by planarizing the insulating film to remain only in the trench by a chemical mechanical polishing (CMP) process. Form.

Subsequently, the gate insulating film and the conductive layer are sequentially formed on the entire surface of the semiconductor substrate 100, and the gate insulating film and the conductive layer are selectively dry-etched to form the gate electrode 160 and the gate insulating film 140 of various transistors including the transfer transistor. Form.

Next, after the photoresist is applied to the entire surface of the semiconductor substrate 100, a photoresist pattern for exposing the photodiode region is formed by an exposure and development process. The photodiode n-type impurity region 180 is formed by ion implanting N-type impurity ions into the photodiode region using the formed photoresist pattern as an ion implantation mask.

Subsequently, an insulating film such as an oxide film 200 may be formed on the entire surface of the semiconductor substrate 100 including the gate electrode 160 to recover damage of the edge portion of the gate insulating layer 140 and to protect the surface of the semiconductor substrate 100 in a subsequent ion implantation process. ) To form a thickness of 20 ~ 100Å.

Thereafter, as shown in FIG. 1B, the insulating film 200 on the semiconductor substrate 100 is selectively removed through dry etching so as to leave only the insulating film 200 formed on the sidewall of the gate electrode 160.

Subsequently, as shown in FIG. 1C, the Si _1-x C _x epitaxial layer 220 having a thickness of 100 μm to 500 μm is selectively formed on the semiconductor substrate 100 around the gate electrode 160 except for the device isolation layer 120. Grow). At this time, Si stoichiometric ratio X in _1-x C _x preferably has a value of 0.2 to 0.5.

Next, as shown in FIG. 1D, after the photoresist is applied to the entire surface of the semiconductor substrate 100, a photoresist pattern 240 is formed to expose the photodiode region by an exposure and development process. The p-type impurity region 260 is formed by implanting impurity ions onto the surface of the photodiode region using the formed photoresist pattern 240 as an ion implantation mask. The p-type impurity region 260 plays a role for surface voltage pinning in the photodiode region.

Subsequently, a subsequent known process is performed to complete the CMOS image sensor.

As such, the Si _1-x C _x epi layer 220 is selectively grown on the semiconductor substrate 100 around the gate electrode 160 to have a potential in the channel region under the transfer gate. By applying a stress (Tensile Stress) to increase the mobility of the electrons to prevent the problem that the afterimage of the image, such as lag (Lag) is generated. In addition, since n-type impurities are not included in the p-type impurity ion region 260 of the photodiode, the net current may be more effectively prevented from disappearing at the surface, thereby improving dark current.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

1A to 1D are cross-sectional views illustrating a method of manufacturing a CMOS image sensor according to the present invention.

<Explanation of Signs of Major Parts of Drawings>

100: semiconductor substrate 120: device isolation film

140: gate insulating film 160: gate electrode

180: n-type impurity region 200: insulating film

220: Si _1-x C _x epi layer 240: photoresist pattern

260 p-type impurity region

Claims (5)

Sequentially forming a gate insulating film and a gate electrode in a predetermined region of an active region of a semiconductor substrate in which an active region and an isolation region are defined; Forming a first conductivity type first impurity region by ion implanting a first impurity into the photodiode region of the active region; Forming an insulating film on sidewalls of the gate electrode; Forming an Si _1-x C _x epitaxial layer on the semiconductor substrate around the gate electrode; And implanting a second impurity into the photodiode region of the active region to form a second conductivity type second impurity region. The method of claim 1, The method of the Si _1-x C _x stoichiometric ratio X of the Si _1-x C _x in said epitaxial layer, characterized in that having a value of 0.2 to 0.5 CMOS image sensor. The method of claim 1, And the first impurity is an n-type impurity and the second impurity is a p-type impurity. The method of claim 1, The insulating film formed on the side wall of the gate electrode is a manufacturing method of the CMOS image sensor, characterized in that formed to a thickness of 20 ~ 100Å. The method of claim 1, The Si _1-x C _x epitaxial layer is a manufacturing method of the CMOS image sensor, characterized in that formed in a thickness of 100 ~ 500Å.

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