KR102158510B1 - Light emitting diode integrated transition metal compound transistor and manufacturing for method thereof - Google Patents

Abstract

The present invention relates to a light emitting diode of a monolithic integrated structure capable of simultaneously fabricating a light emitting diode device and a transistor by forming a transition metal compound on a light emitting device through metal organic chemical vapor deposition (MOCVD). By forming in the device, there is an effect of providing a light emitting diode in which transistors are integrated without affecting the characteristics of the light emitting diode device.

Description

A light emitting diode integrated with a transition metal compound transistor and its manufacturing method {LIGHT EMITTING DIODE INTEGRATED TRANSITION METAL COMPOUND TRANSISTOR AND MANUFACTURING FOR METHOD THEREOF}

The present invention relates to a light emitting diode of a monolithic integration structure capable of simultaneously fabricating a light emitting diode device and a transistor by integrating a transition metal compound-based transistor together with a light emitting device.

In the case of a general micro LED display, the process of manufacturing a light emitting diode device on a sapphire or silicon (Si) wafer and a transistor on a separate wafer and then transfer to a backplane or a transistor on the backplane The manufacturing process is separated separately.

For this reason, as the process cost increases and the micro LED pixels become smaller, there is a problem in that it becomes difficult to align the transistor and the light emitting diode during mass transfer.

In addition, in order to improve this, in order to integrate the transistor into the light emitting diode, a gallium nitride HEMT (GaN High Electron Mobility Transistors) device (2Volume 35, Issue 3, March 2014, Article number 　6730671, Pages 330-332) or LTPS (Low Temperature Poly Silicon) There have been studies to integrate transistor devices into light emitting diodes.

However, in the case of a gallium nitride HEMT device, since it has to undergo a separate complex epitaxial growth, it is applied to some high power semiconductors that cannot use Si due to an increase in process cost, and low power for driving a display Not suitable for (low power) transistors.

In order to integrate the LTPS transistor on the light emitting diode device, it has to undergo a separate excimer laser annealing (ELA) process, which increases the process cost and has a disadvantage that the characteristics of the light emitting diode layer are easily affected.

It is an object of the present invention to provide a light emitting diode in which a transistor is integrated and a method of manufacturing the same, which reduces process cost and does not affect the characteristics of the light emitting diode layer.

In order to achieve the problem to be solved, the light emitting diode in which the transistor of the present invention is integrated includes a light emitting stacked structure based on gallium nitride (GaN); A first insulating layer formed on the light emitting stacked structure; And a transition metal compound transistor formed on the first insulating layer.

The transition metal compound transistor may include a transition metal compound active layer formed on the first insulating layer; A drain electrode formed on the transition metal compound active layer; A source electrode formed on the transition metal compound active layer to be spaced apart from the drain electrode; A second insulating layer formed on the transition metal compound active layer while applying the drain electrode and the source electrode; And a gate electrode formed on the second insulating layer.

The gallium nitride (GaN)-based light emitting stacked structure includes: a substrate; A first GaN layer formed on the substrate; A first electrode formed in a region on the first GaN layer; A light-emitting active layer formed in another region on the first GaN layer; A second GaN layer formed on the light-emitting active layer; It may include a second electrode layer formed in a region on the second GaN layer.

The transition metal compound active layer is molybdenum disulfide (MoS ₂ ), iselenide molybdenum (Molybdenum Diselenide, MoSe ₂ ), iselenide tungsten (Tungsten Diselenide, WSe ₂ ), and molybdenum iteluride (MoTe _2). ) And iselenide tin (Tin Diselenide, SnSe ₂ ). It may be composed of one or more materials selected from the group consisting of.

In addition, the method of manufacturing a light emitting diode in which the transistors of the present invention are integrated includes: (a) preparing a gallium nitride (GaN) stack structure in which a substrate, a first GaN layer, a light emitting active layer, and a second GaN layer are sequentially stacked; (b) forming a first insulating layer on the second GaN layer; (c) providing a semiconductor laminate structure in which a transition metal compound active layer is formed on the first insulating layer by using an MOCVD method; (d) Using mesa-etching, a partial region above the first GaN layer of the gallium nitride structure, a partial region above the second GaN layer, and a partial region above the first insulating layer are each externally formed by using mesa-etching. Etching to expose; (e) forming a first electrode and a second electrode on the exposed region of the first GaN layer and the exposed region of the second GaN layer, respectively, and a drain electrode and a source electrode are separated from each other on the transition metal compound active layer Forming to be; (f) forming a second insulating layer for coating the first electrode, the second electrode, the drain electrode, the source electrode, and an upper region of the semiconductor laminate structure; And (g) forming a gate electrode on the second insulating layer.

The transition metal compound active layer is molybdenum disulfide (MoS ₂ ), iselenide molybdenum (Molybdenum Diselenide, MoSe ₂ ), iselenide tungsten (Tungsten Diselenide, WSe ₂ ), and molybdenum iteluride (MoTe _2). ) And iselenide tin (Tin Diselenide, SnSe ₂ ). It may be composed of one or more materials selected from the group consisting of.

The transition metal compound active layer may be formed at 700°C or less.

According to one embodiment of the present invention, by forming a transition metal compound in a light emitting diode device, there is an effect of providing a light emitting diode in which transistors are integrated without affecting the characteristics of the light emitting diode device.

In addition, by integrating the transistor into the light emitting diode device, it is possible to transfer the transistor and the light emitting diode at once, thereby reducing process cost and facilitating alignment.

In addition, by being integrated vertically on the top of the light emitting diode device, the area occupied by the transistor can be reduced and a high ppi (pixels per inch) can be realized, and parasitic resistance generated when the light emitting diode device and the transistor wire are connected. And there is an effect of reducing the parasitic capacitance (parasitic capacitance).

In addition, since the transition metal compound according to the present invention has flexible and transparent properties, it is possible to apply it to a micro LED flexible display by peeling it from the substrate together with the light emitting diode layer.

1 is a block diagram of a light emitting diode according to an embodiment of the present invention.
2 is a flowchart illustrating a method of manufacturing a light emitting diode according to an embodiment of the present invention.
3A to 3G are diagrams illustrating a manufacturing process of a light emitting diode according to an embodiment of the present invention.
4 is a flowchart illustrating a method of manufacturing a light emitting diode according to an embodiment of the present invention.
5 illustrates an optical microscopy (OM) image of a light emitting diode according to an embodiment of the present invention.
6 shows a continuous driving image of a light emitting diode according to an embodiment of the present invention.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings and contents described in the accompanying drawings, but the present invention is not limited or limited by the embodiments.

The terms used in the present specification are for describing exemplary embodiments and are not intended to limit the present invention. In this specification, the singular form also includes the plural form unless specifically stated in the phrase. As used in the specification, "comprises" and/or "comprising" refers to the presence of one or more other components, steps, actions and/or elements, and/or elements, steps, actions and/or elements mentioned Or does not preclude additions.

As used herein, "embodiment", "example", "side", "example" and the like should be construed as having any aspect or design described better or advantageous than other aspects or designs. Is not.

The terms used in the description below have been selected as general and universal in the related technology field, but there may be other terms depending on the development and/or change of technology, customs, preferences of technicians, and the like. Therefore, terms used in the following description should not be understood as limiting the technical idea, but should be understood as exemplary terms for describing embodiments.

In addition, in certain cases, there are terms arbitrarily selected by the applicant, and in this case, detailed meanings will be described in the corresponding description. Therefore, terms used in the following description should be understood based on the meaning of the term and the contents throughout the specification, not just the name of the term.

Meanwhile, terms such as first and second may be used to describe various components, but the components are not limited by terms. The terms are used only for the purpose of distinguishing one component from another.

In addition, when a part such as a film, layer, region, configuration request, etc. is said to be "on" or "on" another part, not only is it directly above the other part, but also another film, layer, region, composition in between This includes cases where elements and the like are interposed.

Unless otherwise defined, all terms (including technical and scientific terms) used in the present specification may be used as meanings that can be commonly understood by those of ordinary skill in the art to which the present invention belongs. In addition, terms defined in commonly used dictionaries are not interpreted ideally or excessively unless explicitly defined specifically.

Meanwhile, in describing the present invention, when it is determined that a detailed description of a related known function or configuration may unnecessarily obscure the subject matter of the present invention, a detailed description thereof will be omitted. In addition, terms used in the present specification are terms used to properly express an embodiment of the present invention, which may vary depending on the intention of users or operators, or customs in the field to which the present invention belongs. Accordingly, definitions of these terms should be made based on the contents throughout the present specification.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

Referring to FIG. 1, the light emitting diode 100 in which the transistor of the present invention is integrated is a first light emitting stacked structure 110 based on gallium nitride (GaN) and a light emitting stacked structure 110 based on gallium nitride (GaN). The insulating layer 130 and the transition metal compound transistor 150 formed on the first insulating layer 130 are included.

The gallium nitride (GaN)-based light emitting stacked structure 110 includes a substrate 111, a first GaN layer 112 formed on the substrate 111, and a first GaN layer 112 formed on the first GaN layer 112. On the first electrode 113, the light emitting active layer 114 formed in other regions on the first GaN layer 112, the second GaN layer 115 and the second GaN layer 115 formed on the light emitting active layer 114 And a second electrode 116 formed in one region.

The substrate 111 may be a substrate of a material commonly used in the field of light emitting diodes, and may include sapphire, gallium nitride (GaN), gallium arsenide (GaAs), spinel, and silicon. It may be at least one of (Si; silicon), indium phosphide (InP), and silicon carbide (SiC), preferably a silicon (Si) or sapphire (Al ₂ O ₃ ) substrate. .

The first GaN layer 112 may be an n-type GaN semiconductor layer, and the first electrode 113 may be an n-type electrode. The first electrode 113 may make ohmit contact on the first GaN layer 112. Each of the first electrodes 113 may be Cr (5 nm)/Au (400 nm) electrodes.

Gallium nitride is used as a core material for various optical devices due to its excellent physical and chemical properties. Gallium nitride is used by growing on a growth substrate such as sapphire, silicon carbide or silicon.

In addition, each gallium atom of gallium nitride used as the n-type semiconductor layer is tetrahedral coordinated to four nitrogen atoms, and depending on the direction, Ga-polar n-type semiconductor layer characteristics and N-polar n-type semiconductor layer characteristics Can have

In order to grow gallium nitride, attention must be paid to the crystal quality. In particular, the crystal quality may be improved by utilizing epitaxial lateral overgrowth (ELOG).

In epitaxial lateral overgrowth (ELOG), gallium nitride may be grown in a vertical direction from a substrate as well as laterally grown on a masking pattern.

According to an embodiment, the first GaN layer is not gallium nitride (GaN), but aluminum gallium nitride (AlGaN), indium gallium nitride (InGaN), and aluminum indium gallium nitride (AlInGaN). ) May be a layer including at least one of.

A buffer layer may be formed between the substrate 111 and the first GaN layer 112, and the buffer layer may alleviate lattice mismatch between the substrate 111 and the first GaN layer 112, and , The buffer layer may be the upper surface of the semiconductor layer so that the first GaN layer 112 can be easily grown. The buffer layer may be made of a material capable of reducing a difference in lattice constant between the substrate 111 and the first GaN layer 112.

The buffer layer is zinc oxide (ZnO), aluminum nitride (AlN), indium nitride (InN), tantalum nitride (TaN), titanium nitride (TiN), hafnium nitride (HfN), titanium hafnium (HfTi), gallium nitride (GaN). , Aluminum gallium nitride (AlGaN), aluminum indium nitride (AlInN), indium aluminum gallium nitride (InAlGaN), which may be formed of one or more materials, and the lattice constant difference between the substrate 111 and the first GaN layer 112 It is not limited thereto as long as it is a material that can alleviate.

The light-emitting active layer 114 may have a structure in which a quantum well using a material having a small energy band gap and a quantum barrier using a material having a large energy band gap are alternately stacked at least once. . A quantum well may have a single quantum well structure or a multi-quantum well (MQW) structure.

In addition, indium gallium nitride (InGaN) may be used as the quantum well, and gallium nitride (GaN) may be used as the quantum barrier, but the present invention is not limited thereto.

According to an embodiment, the light-emitting active layer 114 may include indium gallium nitride (InGaN), aluminum gallium nitride (AlGaN), gallium nitride (GaN), and indium gallium nitride (AlInGaN) aluminum. Indium gallium nitride) may contain at least one of.

The second GaN layer 115 may be a p-type GaN semiconductor layer, and the second electrode 116 may be a p-type electrode. The second electrode 116 may make ohmit contact on the second GaN layer 115. Each of the second electrodes 116 may be Cr (5 nm)/Au (40 nm) electrodes.

Depending on the embodiment, the second GaN layer 115 is not gallium nitride (GaN) but aluminum gallium nitride (AlGaN), indium gallium nitride (InGaN), and aluminum indium gallium nitride (AlInGaN; aluminum). Indium gallium nitride) may be a layer containing at least one of.

The first insulating layer 130 may be formed on the second GaN layer 115 in a region where the second electrode 116 is not formed, and the thickness of the first insulating layer 130 is It can be the same as the thickness.

According to an embodiment, the first insulating layer 130 may include a silicon oxide film (SiO ₂ ), a silicon nitride film (SiNx), an aluminum oxide film (Al ₂ O ₃ ), a hafnium oxide film (HfO ₂ ), a magnesium oxide film (MgO), and a titanium oxide film ( TiO ₂ ), a tantalum oxide film (Ta ₂ O ₅ ), a gallium oxide film (Ga ₂ O ₃ ), and a zirconium oxide film (ZrO ₂ ) may be one or more selected from the group consisting of.

The transition metal compound transistor 150 includes an active layer 151 formed on the first insulating layer 130, a drain electrode 152 formed on the transition metal compound active layer 151, and a drain electrode on the active layer 151 ( A second insulating layer 154 and a second insulating layer formed on the transition metal compound active layer 151 while applying the source electrode 153, the drain electrode 152, and the source electrode 153 formed apart from 152 (154) It includes a gate electrode 155 formed on the top.

The transition metal compound active layer 151 may be formed of transition metal chalcogenides, and the transition metal chalcogen compound may be a single layer or multiple layers.

Compared with one-dimensional materials, two-dimensional materials are relatively easy to manufacture, and are suitable for use as materials for next-generation nanoelectronic devices. Among these 2D materials, 2D Transition Metal Dichalcogenides are Molybdenum Disulfide (MoS ₂ ), Molybdenum Diselenide (MoSe ₂ ), and iselenide tungsten (Tungsten Diselenide, WSe). ₂ ), it may be at least one of molybdenum (Molybdenum Ditelluride, MoTe ₂ ), and tin iselenide (Tin Diselenide, SnSe ₂ ).

The drain electrode 152 and the source electrode 153 may make ohmit contact on the active layer 151, and the source electrode 153 may be electrically connected to the second electrode 116.

The drain electrode 152 and the source electrode 153 may be made of any one of a metal and a transparent conductive material, and the metal may be any one of Au, Ti, Al, and Pd, but is not limited thereto. It is preferable if it is a metal material usable in the technical field to which the present invention belongs. In addition, the transparent conductive material may be at least one or more of amorphous oxide, crystalline oxide, grapheme, and organic polymer. Depending on the embodiment, the source electrode 153 and the drain electrode 152 may be made of a transparent conductive material, and the transparent conductive material may be indium zinc oxide (IZO), indium thin oxide (ITO), or graphene. In addition, the drain electrode 152 and the source electrode 153 may be formed of Cr (5 nm)/Au (40 nm).

The drain electrode 152 and the source electrode 153 may be formed on the transition metal compound active layer 151 to form a trench-type structure.

The second insulating layer 154 is a gate insulating layer, wherein the first GaN layer 112 region, the second electrode 116 and the transition metal compound active layer 151 are formed on the first electrode 113 and the first electrode 113. It may be formed to cover all of the regions of the first insulating layer 130 that are not formed, and a gate electrode region in which a gate electrode, which will be described later, may be seated may be provided. In addition, according to an embodiment, the thickness of the second insulating layer 154 may be 30 nm. In addition, it may be formed to correspond to the trench-type structure of the transition metal compound active layer 151 between the drain electrode 152 and the source electrode 153.

The second insulating layer 154 is a silicon oxide film (SiO ₂ ), a silicon nitride film (SiNx), an aluminum oxide film (Al ₂ O ₃ ), a hafnium oxide film (HfO ₂ ), a magnesium oxide film (MgO), a titanium oxide film (TiO ₂ ), It may be one or more selected from the group consisting of a tantalum oxide film (Ta ₂ O ₅ ), a gallium oxide film (Ga ₂ O ₃ ), and a zirconium oxide film (ZrO ₂ ).

The gate electrode 155 is in contact with the transition metal compound active layer 151 spaced apart from the drain electrode 152 and the source electrode 153, and the second insulating layer 154 is interposed between the transition metal compound active layer 151 and It is formed so that it may be formed to be seated in the trench-like structure in more detail. By forming the gate electrode 155, the transition metal compound transistor 150 formed on the nitride-based light emitting stacked structure 110 is manufactured.

The gate electrode 155 may be formed of Cr (5 nm)/Au (40 nm).

2 and 3A to 3G, the method of manufacturing the light emitting diode 200 in which the transistors of the present invention are integrated is a substrate 211, a first GaN layer 212, a light emitting active layer 214, and a second GaN. Preparing a gallium nitride structure in which the layers 215 are sequentially stacked (S110), forming the first insulating layer 230 on the second GaN layer 215 (S120), the first insulating layer 230 ) Providing a semiconductor laminate structure in which the transition metal compound active layer 251 is formed using a metal-organic chemical vapor deposition (MOCVD) method (S130), and the gallium nitride using mesa-etching Etching a partial region above the first GaN layer 212 of the structure, a partial region above the second GaN layer 215, and a partial region above the first insulating layer 230 to be exposed to the outside (S140), A first electrode 213 and a second electrode 216 are formed on the exposed area of the first GaN layer 212 and the exposed area of the second GaN layer 215, respectively, and a transition metal compound active layer 251 The step of forming the drain electrode 252 and the source electrode 253 to be spaced apart from each other (S150), the first electrode 213, the second electrode 216, the drain electrode 252, the source electrode 252, the Forming a second insulating layer 254 for coating an upper region of the semiconductor stacked structure (S160), and forming a gate electrode 255 on the second insulating layer 254 (S170).

Referring to FIG. 3A, step S110 includes depositing a first GaN layer 212 on a substrate 211 (S111), and depositing a light emitting active layer 214 on the first GaN layer 212 (S113). ), depositing a second GaN layer 215 on the light emitting active layer 214 (S115).

Step S110 may be performed by the MOCVD method, and is preferably performed at 1000° C. or higher.

The substrate 211 may be a substrate of a material commonly used in the field of light emitting diodes, and sapphire, gallium nitride (GaN), gallium arsenide (GaAs), spinel, and silicon. It may be at least one of (Si; silicon), indium phosphide (InP), and silicon carbide (SiC), preferably a silicon (Si) or sapphire (Al ₂ O ₃ ) substrate. .

The first GaN layer 212 may be an n-type semiconductor layer, and gallium nitride is used as a core material for various optical devices due to its excellent physical and chemical properties. Gallium nitride is used by growing by heterogeneous epitaxial on a growth substrate such as sapphire, silicon carbide or silicon.

In addition, each gallium atom of gallium nitride used as an n-type semiconductor layer is tetrahedral coordinated to four nitrogen atoms, and depending on the direction, Ga-polar n-type semiconductor layer characteristics and N-polar n-type semiconductor layer characteristics Can have

In order to grow gallium nitride, attention must be paid to the crystal quality. In particular, the crystal quality may be improved by utilizing epitaxial lateral overgrowth (ELOG).

In epitaxial lateral overgrowth (ELOG), gallium nitride may be grown in a vertical direction from a substrate and may be grown in a lateral direction over a masking pattern.

According to an embodiment, the first GaN layer is not gallium nitride (GaN), but aluminum gallium nitride (AlGaN), indium gallium nitride (InGaN), and aluminum indium gallium nitride (AlInGaN). ) May be a layer including at least one of.

The light-emitting active layer 214 may have a structure in which a quantum well using a material having a small energy band gap and a quantum barrier using a material having a large energy band gap are alternately stacked at least once. . A quantum well may have a single quantum well structure or a multi-quantum well (MQW) structure.

In addition, indium gallium nitride (InGaN) may be used as the quantum well, and gallium nitride (GaN) may be used as the quantum barrier, but the present invention is not limited thereto.

According to an embodiment, the light emitting active layer 214 may include indium gallium nitride (InGaN), aluminum gallium nitride (AlGaN), gallium nitride (GaN), and indium gallium nitride (AlInGaN) aluminum. Indium gallium nitride) may contain at least one of.

The second GaN layer 215 may be a p-type GaN semiconductor layer, and in some embodiments, the second GaN layer may include aluminum gallium nitride (AlGaN), indium gallium nitride (InGaN) instead of gallium nitride (GaN). Indium gallium nitride) and aluminum indium gallium nitride (AlInGaN; aluminum indium gallium nitride) may be a layer containing at least one of.

3B, in step S120, the first insulating layer 230 includes a silicon oxide film (SiO ₂ ), a silicon nitride film (SiNx), an aluminum oxide film (Al ₂ O ₃ ), a hafnium oxide film (HfO ₂ ), and a magnesium oxide film ( MgO), a titanium oxide film (TiO ₂ ), a tantalum oxide film (Ta ₂ O ₅ ), a gallium oxide film (Ga ₂ O ₃ ), and a zirconium oxide film (ZrO ₂ ) may be selected from the group consisting of one or more.

Referring to FIG. 3C, in step S130, the formation of the transition metal compound active layer 251 is preferably performed under conditions that do not affect the gallium nitride-based structure, and the formation of the transition metal compound active layer 251 is 700° C. It may be carried out below, and preferably carried out at 600° C. or lower. The transition metal compound may be formed in an atomic layer thickness using MOCVD, and the active layer may be formed to have a thin thickness within several nm without affecting the gallium nitride-based structure at 700°C.

The transition metal compound active layer 251 may be formed of transition metal chalcogenides, and the transition metal chalcogen compound may be a single layer or multiple layers.

Compared to one-dimensional materials, two-dimensional materials are relatively easy to manufacture and are suitable for use as materials for next-generation nanoelectronic devices. Among these 2D materials, 2D Transition Metal Dichalcogenides are Molybdenum Disulfide (MoS ₂ ), Molybdenum Diselenide (MoSe ₂ ), and iselenide tungsten (Tungsten Diselenide, WSe). ₂ ), it may be at least one of molybdenum (Molybdenum Ditelluride, MoTe ₂ ), and tin iselenide (Tin Diselenide, SnSe ₂ ).

Referring to FIG. 3D, in step S140, the transition metal compound active layer 251, the first insulating layer 230, the second GaN layer 215, and the light emitting active layer 214 are etched through mesa etching to form a first GaN layer. Some areas of (212) are exposed.

Thereafter, the transition metal compound active layer 251 and the first insulating layer 230 are etched to expose a partial region of the second GaN layer 215.

The order of the mesa etching may be changed, and a first electrode and a second electrode to be later may be formed in each of the exposed regions through the mesa etching, and the exposed areas other than the first electrode and the second electrode may be formed. The region may be applied by a second insulating layer to be described later.

3E, in step S150, the first electrode 213 may be an n-type electrode, the second electrode 216 may be a p-type electrode, and the first electrode 213 and the second electrode 216 are respectively It may be a Cr (5 nm)/Au (40 nm) electrode.

By forming the first electrode 213 and the second electrode 216, a gallium nitride (GaN)-based light emitting stacked structure 210 is formed, and is performed as a light emitting diode device.

In step S150. The drain electrode 252 and the source electrode 253 may be made of any one of a metal and a transparent conductive material, and the metal may be any one of Au, Ti, Al, and Pd, but is not limited thereto. It is preferable if it is a metal material usable in the technical field to which the present invention belongs. In addition, the transparent conductive material may be at least one or more of amorphous oxide, crystalline oxide, grapheme, and organic polymer. Depending on the embodiment, the drain electrode 252 and the source electrode 253 may be made of a transparent conductive material, and the transparent conductive material may be indium zinc oxide (IZO), indium thin oxide (ITO), or graphene. In addition, preferably, the drain electrode 252 and the source electrode 253 may be formed of Cr (5 nm)/Au (40 nm).

The drain electrode 252 and the source electrode 253 may be formed on the transition metal compound active layer 251 to form a trench-type structure.

The first electrode 213, the second electrode 214, the drain electrode 252, and the source electrode 253 may be formed by evaporation, respectively, and may be formed by thermal evaporation or electron beam evaporation (Evaporation). -beam Evaporation).

Referring to FIG. 3F, in step S160, the second insulating layer 254 is exposed to the exposed region of the first GaN layer 212 and the first insulating layer 230 due to mesa etching in step (d) S140. ) Is preferably formed to cover all of the exposed areas, and the transition metal compound active layer 251 between the drain electrode 252 and the source electrode 253 corresponds to the trench-type structure in step S160. The second insulating layer 254 may be formed as a gate insulating layer, and may provide a gate electrode region in which a gate electrode, which will be described later, may be seated.

In step S160, the second insulating layer 254 is a silicon oxide film (SiO ₂ ), a silicon nitride film (SiNx), an aluminum oxide film (Al ₂ O ₃ ), a hafnium oxide film (HfO ₂ ), a magnesium oxide film (MgO), a titanium oxide film ( TiO ₂ ), tantalum oxide film (Ta ₂ O ₅ ), gallium oxide film (Ga ₂ O ₃ ), and zirconium oxide film (ZrO ₂ ) may be selected from the group consisting of one or more, and the thickness of the second insulating layer 254 is 30 It can be formed in nm.

3G, in step S170, the gate electrode 255 is in contact with the transition metal compound active layer 251 between the drain electrode 252 and the source electrode 253, and the second insulating layer 254 It is formed between the transition metal compound active layer 251 and, more specifically, may be formed to be seated in the trench-type structure. By forming the gate electrode 255, the transition metal compound transistor 250 formed on the nitride-based light emitting stacked structure 210 is manufactured.

The gate electrode 255 may be formed of Cr (5 nm)/Au (40 nm).

Hereinafter, the present invention will be described in more detail through examples. These examples are for explaining the present invention more specifically, and the scope of the present invention is not limited by these examples.

Example. Light-emitting diode (LED) of monolithic integrated structure including transition metal compound transistor

Referring to FIG. 4, a silicon (Si) wafer is prepared as a substrate, and an n-GaN layer, an MQW (a metal organic chemical vapor deposition method) through MOCVD (metal organic chemical vapor deposition) at a temperature of 1000° C. or higher on the silicon wafer. InGaN/GaN) layer and p-GaN layer are sequentially deposited to form a light emitting diode semiconductor layer.

Thereafter, Al ₂ O ₃ was applied as an insulator on the p-GaN layer, and then Mo(CH) ₆ and (CH ₃ ) ₂ S were supplied on the Al ₂ O ₃ as raw materials, and MoS ₂ was less than 600°C. A transistor semiconductor active layer is formed by evaporation through MOCVD in an atmosphere of Ar and H ₂ , thereby fabricating a semiconductor laminate structure.

Thereafter, the MoS ₂ layer was etched by mesa etching to expose a part of the Al ₂ O ₃ insulating layer, and then the Al ₂ O ₃ layer, the p-type GaN layer, and the MQW layer were simultaneously etched to obtain n-type GaN. Exposing some areas of the layer.

forming an n-type n-type electrode (Cr 5nm / Au 40nm) on exposed regions of the GaN layer and by forming a p-type electrode (Cr 5nm / Au 40nm) on the p-GaN layer making the LED and in the MoS ₂ layer A drain electrode (Cr 5nm/Au 40nm) and a source electrode (Cr 5nm/Au 40nm) separated by a predetermined distance are formed.

Thereafter, an Al ₂ O ₃ layer was applied as a gate insulating layer to the entire area of the semiconductor laminate structure in which each electrode was formed to a thickness of 30 nm, and then the MoS ₂ layer, the drain electrode, and the gate trench where the source electrode were applied ( trench) structure on the Al ₂ O ₃ layer region by forming a gate electrode (Cr 5nm/Au 40nm) to manufacture a TFT integrated Micro-LED Chip from which a thin film transistor is integrated. Manufacture the display.

FIG. 5 is an optical microscopy image of a light emitting diode manufactured according to the above embodiment, and referring to the enlarged schematic diagram of a portion indicated by a dotted line in FIG. 5 (the left image of FIG. 5), an n-type electrode (N), It can be seen that the p-type electrode (P), the drain electrode (D), the source electrode (S), and the gate electrode (G) are deposited.

FIG. 6 is a continuous view of a driving image in which the light emitting diode manufactured according to the above embodiment is implemented as a 16 x 16 active matrix array, and'Y' and'O' from the left to the right of FIG. 6. It can be seen that'N','S','E', and'I' are clearly observed.

On the other hand, the embodiments of the present invention disclosed in the specification and drawings are only presented specific examples to aid understanding, and are not intended to limit the scope of the present invention. In addition to the embodiments disclosed herein, it is apparent to those of ordinary skill in the art that other modified examples based on the technical idea of the present invention may be implemented.

100, 200: light-emitting diode with integrated transistors
110, 210: gallium nitride (GaN)-based light emitting stacked structure
130, 230: first insulating layer
150, 250: transition metal compound transistor

Claims (7)

A light-emitting stacked structure based on gallium nitride (GaN);
A first insulating layer formed on the light emitting stacked structure; And
Including a transition metal compound transistor formed on the first insulating layer,
The transition metal compound transistor is
A transition metal compound active layer formed on the first insulating layer;
A drain electrode formed on the transition metal compound active layer;
A source electrode formed on the transition metal compound active layer to be spaced apart from the drain electrode;
A second insulating layer formed on the transition metal compound active layer while applying the drain electrode and the source electrode; And
A gate electrode formed on the second insulating layer;
A light emitting diode in which a transistor is integrated, comprising: a.
The method of claim 1,
The gallium nitride (GaN)-based light emitting stacked structure,
Board;
A first GaN layer formed on the substrate;
A first electrode formed in a region on the first GaN layer;
A light-emitting active layer formed in another region on the first GaN layer;
A second GaN layer formed on the light-emitting active layer; And
It characterized in that it comprises a second electrode layer formed in a region on the second GaN layer
Light-emitting diode with integrated transistors.
The method of claim 2,
Wherein the first insulating layer is formed on a region on the second GaN layer in which the second electrode is not formed.
The method of claim 1,
The transition metal compound active layer is molybdenum disulfide (MoS ₂ ), iselenide molybdenum (Molybdenum Diselenide, MoSe ₂ ), iselenide tungsten (Tungsten Diselenide, WSe ₂ ), and molybdenum iteluride (MoTe _2). ) And iselenide tin (Tin Diselenide, SnSe ₂ ). A light emitting diode incorporating a transistor, characterized in that it is composed of a material selected from the group consisting of.
(a) preparing a gallium nitride (GaN) stacked structure in which a substrate, a first GaN layer, a light emitting active layer, and a second GaN layer are sequentially stacked;
(b) forming a first insulating layer on the second GaN layer;
(c) providing a semiconductor laminate structure in which a transition metal compound active layer is formed on the first insulating layer by using an MOCVD method;
(d) A partial region above the first GaN layer of the gallium nitride stacked structure, a partial region above the second GaN layer, and a partial region above the first insulating layer are each externally formed by using mesa-etching. Etching to be exposed to;
(e) forming a first electrode and a second electrode on the exposed region of the first GaN layer and the exposed region of the second GaN layer, respectively, and a drain electrode and a source electrode are separated from each other on the transition metal compound active layer Forming to be;
(f) forming a second insulating layer for coating the first electrode, the second electrode, the drain electrode, the source electrode, and an upper region of the semiconductor laminate structure; And
(g) forming a gate electrode on the second insulating layer
Method of manufacturing a light emitting diode including a transistor integrated.
The method of claim 5,
The transition metal compound active layer is molybdenum disulfide (MoS ₂ ), iselenide molybdenum (Molybdenum Diselenide, MoSe ₂ ), iselenide tungsten (Tungsten Diselenide, WSe ₂ ), and molybdenum iteluride (MoTe _2). ) And iselenide tin (Tin Diselenide, SnSe ₂ ).
The method of claim 5,
The formation of the transition metal compound active layer is a method of manufacturing a light emitting diode integrated with a transistor, characterized in that performed at 700 ℃ or less.

Images