KR101292590B1 - Switching power supply unit and power supply system - Google Patents

Abstract

(assignment)
The present invention provides a switching power supply and a power supply system which can stably operate even when an output capacitor with a small ESR is used by suppressing the ripple of an input voltage and have good load regulation characteristics.
(Solution)
A high side MOSFET 11 connected to an input voltage Vin, a ramp generator 18 for generating a ramp signal synchronized with the switching frequency of the high side MOSFET 11, a reference signal and a high side MOSFET 11; A phase voltage conversion circuit 24 which detects a phase difference with the driving signal to be driven and generates an on-width control signal based on the detected phase difference, a ramp signal, a feedback signal FB, and a first reference voltage REF And a first feedback control circuit 1 for controlling the on-time of the high-side MOSFET 11 on the basis of the on-width control signal and for controlling the on-width of the high-side MOSFET 11 on the basis of the on-width control signal.

Description

Switching Power Supply and Power System {SWITCHING POWER SUPPLY UNIT AND POWER SUPPLY SYSTEM}

The present invention relates to a switching power supply and a power supply system for supplying a DC stabilization voltage.

DC / DC converters that supply power voltages for digital signal processing LSIs, such as image engines or CPUs, are required to have high load response performance that greatly suppresses the fluctuation range of the output voltage against a dynamically changing digital load. However, a DC-DC converter equipped with an error amplifier in order to compare the output voltage and the reference voltage has a problem in that the error amplifier is a main cause of the delay element and the load response performance deteriorates. Here, a ripple converter of PFM (frequency modulation) control that improves load response performance for the demand of digital load by not mounting an error amplifier, which is a main cause of delay elements, has been proposed and widely used. have.

Since the classical PFM ripple converter detects and controls the ripple voltage of the output voltage, the output capacitor requires an electrolytic capacitor with a large equivalent series resistance (ESR) in order to obtain a sufficient ripple signal. It hindered the miniaturization of the.

Recently, a ceramic capacitor with a small ESR is used as an output capacitor by superimposing a Ramp signal assuming ripple due to ESR on the feedback voltage or the reference voltage side, as Patent Documents 1 and 2, which are shown as examples of the prior art. Many products that can operate stably have been proposed and commercialized.

FIG. 13 is a circuit diagram showing the configuration of a conventional switching power supply device including the contents described in Patent Documents 1 and 2. FIG. 14 is a timing chart showing the operation of the conventional switching power supply. Referring to these drawings, the operation of a switching power supply device employing a general on-width fixed ripple control method will be described. In addition, Patent Documents 1 and 2 disclose a method of superimposing a Ramp signal on a feedback signal, but this method is operatively equivalent to the method of superimposing a Ramp signal on a reference voltage. The signal will be described in such a manner as to overlap the reference voltage.

In Fig. 13, the Ramp generator 18 generates a Ramp signal assuming the ripple signal of the ESR and outputs it to the superimposed circuit 3. The superimposition circuit 3 generates a second reference voltage REF2 in which a ramp signal having a positive slope with respect to the first reference voltage REF is superimposed to generate a positive input of the feedback comparator 4. To the output.

On the other hand, the feedback voltage FB is output to the negative input of the feedback comparator 4. The feedback voltage FB is a voltage obtained by dividing the output voltage Vout by the feedback voltage dividers 16 and 17. When the feedback voltage FB is less than the second reference voltage REF2, the feedback comparator 4 immediately outputs the FB_TRG signal to the one shot circuit 5a.

The one-shot circuit 5a receives the FB_TRG signal output by the feedback comparator 4, generates an ON_TRG signal having a constant time width, and outputs it to the Set terminal of the on timer 7b.

On the other hand, the feed forward circuit 6b detects the input voltage Vin and the output voltage Vout to maintain a constant switching frequency even if the setting of the input voltage Vin or the output voltage Vout is changed. The feed forward signal Iton, which is proportional to Vin and inversely proportional to Vout, is generated and output to the Adj terminal of the on timer 7b.

The on timer 7b triggers the ON_TRG signal output by the one-shot circuit 5a as a trigger, and outputs a Ton signal corresponding to the feedforward signal Iton to the drive logic 8. As the feedforward signal Iton increases, the time width of the Ton signal decreases.

The drive logic 8 includes a drive signal Ho and a low side driver 10 of the high side driver 9 based on the Ton signal output by the on timer 7b. The drive signal (Lon) is outputted, and when the regenerative period ends, the polarity of the current (IL) flowing through the inductor 13 is inverted by the SW signal to detect the drive signal (Lon) from High to Low. By switching, the low side MOSFET 12 is turned off to prevent excessive backflow of the inductor current IL to prevent unnecessary loss.

The high side driver 9 drives the gate of the high side MOSFET 11 based on the Hon signal output by the drive logic 8 to output the capacitor 14 and the output load 15 through the inductor 13. To supply energy.

The low side driver 10 drives the gate of the low side MOSFET 12 based on the Lon signal outputted by the drive logic 8, so that the low side driver 10 of the inductor current IL after the high side MOSFET 11 is turned off. The conduction loss is reduced by turning on the low side MOSFET 12 during the regenerative period.

As described above, in the conventional switching power supply shown in Fig. 13, the output load current Iout suddenly changes from the light load to the heavy load by the series of operations described above, so that the output voltage Vout is reduced. When the high side MOSFET is turned on immediately, high load response can be realized and ceramic capacitors of the output capacitor, which were not possible in the classical ripple control method, can be realized.

U.S. Patent No. 6583610 Japanese Patent Laid-Open No. 2008-728912

However, the method in which the ramp signal of constant inclination as shown in Patent Documents 1 and 2 is superimposed on the feedback voltage FB or the reference voltage REF is changed when the output load current Iout is changed and the switching frequency is changed. As the amplitude of the signal changes, the output voltage (Vout) also fluctuates, resulting in a deterioration of the load regulation, which is an important characteristic of the DC / DC converter. Specifically, description will be made using the timing chart shown in FIG.

When the output load current Iout suddenly changes from the heavy load to the light load, the output voltage Vout jumps instantaneously. After that, as time elapses, the output voltage Vout decreases and the one-shot circuit 5a when the feedback signal FB falls below the peak potential of the second reference voltage REF2 in which the Ramp signals are overlapped. ) Outputs an on trigger signal ON_TRG. As a result, the high side MOSFET 11 is turned on, but as the output load current Iout decreases, the on timing of the high side MOSFET 11 is delayed. That is, the smaller the output load current Iout, the lower the switching frequency of the high side MOSFET 11.

When the switching frequency is lowered, the amplitude of the Ramp signal overlapping the first reference voltage REF is relatively increased, so that the second reference voltage REF2 is larger than the heavy load. This results in worse load regulation. As shown in Fig. 14, the output voltage Vout drops sharply even when it changes from light load to heavy load, and does not recover thereafter. Therefore, it can be said that the load voltage has a large voltage difference at light load and heavy load. It is hard to say that the regulation characteristics are good.

In order to improve load regulation, it is necessary to reduce the amount of ramp amplitude superimposed on the second reference voltage REF2. However, in this case, the switching power supply in this case uses a low ESR capacitor such as a ceramic capacitor as an output capacitor. The problem that operation becomes unstable reappears.

In addition, a plurality of different digital signal processing LSIs are usually mounted on one control board, and it is necessary to supply an appropriate power supply voltage for each LSI. It is common to generate voltages such as 3.3V, 1.8V and 1.05V using a DC / DC converter.

At this time, if the peak value of the inductor current of each DC-DC converter overlaps, the peak value of the comprehensive input current becomes too large, and the input voltage of 12V is greatly dropped, except for the assumed, and in the worst case, malfunction occurs. There is a problem that comes early. In addition, when an electrolytic capacitor is used for the input capacitor, a ripple current exceeding the allowable range causes heat generation, which shortens the lifespan of the power supply system.

SUMMARY OF THE INVENTION The present invention solves the problems of the prior art described above, and suppresses the ripple of the input voltage and enables stable operation even when an output capacitor having a small ESR is used, and a switching power supply and a power system having good load regulation characteristics. The task is to provide.

In order to solve the above problems, a switching power supply according to the present invention includes a high side switch connected to an input voltage and a ramp signal synchronized with the switching frequency of the high side switch. An on-width control for detecting a phase difference between a ramp signal generation unit for generating a signal and a drive signal for driving the high side switch, and generating an on-width control signal based on the detected phase difference. On-time timing of the high side switch is controlled based on a signal generator and a ramp signal generated by the ramp signal generator, a feedback signal having a magnitude corresponding to an output voltage, and a first reference voltage. In addition, on the basis of the on-width control signal generated by the on-width control signal generator, It is characterized by including a control unit for controlling the on-width of the switch.

A power supply system according to the present invention includes a reference switching power supply including a high side switch connected to the input voltage, and any one of claims 1 to 9. The on-width control signal generation unit provided with each of the above-mentioned switching power supply devices, and provided by each of the at least one switching power supply device, is any one of the reference switching power supply device and the one or more switching power supply devices except for its own switching power supply device. A drive signal for driving the high side switch included in the power supply device is used as the reference signal.

According to the present invention, it is possible to provide a stable switching power supply and a power supply system having stable load regulation and stable operation even when an output capacitor having a small ESR is used by suppressing ripple of an input voltage.

Fig. 1 is a circuit diagram showing the configuration of a switching power supply device of the first embodiment of the present invention.
Fig. 2 is a circuit diagram showing the detailed configuration of the lamp generator in the switching power supply of the embodiment 1 of the present invention.
Fig. 3 is a circuit diagram showing a detailed configuration of an overlapping circuit in the switching power supply device of the first embodiment of the present invention.
Fig. 4 is a circuit diagram showing a detailed configuration of a sample hold circuit in the switching power supply device of the first embodiment of the present invention.
Fig. 5 is a circuit diagram showing a detailed configuration of a feed forward circuit in the switching power supply device of the first embodiment of the present invention.
Fig. 6 is a circuit diagram showing the detailed configuration of the on timer in the switching power supply device of the first embodiment of the present invention.
FIG. 7 is a circuit diagram showing a configuration in the case where it is assumed that there is no phase voltage conversion circuit in the switching power supply device of the first embodiment of the present invention.
Fig. 8 is a timing chart showing the operation of the first converter in the case of assuming that no phase voltage converting circuit exists in the switching power supply of the embodiment 1 of the present invention.
FIG. 9 is a timing chart showing an operation in the case where it is assumed that there is no phase voltage conversion circuit in the switching power supply of the embodiment 1 of the present invention.
Fig. 10 is a circuit diagram showing the detailed configuration of a phase voltage converting circuit in the switching power supply of the embodiment 1 of the present invention.
Fig. 11 is a timing chart showing the operation of the switching power supply device of the embodiment 1 of the present invention.
Fig. 12 is a circuit diagram showing a configuration of a modification of the switching power supply device of the first embodiment of the present invention.
Fig. 13 is a circuit diagram showing the configuration of a conventional switching power supply.
14 is a timing chart showing the operation of the conventional switching power supply.

EMBODIMENT OF THE INVENTION Hereinafter, embodiment of the switching power supply apparatus and power supply system of this invention is described in detail based on drawing.

(Example 1)

EMBODIMENT OF THE INVENTION Hereinafter, embodiment of this invention is described, referring drawings. First, the configuration of this embodiment will be described. 1 is a circuit diagram showing the configuration of a switching power supply device and a power supply system according to Embodiment 1 of the present invention. In Fig. 1, the same or equivalent components as those in the conventional apparatus in Fig. 13 are denoted by the same reference numerals as those described above, and redundant descriptions are omitted.

As shown in Fig. 1, this power supply system is composed of a phase voltage conversion circuit 24, a first converter 26a and a second converter 26b. However, the switching power supply apparatus according to the present invention can be realized with the configuration of the phase voltage converting circuit 24 and the first converter 26a. In addition, it is assumed that the control circuit 25 in the first converter 26a and the control circuit 25 in the second converter 26b have the same configuration.

The first converter 26a includes a control circuit 25, a high side MOSFET 11, a low side MOSFET 12, an inductor 13, and an output smoothing capacitor It consists of an output condenser 14, an output load 15, a feedback resistor 16, and a feedback resistor 17. As shown in FIG. The control circuit 25 also includes a first feedback control circuit 1, a second feedback control circuit 2, and an overlapping circuit 3. It is composed.

Meanwhile, the second converter 26b includes the control circuit 25, the high side MOSFET 26, the low side MOSFET 27, the inductor 28, the output smoothing capacitor 29, the output load 30, and the feedback resistor ( 39) and a feedback resistor 40, corresponding to the reference switching power supply of the present invention. The high side MOSFET 26 is a high side switch connected to the input voltage Vin. Since the first and second converters 26a and 26b have basically the same circuit configuration, the first converter 26a will be mainly described.

The first feedback control circuit 1 includes a feedback back comparator 4, a one shot circuit 5, a feed forward circuit 6, and an on timer. (7), drive logic (8), high side driver (9) and low side driver (10).

In addition, the second feedback control circuit 2 includes a ramp generator 18, a sample hold circuit 19, an error amplifier 20, and a phase compensation resistor. ) 21 and the phase compensation capacitor 22.

In other words, the first converter 26a in the switching power supply of the present embodiment differs from the conventional switching power supply shown in Fig. 13 in that the second feedback control circuit 2 is provided.

The high side MOSFET 11 corresponds to the high side switch of the present invention, and the drain terminal is connected to the input voltage Vin. The source terminal of the high side MOSFET 11 is connected to the drain terminal of the low side MOSFET 12 and is connected to the output load 15 through the inductor 13. That is, the first converter 26a in the switching power supply of the present embodiment converts the input voltage Vin into a predetermined voltage by the switching operation of the high side MOSFET 11 and the low side MOSFET 12 to output a load. Supply to (15). Similarly, the second converter 26b also converts the input voltage Vin into a predetermined voltage and supplies it to the output load 30 by the switching operation of the high side MOSFET 26 and the low side MOSFET 27.

The first feedback control circuit 1, which is a major loop, has an error with respect to a load that changes dynamically, such as when the output load 15 suddenly changes from a light load to a heavy load. By operating at high speed without going through the amplifier, it functions to minimize the variation of the output voltage (Vout).

In contrast, the second feedback control circuit 2, which is a minor loop, detects the amplitude of the ramp signal generated by the ramp generator 18, and the amplitude is constant without depending on the output load current Iout. The switching frequency Fsw is kept constant by optimally controlling the on-width of the high side MOSFET 11 so as to be controlled. As a result, since the peak voltage of the second reference voltage REF2 is always kept constant for static load fluctuations, the load regulation characteristic, which has been a problem of the prior art, can be significantly reduced without sacrificing control stability. It can be improved.

The phase voltage converting circuit 24 corresponds to the on-width control signal generator of the present invention, and includes a reference signal (HDRVb in FIG. 1 in this embodiment) and a high side MOSFET 11. The phase difference with the driving signal HDRV for driving is detected and a warm width control signal is generated based on the detected phase difference. That is, the phase voltage converting circuit 24 generates a control voltage according to the phase difference between the switching timings of the two converters of the first converter 26a and the second converter 26b, and as a warm width control signal, Output to Comp terminal. The detailed configuration and operation of the phase voltage converting circuit 24 will be described later.

The ramp generator 18 corresponds to the ramp signal generation section of the present invention and generates a ramp signal Ramp synchronized with the switching frequency of the high side MOSFET 11. Fig. 2 is a circuit diagram showing the detailed configuration of the lamp generator 18 in the switching power supply of this embodiment. The lamp generator 18 has a one-shot circuit 181, an inverter 182, a Pch MOSFET 183, a capacitor 184, a constant current source I1, and a lower limit clamp voltage as shown in FIG. It consists of a lower clamp clamp (V2).

The one-shot circuit 181 receives the drive signal Hon output by the high side driver 9, and when the Hon is switched to High, the Pch MOSFET 183 is very much, for example, about 100 ns through the inverter 182. Only turn on for a short period. Accordingly, the capacitor 184 is charged in a very short time up to the power supply voltage REG.

After that, when the Pch MOSFET 183 is turned off, the charge accumulated in the capacitor 184 gradually escapes by the constant current source I1. As a result, the ramp generator 18 can generate a ramp signal assuming the ripple signal of the ESR, and outputs the generated ramp signal to the superimposition circuit 3 and the sample hold circuit 19.

The superimposition circuit 3 generates a second ramp signal having a positive slope corresponding to the amplitude and frequency of the ramp signal (Ramp in FIG. 1) generated by the ramp generator 18; Further, the generated second lamp signal is superimposed on the first reference voltage (REF: 0.5V in FIG. 1) to generate an overlap signal (REF2 in FIG. 1).

Fig. 3 is a circuit diagram showing the detailed configuration of the superimposition circuit 3 in the switching power supply of this embodiment. The superimposed circuit 3 includes the NPN transistor 31, the PNP transistor 32, the resistor 33, the Nch MOSFETs 34 and 35, the Pch MOSFETs 36 and 37, the resistor 38, and the constant current source I2. It consists of.

The ramp signal generated by the ramp generator 18 is impedance-converted by the buffer circuits of the NPN transistor 31 and the PNP transistor 32, so that the emitter of the PNP transistor 32 has a voltage level approximately equal to the ramp signal. Ramp2 signal is output. For this reason, the potential difference of REG-Ramp2 is generated in the both ends of the resistor 33, and the current signal I3 according to the change of a ramp signal is produced | generated. The current signal I3 is converted into a voltage by being output to the resistor 38 through the current mirror circuits by the Nch MOSFETs 34 and 35 and the current mirror circuits by the Pch MOSFETs 36 and 37. do.

Accordingly, the superimposition circuit 3 superimposes a second lamp signal having a positive slope corresponding to the ramp with respect to the first reference voltage REF, which is a direct current stable voltage, at the high potential side terminal of the resistor 38. The second reference voltage REF2 (corresponding to the overlapping signal of the present invention) is generated and output to the non-inverting input terminal of the feedback comparator 4.

The sample hold circuit 19, the error amplifier 20, the phase compensation resistor 21, and the phase compensation capacitor 22 provided in the second feedback control circuit 2 are the amplitude signal generating unit of the present invention. ) And an amplitude signal (Comp in FIG. 1) corresponding to the amplitude of the ramp signal generated by the ramp generator 18 is generated.

The sample hold circuit 19 maintains a valley voltage of the ramp signal generated by the ramp generator 18. Fig. 4 is a circuit diagram showing the detailed configuration of the sample hold circuit 19 in the switching power supply of this embodiment. The sample hold circuit 19 is composed of a buffer circuit 191, a switch 192 and a capacitor 193 as shown in FIG.

The buffer circuit 191 outputs an impedance-converted signal of the ramp signal and switches 192 on the basis of the sampling signal Spl by the on timer 7 in accordance with the timing at which the ramp signal becomes the valley voltage. The capacitor 193 is charged by turning on a constant sampling time. For this reason, the capacitor | condenser 193 maintains the valley voltage Valley value of a ramp signal until the next sampling period.

The error amplifier 20 corresponds to the error amplifier of the present invention, and compares the valley voltage Valley and the second reference voltage (V1 in FIG. 1) held by the sample hold circuit 19. Then, an error amplification signal is generated according to the comparison result and output as an amplitude signal (Comp). That is, the error amplifier 20 compares the valley voltage Valley and the reference voltage V1, and feeds the error amplifier signal (amplitude signal Comp) phase compensated by the resistor 21 and the capacitor 22 to the feed forward circuit. Output to (6).

The first feedback control circuit 1 corresponds to the control section of the present invention, and has a feedback signal FB and a first magnitude corresponding to the ramp signal generated by the ramp generator 18 and the output voltage Vout. The on-time timing of the high-side MOSFET 11 is controlled based on the reference voltage REF, and the on-width of the high-side MOSFET 11 is controlled based on the on-width control signal generated by the phase voltage converting circuit 24. do.

Further, the first feedback control circuit 1 controls the on-width of the high side MOSFET 11 based on the amplitude signal Comp generated by the amplitude signal generator.

In addition, the first feedback control circuit 1 controls the on-width of the high side MOSFET 11 based on the input voltage Vin and the output voltage Vout.

Fig. 5 is a circuit diagram showing the detailed configuration of the feedforward circuit 6 in the switching power supply of this embodiment. The feed forward circuit 6 is composed of a combination of voltage and current conversion circuits 61, 62, and 63 and division circuits 64 and 65, as shown in FIG. have.

The voltage current conversion circuit 61 generates a current signal Ivin by converting the input voltage Vin into current. In addition, the voltage-current conversion circuit 62 generates a current signal Ivout by converting the output voltage Vout into current. Similarly, the voltage-current conversion circuit 63 generates the current signal Icomp by converting the amplitude signal (error amplification voltage) Comp into current.

The division circuit 64 outputs the current signal Ifw calculated by dividing the current signal Ivin by the current signal Ivout to the division circuit 65 at the subsequent stage. The division circuit 65 generates a current signal Iton calculated by dividing the current signal Ifw by the current signal Icomp. The equation for Iton is given by Iton = K × Vin / (Vout × Comp). Here, K is a conversion coefficient when the input voltage Vin, the output voltage Vout, and the amplitude signal Comp are converted to the current signal, and have a dimension inversely proportional to the resistance value.

In this way, the feedforward circuit 6 outputs an output current Iton proportional to the input voltage Vin and inversely proportional to the output voltage Vout to the Adj terminal of the on timer 7. By the operation of the feedforward circuit 6, the first feedback control circuit 1 controls the on-width of the high side MOSFET 11 so that the switching frequency is constant according to the input / output conditions, and also by the second feedback control circuit. The on-side width of the high side MOSFET 11 is controlled so that the valley voltage Valley of the ramp signal becomes equal to the reference voltage V1 by giving Iton a property inversely proportional to the output amplitude signal (error amplification signal) Comp. .

The first feedback control circuit 1 includes a feed forward circuit 6 so as to generate a ramp generated by the ramp generator 18 based on an amplitude signal (error amplification signal) Comp generated by the amplitude signal generator. The on-width of the high side MOSFET 11 is controlled so that the amplitude of the signal maintains a predetermined value.

The feedback comparator 4 compares the feedback voltage FB with the second reference voltage REF2, and when the feedback voltage FB is lower than the normal voltage of the second reference voltage REF2, the feedback comparator 4 receives the FB_TRG signal. Output The one-shot circuit 5 generates an ON_TRG signal based on the FB_TRG signal output by the feedback comparator 4 and outputs it to the Set terminal of the on timer 7.

Fig. 6 is a circuit diagram showing the detailed configuration of the on timer 7 in the switching power supply of this embodiment. The on-timer 7 is comprised from the capacitor | condenser 71, the comparator 72, AND circuit 73, the one-shot circuit 74, the inverter circuit 75, and the switch 76, as shown in FIG.

The switch 76 is turned on for a predetermined time based on the ON_TRG signal output by the one-shot circuit 5. The capacitor 71 discharges the electric charge accumulated by the switch 76 on in a very short time. As a result, the logic output level of the comparator 72 becomes High, and the one-shot circuit 74 outputs the sampling signal Spl for a predetermined time.

After completion of the sampling period by the one-shot circuit 74, the AND circuit 73 sets the drive logic control signal Ton, which is an output signal, to high. After that, the capacitor 71 starts charging by the feedforward current signal Iton. Since the comparator 72 switches the output level to Low when the potential of the capacitor 71 reaches the threshold V3, the AND circuit 73 makes the drive logic control signal Ton low.

The drive logic 8 is inversely opposite to the drive signal Hon of the high side driver 9 and the drive signal Hon based on the drive logic control signal Ton output by the on timer 7. The driving signal Lon of the low side driver 10 of the phase is output. In addition, the drive logic 8 detects that the polarity of the current IL flowing through the inductor 13 is inverted after the regeneration period of the inductor 13 ends, based on the SW voltage to detect the low side drive signal Lon. Switch to Low. Accordingly, since the low side MOSFET 12 is turned off, the switching power supply suppresses excessive backflow of the inductor current IL to prevent unnecessary loss.

The high side driver 9 drives the gate of the high side MOSFET 11 based on the Hon signal output by the drive logic 8 to output the output capacitor 14 and the output load 15 through the inductor 13. Energy).

The low side driver 10 drives the gate of the low side MOSFET 12 on the basis of the Lon signal output by the drive logic 8, so that the inductor current IL after the high side MOSFET 11 is turned off. The conduction loss is reduced by turning on the low side MOSFET 12 during the regenerative period.

As can be seen from the operation of the feedback comparator 4, the one short circuit 5, the on timer 7, the drive logic 8 and the high side driver 9, the first feedback control circuit 1, The superimposition signal REF2 generated by the superimposition circuit 3 is compared with the feedback signal FB having a magnitude corresponding to the output voltage Vout, so that when the feedback signal FB is lower than the superimposition signal REF2, The on timing is controlled so that the side MOSFET 11 is turned on.

Next, the operation of the present embodiment configured as described above will be described. First, a case will be described in which it is assumed that the phase voltage converting circuit 24 does not exist in order to clearly explain the operation of each configuration included in the switching power supply of this embodiment. FIG. 7 is a circuit diagram showing a configuration in the case where it is assumed that the phase voltage converting circuit 24 does not exist in the switching power supply of this embodiment.

In this case, a mechanism in which the load regulation characteristic is greatly improved by controlling the amplitude of the ramp signal to be constant will be described with reference to FIG. FIG. 8 is a timing chart showing the operation of the first converter 26a in the switching power supply device configured as shown in FIG. In the state where the output load current Iout is constant and the light load is also constant, the valley voltage Valley and the reference of the ramp signal Ramp are referenced by the operation of the sample hold circuit 19, the error amplifier 20, and the feedforward circuit 6. The voltage V1 is controlled to be equal.

Next, when the output load current Iout suddenly changes to the heavy load, the feedback voltage FB decreases as the output voltage Vout decreases. When the feedback voltage FB becomes less than or equal to the second reference voltage REF2, the one-shot circuit 5 outputs an ON_TRG signal based on the comparison result of the feedback comparator 4. On the basis of this ON_TRG signal, the high side MOSFET 11 is immediately turned on. At this time, since the valley voltage Valley of the ramp signal rises, an error occurs between the valley and the reference voltage V1.

The error amplifier 20 in the second feedback control circuit 2 raises and outputs the amplitude signal Comp so as to cancel this error. Inversely proportional to the rise of the amplitude signal Comp, the feedforward current Iton by the feedforward circuit 6 is lowered. The on-timer 7 outputs by extending the time width of the Ton signal because the feedforward signal Iton is decreasing.

As a result, the first feedback control circuit 1 controls in the direction in which the high width of the high side MOSFET 11 is widened. That is, the first feedback control circuit 1 has a high side when the amplitude of the ramp signal generated by the ramp generator 18 is less than a predetermined value based on the amplitude signal Comp generated by the amplitude signal generator. The width of the MOSFET 11 is controlled to be widened. The action of the first feedback control circuit 1 is a function common to both the switching power supplies of Figs.

When the on-width of the high side MOSFET 11 is widened, the switching frequency is lowered to maintain a constant on duty, which is approximately determined by the ratio of the input voltage Vin and the output voltage Vout, and eventually light load. The switching frequency Fsw1 at the time and the switching frequency Fsw2 at the heavy load are controlled to be the same. As a result, the valley voltage Valley of the ramp signal becomes the same as the reference voltage V1, so that the amplitude of ΔREF overlapping the second reference voltage REF2 is also controlled to be constant without depending on the load current Iout. (ΔREF1 = ΔREF2 in Fig. 8).

Even when the feedback voltage FB rises and the valley voltage Valley of the ramp signal falls and an error occurs between the valley and the reference voltage V1, the error amplifier (2) in the second feedback control circuit 2 20) lowers and outputs the amplitude signal Comp to cancel this error. As a result, the first feedback control circuit 1 controls in the direction in which the on-width of the high side MOSFET 11 is narrowed. That is, the first feedback control circuit 1 has a high side when the amplitude of the ramp signal generated by the ramp generator 18 is greater than or equal to a predetermined value based on the amplitude signal Comp generated by the amplitude signal generator. Control to narrow the on-width of the MOSFET 11. The operation of the first feedback control circuit 1 is also common to the switching power supply devices in Figs.

When the on-width of the high side MOSFET 11 is narrowed, the switching frequency is increased, and as a result, the switching frequency Fsw1 at light load and the switching frequency Fsw2 at heavy load are controlled to be the same. As a result, the valley voltage Valley of the ramp signal becomes the same as the reference voltage V1, so that the amplitude of ΔREF overlapping the second reference voltage REF2 is also controlled to be constant without depending on the load current Iout. .

As such, in response to dynamic load fluctuations such as sudden load fluctuations, the first feedback control circuit 1, which is a major loop, reacts at high speed without passing through an error amplifier, thereby minimizing the change in the output voltage Vout, With respect to the load change, by controlling the amplitude of the ramp signal to be kept constant using the error amplifier 20, the switching power supply of the present embodiment significantly improves the load regulation characteristic, which is a conventional problem, without sacrificing control stability. can do.

However, as described above, a plurality of different digital signal processing LSIs are usually mounted on one control board, and one input such as, for example, 12V is required because a proper power supply voltage needs to be supplied for each LSI. It is common to generate 3.3V, 1.8V, 1.05V, etc. voltage using a plurality of DC-DC converters from the voltage.

If the peak values of the inductor currents of the respective DC / DC converters overlap at this time, the peak value of the total input current becomes too large, and the input voltage of 12V is largely dropped, except that the worst case results in malfunction. there is a problem. In addition, when an electrolytic capacitor is used for the input capacitor, a ripple current exceeding the allowable range causes heat generation, which shortens the lifespan of the power supply system.

Specifically, it demonstrates using the timing chart shown in FIG. FIG. 9 is a timing chart showing the operation of the switching power supply device configured as shown in FIG. As shown in FIG. 9, the drive signal HDRV for driving the high side MOSFET 11 in the first converter 26a and the drive signal HDRVb for driving the high side MOSFET 26 in the second converter 26b. When the phase difference between and is minimum, the ripple of the input voltage Vin becomes maximum.

As a countermeasure against this problem, it is conceivable to synchronize the switching frequencies of the respective DC-DC converters and to have a phase difference so that the current peaks do not overlap. However, the switching power supply as shown in FIG. Since it is a self-oscillation control in which the on timing of the high side MOSFET 11 is changed, it is very difficult to synchronize the switching frequency.

In order to solve the above problem, the switching power supply of the present embodiment has a configuration in which a phase voltage converting circuit 24 is provided for the multi output converter as shown in FIG. In the switching power supply shown in Fig. 1, by adding the phase voltage converting circuit 24, the switching operation of the first converter 26a follows the control so that the frequency is equal to the basic switching operation of the second converter 26b. The principle that can reduce the ripple of the input voltage Vin by performing follow-up control and switching operation with an arbitrary phase difference (here, about 180 °) is described.

Fig. 10 is a circuit diagram showing the detailed configuration of the phase voltage converting circuit 24 in the switching power supply of the present embodiment. As shown in Fig. 10, the phase voltage converting circuit 24 includes a one short circuit 231, a one short circuit 232, an SR flip-flop 233, a delay circuit 234, a switch 235, and a switch 236. Capacitor 237, buffer 238, switch 239, capacitor 240, error amplifier 241, phase compensation resistor 242, phase compensation capacitor 243, buffer 244, constant current source I4 ) And reference voltage V4.

The phase voltage conversion circuit 24 includes the high side MOSFET drive signal HDRV from the first converter 26a and the high side MOSFET drive signal HDRVb from the second converter 26b (the reference signal of the present invention). The phase difference signal Ph_hold is generated and the error amplification signal between the phase difference signal Ph_hold and the reference voltage V4 is output to the Comp terminal of the first converter 26a to detect the phase difference. A circuit for synchronizing the operation of 26a) with the switching frequency of the second converter 26b and having an arbitrary phase difference.

Specifically, when the high side MOSFET drive signal HDRVb from the second converter 26b is switched from low to high, the one-shot circuit 231 sets the SR flip-flop 233 by outputting the trigger signal Ph2. It is in a state. At this time, since the switch 235 is turned on, the capacitor 237 is charged by the constant current source I4.

Next, when the high side MOSFET drive signal HDRV from the first converter 26a is switched from Low to High, the one-shot circuit 232 outputs the trigger signal Ph1. For this reason, the switch 239 is turned on, and the peak value of the voltage signal Ph_Ramp accumulated in the capacitor 237 is transmitted to the capacitor 240 through the buffer 238 to generate the phase difference signal Ph_hold. At the same time, since the trigger signal Ph1 causes the SR flip-flop 233 to be reset, the switch 235 is turned off to stop the charging of the capacitor 237.

After that, the delay circuit 234 outputs a delay signal Ph_dis to turn on the switch 236. As a result, the capacitor 237 is discharged. The error amplifier 241 compares the reference voltage V4 with the Ph_hold signal, and outputs the error voltage to the Comp terminal of the first converter 26a through the buffer 244.

The first feedback control circuit 1 drives with the reference signal HDRVb based on the on-width control signal (signal output from the phase voltage conversion circuit 24 to the Comp terminal) generated by the phase voltage conversion circuit 24. The on-width of the high side MOSFET 11 is controlled so that the frequency of the signal HDRV becomes the same.

11 is a timing chart showing the operation of the switching power supply of this embodiment. As shown in Fig. 11, at the beginning of the lock-up period of the timing chart, the Comp signal rises because the phase difference signal Ph_hold between Ph2 and Ph1 is lower than the reference voltage V4. Accordingly, the first feedback control circuit 1 of the first converter 26a controls to widen the on-width of the high side MOSFET 11.

When the on-width of the high side MOSFET 11 is widened, the feedback is applied to keep the on-duty approximately constant under the condition that the input voltage Vin and the output voltage Vout are constant, so that the first converter 26a The switching frequency is lowered, and the on timing of the high side MOSFET 11 in the next period is delayed.

As a result, the phase difference between Ph2 and Ph1 increases, so that the phase difference signal Ph_hold rises to narrow the error with the reference voltage V4. As a result, the switching operation of the first converter 26a and the switching operation of the second converter 26b are approximately equal to each other in frequency, and an arbitrary phase difference determined by the reference voltage V4 as the phase difference (180 ° in FIG. 11). Assumes a switching operation.

In other words, the phase voltage converting circuit 24 has a reference phase difference that can be set by adjusting the reference voltage V4. Based on this, the warm width control signal is generated.

In addition, the first feedback control circuit 1 has a high side MOSFET such that the phase difference between the reference signal HDRVb and the drive signal HDRV becomes a reference phase difference based on the on-width control signal generated by the phase voltage conversion circuit 24. 11) Control the warm width. In other words, when the second converter 26b is set to the master side, the first converter 26a operates to synchronize the frequency as the slave side and to have a predetermined phase difference.

The peak value of the integrated input current Iin at the beginning of the lockup period of the timing chart shown in FIG. 11 is the sum of the peak values of approximately two inductor currents because the phase difference between the inductor current IL and ILb is small. very big. As a result, the ripple of the input voltage Vin increases.

On the other hand, in the phase lock period, since the two inductor currents IL and ILb coincide in frequency and are inverted by 180 ° in phase, the peak value of the integrated input current Iin decreases. As a result, the ripple of the input voltage Vin can be suppressed to be small.

As described above, according to the switching power supply apparatus according to Embodiment 1 of the present invention, the ripple of the input voltage is suppressed and stable operation is possible even when an output capacitor having a small ESR is used, and good load regulation characteristics can be obtained. It can be realized.

In other words, the first feedback control circuit, which is a major loop, reacts at high speed to the dynamic load fluctuations such as sudden load fluctuations by minimizing the change in the output voltage Vout while minimizing the static load change. By controlling the amplitude of the ramp signal to be kept constant using the error amplifier 20, the switching power supply of this embodiment can greatly improve the load regulation characteristic without sacrificing control stability.

In addition, the phase voltage conversion circuit 24 included in the switching power supply of this embodiment uses the signal HDRVb for driving the high side MOSFET 26 in the second converter 26b as a reference signal, so that the reference signal HDRVb. And the warm width control signal may be generated based on the phase difference between the driving signal HDRV and the driving signal HDRV. The first converter 26a is equal to the switching frequency of the second converter 26b by adjusting the on-width of the high side MOSFET 11 in preference to the on-width control signal input by the phase voltage converting circuit 24 input to the Comp terminal. In addition to the following operation, the control is performed so that an arbitrary phase difference (here, 180 °) is achieved. As a result, since the peak values of the inductor currents by the two converters do not overlap, the peak value of the integrated input current Iin is lowered, so that the drop of the input voltage Vin can be reduced. Therefore, the switching power supply of the present embodiment can prevent malfunctions and also reduce the ripple current of the input capacitor, so that the life of the power supply system can be extended when the electrolytic capacitor is used for the input capacitor.

The power supply system of the present invention includes a reference switching power supply (second converter 26b in FIG. 1) including a high side switch connected to an input voltage Vin, and one or more switching power supply devices (in FIG. 1). The first converter 26a and the phase voltage converting circuit 24 may be provided. In this case, the on-width control signal generation unit (phase voltage conversion circuit 24 in FIG. 1) included in each of the one or more switching power supplies is used as a self-controller among the reference switching power supply and one or more switching power supplies. The drive signal for driving the high side switch (high side MOSFET 26 in FIG. 1) included in any one switching power supply (second converter 26b in FIG. 1) except for the switching power supply is a reference signal. Use as.

In FIG. 1, except for the reference switching power supply, there is only one switching power supply, but a power supply system including a plurality of switching power supply devices as described above is also conceivable. Fig. 12 is a circuit diagram showing a configuration of a variation of the switching power supply of this embodiment, which is a step-down chopper circuit having a three phase configuration. The three converters are basically the same in structure, and are combined with each other in the phase voltage conversion circuit 24 to adjust the reference voltage V4 in the phase voltage conversion circuit 24 so that the phase difference becomes 120 °. The peak value of Iin) and the ripple of the input voltage Vin can be set to the minimum.

The switching power supply device and power supply system according to the present invention can be used for a switching power supply device and a power supply system for use in an electric device or the like that requires stable power supply.

1: first feedback control circuit
2: second feedback control circuit
3: overlapping circuit
4: feedback comparator
5, 5a: one short circuit
6, 6b: feed forward circuit
7, 7b: on timer
8: drive logic
9: high side driver
10: low side driver
11: high side MOSFET
12: low side MOSFET
13: inductor
14: output smoothing capacitor
15: output load
16, 17: feedback resistor
18: lamp generator
19: Sample hold circuit
20: error amplifier
21: phase compensation resistance
22: phase compensation capacitor
24: phase voltage conversion circuit
25 control circuit
26: high side MOSFET
26a: first converter
26b: second converter
27: low side MOSFET
28: inductor
29: output smoothing capacitor
30: output load
31: NPN transistor
32: PNP transistor
33: resistance
34, 35: Nch MOSFET
36, 37: Pch MOSFET
38: resistance
39, 40: feedback resistance
61, 62, 63: voltage and current conversion circuit
64, 65: division circuit
71: condenser
72: comparator
73: AND circuit
74: one short circuit
75: inverter circuit
76: switch
181: one short circuit
182: inverter
183: Pch MOSFET
184: condenser
191: Buffer circuit
192: switch
193: condenser
231, 232: one short circuit
233: SR flip flop
234: delay circuit
235, 236: switch
237 capacitor
238: buffer
239: switch
240: condenser
241: error amplifier
242: phase compensation resistor
243: phase compensation capacitor
244: buffer
I1, I2, I4: constant current source
Vin: Input Voltage
Vout: Output voltage
V2: Lower limit clamp voltage

Claims (10)

A switching power supply consisting of a plurality of switching power supplies,
A high side switch connected to the input voltage,
A ramp signal generator for generating a ramp signal synchronized with the switching frequency of the high side switch;
Detecting a phase difference between a reference signal of one of the plurality of switching power supplies and a drive signal for driving the high side switch of the other switching power supply ; and on-the-fly control signal based on the detected phase difference On-width control signal generation unit for generating a control system,
Based on the ramp signal generated by the ramp signal generator, a feedback signal having a magnitude corresponding to an output voltage, and a first reference voltage, the on timing of the high side switch is controlled and generated by the on-width control signal generator. A controller for controlling the on-width of the high side switch based on the on-width control signal.
Switching power supply characterized in that it comprises.
The method of claim 1,
The control unit of the other switching power supply controls the on-width of the high side switch so that the frequency of the reference signal and the driving signal are equal to each other based on the on-width control signal generated by the on-width control signal generator. Switching power supply characterized in that.
The method according to claim 1 or 2,
The warm width control signal generator of the other switching power supply generates a warm width control signal based on the detected phase difference and the reference phase difference,
The controller is configured to control the on-width of the high side switch based on the on-width control signal generated by the on-width control signal generator so that the phase difference between the reference signal and the driving signal becomes the reference phase difference. Power supply.
The method of claim 1 ,
The second lamp signal having a positive slope corresponding to the amplitude and frequency of the ramp signal generated by the ramp signal generator is generated, and the generated second lamp signal is applied to the first reference voltage. An overlapping circuit for overlapping to generate an overlapping signal;
The control unit compares the overlapping signal generated by the overlapping circuit with the feedback signal, and controls the on timing so that the high side switch is turned on when the feedback signal falls below the overlapping signal. Power supply.
The method of claim 1 ,
An amplitude signal generator for generating an amplitude signal according to the amplitude of the ramp signal generated by the ramp signal generator;
And the control unit controls the on-width of the high side switch based on the amplitude signal generated by the amplitude signal generator.
The method of claim 5,
The controller controls the on-width of the high side switch based on the amplitude signal generated by the amplitude signal generator so that the amplitude of the ramp signal generated by the ramp signal generator maintains a predetermined value. Switching power supply.
The method of claim 5 ,
The control unit controls to widen the on-width of the high side switch when the amplitude of the ramp signal generated by the ramp signal generator is less than a predetermined value based on the amplitude signal generated by the amplitude signal generator. And controlling to narrow the on-width of the high side switch when the amplitude of the ramp signal generated by the ramp signal generator is greater than or equal to a predetermined value.
The method of claim 5 ,
The amplitude signal generator,
A sample hold circuit for holding a valley voltage of the ramp signal generated by the ramp signal generator;
Comparing an valley voltage held by the sample-hold circuit with a second reference voltage, and generating an error amplification signal according to the comparison result and outputting the error amplification signal as an amplitude signal.
Switching power supply characterized in that it comprises.
The method of claim 1 ,
And the control unit controls the on-width of the high side switch based on the input voltage and the output voltage.
A reference switching power supply comprising a high side switch connected to an input voltage ,
Claim 1 or more switching power supply
Respectively,
The on-width control signal generator of each of the one or more switching power supplies includes a high side switch provided by any one switching power supply except for the own switching power supply among the reference switching power supply and the one or more switching power supplies. A power supply system characterized by using a drive signal for driving a signal as a reference signal .

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