KR100687435B1 - Ion Implantation Method of Semiconductor Device - Google Patents

Abstract

The ion implantation method of the semiconductor device according to the present invention can control the beam current and the implantation energy, and in the method of implanting conductive impurities into the substrate using an ion implanter including a gas cooler, the beam current or implantation energy is increased. Increase the gas pressure injected into the gas cooler.

Description

ION IMPLANT METHOD OF SEMICONDUCTOR DEVICE

1 is a schematic diagram illustrating an ion implantation apparatus according to an embodiment of the present invention.

2 to 5 are cross-sectional views sequentially illustrating a semiconductor manufacturing process for forming a semiconductor device by the ion implantation method according to the present invention.

The present invention relates to an ion implantation method, and more particularly, to an ion implantation method of a semiconductor device.

The process of manufacturing a semiconductor device requires several impurity doping steps. Ion implantation is a process of putting conductive dopants.

The implanted impurities change electrical properties such as conductivity and resistance of the wafer and the structure formed on the substrate. P-type or N-type ions may be used as such impurities, and these ions are injected through an ion implanter.

An ion implanter is a device that accelerates ionized impurities to dope certain regions of a substrate. The ion implanter is composed of an ion source section, a beam line section, and an end station section. The ion generating unit serves to generate an ion beam, and the beamline unit provides energy required for the generated ions. The end station portion loads and unloads the substrate to where the substrate is placed. The end station unit includes a cooling unit for maintaining a constant temperature and pressure of the substrate. The cooling unit adjusts the temperature of the substrate using water or gas.

However, if the temperature of the substrate is not properly adjusted, burning of the photoresist may occur, and thus an accurate pattern may not be formed.

Therefore, the technical problem to be achieved by the present invention provides an ion implantation method that can prevent the burning of the photosensitive film.

The ion implantation method of the semiconductor device according to the present invention for achieving the above object is to control the beam current, the implantation energy, and in the method for injecting conductive impurities into the substrate using an ion implanter comprising a gas cooler, As the current or injection energy increases, the gas pressure injected into the gas cooler increases.

The cooling gas may be nitrogen gas.

The beam energy is 10KV or less, 10KV or more and 20KV or less, the beam current is 9mA or less, 20KV or more and 40KV or less, the beam current is 4mA or less, 40KV or more and 60KV or less, the beam current is 3mA or less and the beam energy is more than 60KV and the beam current is 3mA or less When in any one of the range of the pressure of the cooling gas may be 4Torr or less.

The beam energy is less than 10KV, more than 10KV and more than 20KV, the beam current is more than 9mA, more than 20KV and more than 40KV, the beam current is more than 5mA and less than 9mA, the beam energy is more than 40KV and less than 60KV and the beam current is more than 4mA and less than 6mA or less than 60KV The pressure of the cooling gas may be greater than 4 Torr and less than or equal to 8 Torr when the beam current is in the range of more than 3 mA and less than 4 mA.

When the beam energy is more than 40KV and less than 60KV and the beam current is more than 8mA and 9mA or less, and the beam energy is more than 60KV and the beam current is in the range of 7mA or more and 8mA or less, the pressure of the cooling gas may be more than 8Torr and less than 10Torr.

When the beam energy is more than 40KV and less than 60KV and the beam current is more than 9mA or the beam energy is more than 60KV and the beam current is more than 8mA, the pressure of the cooling gas may be more than 10 Torr and less than 15 Torr.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention.

A method of manufacturing a semiconductor device according to the present invention will now be described with reference to the accompanying drawings.

1 is a schematic view showing an ion implantation apparatus according to an embodiment of the present invention.

Referring to FIG. 1, the ion implantation apparatus includes an ion generator 10, a beamline unit 20, and an end station unit 30.

The ion generator 10 generates ions of the impurity element to be doped. The beamline unit 20 selects ions to be implanted into the wafer, and accelerates or decelerates the selected ions to give energy to the wafer to be doped to a desired depth.

In more detail, the beamline unit 20 may include an analyzer 21, an accelerator (not shown), a quadrupole lens 22, a faraday 23, and a bias bias. aperture 24 and particle accumulator 25.

The analyzer 21 selectively passes only ions having a desired mass and charge by controlling the intensity of the magnetic field of the impurity element supplied from the source unit. The accelerator accelerates or decelerates ions selected by the analyzer 21 by applying an acceleration voltage or deacceleration voltage in the acceleration ring. The quadrupole lens 22 allows the ion beam accelerated or decelerated in the accelerator to move inside the magnet to achieve rounded circular focusing and to prevent blow-up by concentration.

Faraday 23 measures the current of the ion beam to be injected into the wafer. Faraday 23 before ion implantation measures the current of the ion beam in a head up state, and then enters the ion implantation mode while heading down and passes the ion beam. The bias spreader 24 allows secondary electrons generated in the plasma shower 30 of the end station portion 30 to remain in the plasma shower 31 to flow back toward the source portion 10 in the ion beam. .

Particle dust collector 25 is at least one along the ion beam line portion 20 to collect particles that can be accelerated with the ion beam in accordance with the energy in the ion beam line portion 20 to change the electrical characteristics of the wafer. An abnormality is formed.

Faraday 23, which is headed up to measure the current of the beam, prevents the ion beam from being injected into the wafer in the set-up state.

In addition, the end station unit 30 includes a cooling unit (not shown) where the wafer to be ion implanted is placed. The cooling unit allows water or gas to flow under the substrate placed in the end station unit 30 so that the substrate maintains a constant temperature.

A method of implanting ions into a semiconductor device using the ion implanter described above will be described with reference to FIGS. 2 to 5.

2 to 5 are cross-sectional views sequentially illustrating a semiconductor manufacturing process for forming a semiconductor device by the ion implantation method according to the present invention.

As shown in FIG. 2, the device isolation region 12 defining the active region is formed on the semiconductor substrate 100 by using a local oxidation silicon (LOCOS) (not shown) or shallow trench isolation (STI) scheme. . The LOCOS method forms a device isolation region by oxidizing a predetermined region of the substrate 100. The STI method forms a device isolation region 102 by forming a trench in a predetermined region of the substrate 100 and then filling an insulating material. That's the way it is.

Thereafter, the substrate 100 is thermally oxidized to form an oxide film having a thickness of about 20 to about 40 kPa on the substrate 100. Then, after the polycrystalline silicon film is formed on the oxide film, the gate 106 and the gate oxide film 104 are formed by selectively etching the polycrystalline silicon film and the oxide film using the photoresist film PR.

Next, as shown in FIG. 3, conductive dopant ions are implanted at low concentration into the substrate 100 using the photoresist film PR as a mask to form a low concentration doped region 108. The lightly doped region is formed by injecting ^{12 to 13} 1 × ¹⁰ P, N, or the like.

The lightly doped region 108 is implanted using the ion implanter shown in FIG. 1, and the pressure of the cooling gas increases as the ion implantation energy and beam current increase. Then, the burning phenomenon of the photoresist film PR does not occur. Nitrogen may be used as the cooling gas.

It will be described in more detail with reference to Table 1 and Table 2.

Table 1 is a table showing the ion implantation intensity according to the relationship between the ion implantation energy and the beam current, Table 2 shows the injection pressure of nitrogen gas according to the ion implantation intensity of Table 1.

TABLE 1

TABLE 2

For example, if the beam current is 5 mA when boron is injected with 20 KV of energy, the ion implantation intensity of 100 W can be seen in Table 1. Then, in Table 2, when the pressure of the nitrogen gas according to the ion implantation intensity 100W is found to be 4 Torr, the injection pressure of the nitrogen gas injected into the cooler of the ion implanter is set to 4 Torr.

As shown in FIG. 4, an oxide film and a nitride film are formed on the entire surface of the substrate 10 by chemical vapor deposition. Then, the nitride film and the oxide film are removed by the etch back to form the spacer 112 and the buffer film 110 including the nitride film and the oxide film on the sidewalls of the gate 106. The buffer film reduces the interfacial stress between the nitride film and the gate.

As shown in FIG. 5, the semiconductor substrate 100 is doped at high concentration with the spacer 112 and the gate 106 as a mask to form the source region 114 and the drain region 114.

Impurity ions are doped with the same material as the lightly doped region 108 and implanted into the ion implanter of FIG. 1. In this case, as in forming the low concentration doped region 108, with reference to Table 1 and Table 2, by adjusting the pressure of the cooling gas according to the beam energy and the beam current is injected.

Thereafter, impurity ions implanted into the semiconductor substrate 114 are activated by a heat treatment process such as rapid heat treatment and furnace heat treatment.

As described above, by adjusting the pressure of the cooling gas according to the injection energy and the beam current, the burning phenomenon of the photosensitive film can be reduced, thereby improving the reliability of ion implantation, thereby providing a high quality semiconductor device.

Although the preferred embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concepts of the present invention defined in the following claims are also provided. It belongs to the scope of rights.

Claims (6)

In the ion implantation method of the semiconductor device which can control the beam current, the implantation energy and injects conductive impurities into the substrate using an ion implanter including a gas cooler, An ion implantation method of a semiconductor device which increases the gas pressure injected into the gas cooler as the beam current or implantation energy increases. In claim 1, The cooling gas is nitrogen gas ion implantation method of a semiconductor device. In claim 1, The beam energy is 10KV or less, 10KV or more and 20KV or less, the beam current is 9mA or less, the beam energy is more than 20KV and 40KV or less, the beam current is 4mA or less, the beam energy is more than 40KV and 60KV or less and the beam current is 3mA or less Or the pressure of the cooling gas is 4 Torr or less when the beam energy is more than 60 KV and the beam current is in any one of a range of 3 mA or less. In claim 1, The beam energy is 10KV or less, 10KV or more and 20KV or less, the beam current is more than 9mA, the beam energy is more than 20KV and 40KV or less, the beam current is more than 5mA and 9mA or less, and the beam energy is more than 40KV and 60KV or less, and the beam current is And the pressure of the cooling gas is greater than 4 Torr and less than 8 Torr when the beam current exceeds 4 mA and 6 mA or less, or the beam energy exceeds 60 KV and the beam current is within a range of 3 mA or more and 4 mA or less. In claim 1, The pressure of the cooling gas is greater than 8 Torr when the beam energy is more than 40 KV and less than 60 KV and the beam current is more than 8 mA and 9 mA or less, and the beam energy is more than 60 KV and the beam current is in the range of 7 mA or more and 8 mA or less. An ion implantation method of a semiconductor device of 10 Torr or less. In claim 1, And the pressure of the cooling gas is greater than 10 Torr and greater than 15 Torr when the beam energy is greater than 40 KV but less than 60 KV and the beam current exceeds 9 mA or the beam energy exceeds 60 KV and the beam current exceeds 8 mA.

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