JPS6457643U - - Google Patents

Description

[Brief explanation of the drawing]

Figures 1 to 3 relate to the present invention, and Figure 1 shows a plan view of a semiconductor chip and a wiring board in an embodiment of a mounting structure for a semiconductor integrated circuit chip according to the present invention, and a state after mounting the semiconductor chip. The side view, FIGS. 2 and 3 are partially enlarged sectional views of the semiconductor chip showing different aspects of connection bumps and simulated bumps, respectively. Fig. 4 is a schematic diagram showing the mounting pattern of a flip chip according to the prior art, Fig. 5 is a schematic diagram of mounting when bumps are concentrated in the center of the semiconductor chip, and Figs. FIG. 3 is a schematic diagram showing patterns of inclination and depression that may occur in the case of the mounting structure of FIG. In the figure, 1: semiconductor chip substrate, 2, 4: insulating film, 3
: Connection film for connection of integrated circuit, 5: Connection film for connection bump, 6: Base film for simulated bump, 7: Protective film, 1
0: Semiconductor chip or flip chip, 11
: Integrated circuit part of semiconductor chip, 12: Connection point with connection bump of integrated circuit, 13: Connection pad, 2
0: Connection bump, 30: Simulated bump, 40: Wiring board, 50: Wiring conductor, 51: Connection point of wiring conductor with connection bump, 60, 61, 62: Simulated connection point, D1: Poor connection defect, D2: Short-circuit defect between wiring conductors, δ: Distance between semiconductor chip and wiring board, L:
The dimensions to which thermal stress is applied, θ: the inclination angle of the semiconductor chip, and W: the weight of the semiconductor chip.

Claims (1)

[Scope of Claim for Utility Model Registration] (1) A structure in which a semiconductor chip for an integrated circuit is connected to a wiring conductor of a wiring board via a solder bump and simultaneously mounted on the wiring board, in which the central part of the ice conductor chip is A plurality of connection bumps to be connected to the wiring conductor are arranged in a concentrated manner, and a plurality of simulated bumps are arranged distributed around the periphery, and simulated connection points are provided on the wiring board corresponding to the simulated bumps on the semiconductor chip side. A semiconductor chip is connected to and mounted on a wiring board by bonding the connection bumps to the wiring conductor with the connection bumps placed opposite to the wiring conductors and the simulated bumps placed opposite to the simulated connection points. Mounting structure of integrated circuit chip. (2) A mounting structure for a semiconductor integrated circuit chip according to claim 1 of the utility model registration, characterized in that the dummy bumps are distributed and arranged at four corners of a rectangle of the semiconductor chip. (3) Utility Model Registration A mounting structure for a semiconductor integrated circuit chip according to claim 2, characterized in that one to three simulated bumps are provided per corner. (4) A semiconductor integrated circuit in the mounting structure according to claim 1 of the utility model registration claim, characterized in that the dummy bumps are solder bumps having the same shape as the connection bumps, and are provided insulated from the integrated circuit. Circuit chip mounting structure. (5) Utility Model Registration Claim 1. A mounting structure for a semiconductor integrated circuit chip, characterized in that the simulated connection point is formed of an insulator having a shape similar to that of a wiring conductor. (6) A semiconductor integrated circuit chip characterized in that, in the mounting structure described in claim 1 of the utility model registration claim, the dummy bumps are provided insulated from the integrated circuit, and a wiring conductor is used as the dummy connection point. implementation structure.