JPS61241943A - Melting method for fuse for semiconductor integrated circuit device - Google Patents

Abstract

PURPOSE:To ensure the melting and cutting of a fuse and to decrease the damages of an insulating film or a semiconductor substrate, by preheating the fuse, and thereafter melting and cutting the fuse. CONSTITUTION:Of MISFETs 12, only the MISFET12A, which is connected to a fuse 7 to be melted and cut, is conducted by a fuse selecting decoder 20. A voltage is applied between bonding pads 6A and 6B by a voltage applying device. Then, laser light 21 is projected on the fuse 7 to be melted and cut. The energy of the laser light 21 is determined so as not to damage an insulating film 16, a field insulating film 14 or a semiconductor substrate 1 after the fuse 7 is melted and cut. A spot diameter R of the laser light 21 is set so that the diameter is larger than a melted gap (a) when the fuse 7 is melted and cut only by the application of the voltage. The fuse 7 is melted and cut in this way. Thus the poor melting and cutting are prevented, and the damages of the insulating film and the semiconductor substrate can be decreased.

Description

Detailed Description of the Invention [Technical Field] The present invention relates to a semiconductor integrated circuit device having a redundant circuit, a delay circuit, etc., and particularly to a semiconductor integrated circuit device used for the redundant circuit, delay circuit, etc. The present invention relates to a technique that is effective when applied to a fuse blowing method.

[Background Art] In semiconductor integrated circuit devices such as random access memory (RAM) and read-only memory (ROM), redundancy is required to prevent the semiconductor integrated circuit device from becoming unusable due to the occurrence of defective memory cells. memory cells are provided. This electrical replacement of the redundant memory cell and the defective memory cell is achieved by applying voltage to a predetermined fuse among the plurality of semiconductor integrated circuit device fuses (hereinafter simply referred to as fuses) provided in the decoder circuit. This is done by fusing.

Further, the fuse is a MISFET which is a memory cell.
Since it is formed in the same manufacturing process as the gate electrode or data line, it is formed using a polycrystalline silicon layer or an aluminum layer.

It is conceivable to blow out the fuse made of this polycrystalline silicon layer or aluminum layer by irradiating it with laser light.

However, as a result of studying the blowing of the fuse by irradiation with laser light, the inventor found that the field insulating film and the semiconductor substrate below the fuse were destroyed.

Since the polycrystalline silicon layer has a high melting point, it is necessary to blow out a fuse made of the polycrystalline silicon layer.

Requires high-energy laser light. For this reason.

When irradiated with laser light, it melts the fuse and
It also destroys the field insulation film and semiconductor substrate.

On the other hand, since the aluminum layer reflects about 80% of the laser beam, a high-energy laser beam is required to blow out the fuse made of the aluminum layer. Therefore, like the fuse made of the polycrystalline silicon layer, the fuse is blown and the field insulating film and semiconductor substrate are also destroyed.

Note that technology regarding fuses provided in redundant circuits is described, for example, in Japanese Patent Application No. 59-233104.

[Object of the Invention] The object of the present invention is to reliably blow out a fuse, and
The object of the present invention is to provide a technique that can reduce damage to an insulating film or a semiconductor substrate.

Another object of the present invention is to reduce damage to an insulating film or a semiconductor substrate under a fuse.

An object of the present invention is to provide a technology that can improve the degree of integration of a semiconductor integrated circuit device.

The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

[Summary of the Invention] A brief outline of one typical invention disclosed in this application is as follows.

That is, after the fuse is preheated, the fuse is blown.

The following five configurations of the present invention will be explained together with examples.

It should be noted that throughout the description of the embodiments, parts having the same functions are given the same reference numerals, and repeated explanations thereof will be omitted.

[Embodiment] FIGS. 1 to 6 are diagrams for explaining a fuse blowing method according to an embodiment of the present invention, and FIG. 1 is a schematic diagram of the layout of a semiconductor integrated circuit device.

FIG. 2 is a plan view of the vicinity of the fuse before it is fused, and FIG. 3 is a sectional view taken along the line m-at in FIG. 2.

FIG. 4 is a plan view of the area around the fuse after blowing out, FIG. 5 is a cross-sectional view taken along the line v--■ in FIG. 4, and FIG. 6 is an equivalent circuit diagram of the area around the fuse.

1 to 6, reference numeral 1 denotes a semiconductor substrate made of p-type single crystal silicon, and the layout shown in FIG. 1 includes a memory mat 21, various peripheral circuits 3, a Y decoder 4, an , and a bonding pad 6 are formed.

In FIGS. 2 and 3, 7 is a fuse, one end of which is connected to the bonding pad 6A, and the other end of which is connected to the n+ type semiconductor region 8 through the connection hole 9. The semiconductor region 8 constitutes the MISFET I2 together with the gate insulating film 10 and the gate electrode 11. The conductive layer 13 connected to one semiconductor region 8 connects the fuse 7 to a bonding pad 6 that is different from the bonding pad 6A.
This is for electrical connection to B (see FIG. 6).

In this embodiment, a p+ type channel stopper region 14, a field insulating film 15, a gate insulating film 10, a semiconductor region 8.
Gate electrode 11. Insulating film 16. After forming the connection holes 9 one after another, the fuse 7 was formed in the same manufacturing process as the bonding pad 6 and the data line (not shown). For this reason, the fuse 7 is formed using an aluminum layer, and the line width of the portion to be blown is 1.4 to 1.6 [μ
The film thickness is approximately 5,000 to 8,000 angstroms (hereinafter referred to as [A]).

Note that, for example, about eight fuses 7 are provided in each of the Y decoder 4 and the X decoder 5. After forming the fuse 7, the bonding pad 6, etc., an insulating film 17 is formed, and the upper insulating film 17 of the bonding pad 6 is removed to form the opening 18, and the insulating film 17 above the fuse 7 is removed. 17 is selectively removed to form an opening 19.

This opening 19 is formed to prevent cracks from occurring in the insulating film 17 due to the melted and expanded fuse 7 when the fuse 7 is blown out.

After forming each of the openings 1B and 19, a probe of a tester is brought into contact with a bonding pad drawer A dedicated for testing in order to test the electrical characteristics of the semiconductor integrated circuit device.

Next, in order to electrically replace the defective memory cells found through the test with redundant (spare) memory cells,
A predetermined fuse 7 out of the eight fuses 7 provided in the decoder 4 and a predetermined fuse 7 out of the eight fuses 7 provided in the X decoder 5 are blown out.

The method for blowing out the fuse 7 in this embodiment is shown below in Figures 4 and 5.
This will be explained using FIG. 6 and FIG.

First, among the MISFETs 12, only the MISFET 12A connected to the fuse 7 to be blown is made conductive by the fuse selection decoder 2o. and,
A voltage of about 1, for example, 3 [V] is applied between the bonding pads 6A and 6B by a voltage applying device (not shown). This voltage is not limited to 3 [V], but may be of a level that preheats the fuse 7.

Next, as shown by the dotted line in FIG. 5, the fuse 7 to be blown is irradiated with laser light 21. The energy of the laser beam 21 is set to such an extent that it will not damage the insulating film 16, the field insulating film 14, or the semiconductor substrate 1 after blowing out the fuse 7. Here, the spot diameter R of the laser beam 21 shown in FIG. 4 is the fusing gap a (O to 1 [μm
For example, it may be set to be about 6 to 7 [μm].

Note that the voltage for blowing the fuse 7 and the order in which the laser beam 21 is supplied are not particularly limited.
The voltage may be applied after the laser light 21 is irradiated, or the laser light 21 and the voltage may be supplied substantially simultaneously. Note that when applying a voltage after irradiating the laser beam 21, the energy of the laser beam 21 is set to a level that preheats the fuse 7.

In this way, a voltage is applied to the fuse 7 through the bonding pads 6A and 6B, or after the fuse 7 is irradiated with the laser beam 21 to preheat the fuse 7, the fuse 7 is irradiated with the laser beam 21, or A voltage is applied to the fuse 7 to blow the fuse 7. Thereby, the voltage applied to the fuse 7 can be reduced, and the energy of the laser beam 21 can be reduced. From these things, the following effects can be obtained.

(1) MISFET for applying voltage to fuse 7
Since the current capacity of 12 can be reduced, MISF
ET12 can be made smaller.

Therefore, the degree of integration of the semiconductor integrated circuit device can be improved.

(2) The spot diameter R of the laser beam 21 is larger than the fusing gap a when the fuse 7 is blown only by voltage application.
By increasing the fusing gap b (see FIG. 4), which is larger than the fusing gap a, it is possible to prevent reconduction due to electromigration.

(3) Even if the resistance value of the fuse 7 changes due to errors such as etching when forming the fuse 7, and this causes insufficient heat generation due to voltage application, energy can be supplied by irradiation with the laser light 21, so the fuse It is possible to prevent the defective fusing described in No. 7.

(4) According to (2) and (3) above, the yield and reliability of fusing the fuse 7 can be improved.

(5) Damage to the insulating film 16, field insulating film 15, and semiconductor substrate 1 due to irradiation with the laser beam 21 can be reduced.

Reference numeral 22 in FIG. 6 is a detection latch circuit (L), which discriminates between a blown fuse 7 and an unblown fuse 7, and outputs the result of this discrimination as, for example, an H level or L level signal. .

The address decoder 3 compares the output signal of the detection latch circuit 22 with the address signal sent from outside the chip (semiconductor substrate 1), thereby electrically replacing the redundant memory cell with the defective memory cell. It is done. 2
3 is an internal circuit protection resistor, and 24 is a clamp MISFET for preventing backflow.

Note that the fuse 7 is not limited to an aluminum layer, and even a fuse 7 formed using a polycrystalline silicon layer can meet the above (1) to (5) according to this embodiment.
) can achieve the same effect as that of . Furthermore, the fuse 7 may be constructed by providing a compound of a polycrystalline silicon layer and a high melting point metal layer, that is, a silicide layer, on the polycrystalline silicon layer.

[effect] According to the novel technology disclosed by this application.

You can obtain the following effects.

(1). The fuse 7 is heated by applying a voltage to the fuse or by applying a laser beam to the fuse to preheat the fuse and then applying a voltage to the fuse to blow the fuse. The applied voltage can be reduced, and the energy of the laser beam can be reduced.

(2). According to the above (1), the M I S FET for applying voltage to the fuse can be downsized, so that the degree of integration of the semiconductor integrated circuit device can be improved.

(3) According to (1) above, the fusing gap can be made larger than when the fuse is blown by only voltage application, so that re-conduction due to electromigration can be prevented.

(4) According to (1) above, the resistance value of the fuse changes due to errors such as etching when forming the fuse,
For this reason, even if insufficient heat generation occurs due to voltage application, energy can be supplied by laser beam irradiation, so it is possible to prevent fuse blowout failures.

(5) With (2) and (3) above, it is possible to improve the fuse blowout rate and reliability.

(6) According to (1) above, damage to the interlayer insulating film, the field insulating film, and the semiconductor substrate due to laser light irradiation can be reduced.

As above, the invention made by the present inventor has been specifically explained based on the embodiments. However, the present invention is not limited to the embodiments described above, and can be modified in various ways without departing from the gist thereof. Needless to say.

For example, in a semiconductor integrated circuit device with a memory function, information in a memory cell read by a sense amplifier is amplified by an output buffer and then output to another semiconductor integrated circuit device, but the output is output only after the output of the sense amplifier is stabilized. A delay circuit is provided to operate the buffer.

This delay circuit consists of a resistive element and a capacitive element, but if the resistance value of the resistive element differs from a predetermined value, the delay time changes. Therefore, in order to be able to adjust the resistance value of the resistor element,
A plurality of fuses are provided in parallel with the resistance element, and the resistance value of the resistance element is adjusted by selectively blowing the fuses.

Ru. The present invention can also be applied to blowing out this fuse.

[Brief explanation of the drawing]

1 to 6 are diagrams for explaining a fuse blowing method according to an embodiment of the present invention, and FIG. 1 is a schematic diagram of the layout of a semiconductor integrated circuit device. Figure 2 is a plan view of the area around the fuse before it blows out. FIG. 3 is a cross-sectional view taken along the line ■--■ in FIG. 2. FIG. 4 is a plan view of the area around the fuse after it is blown. FIG. 5 is a cross-sectional view taken along the line ■--■ in FIG. 4, and FIG. 6 is an equivalent circuit diagram around the fuse. 1... Semiconductor substrate, 2... Memory mat, 3...
Address decoder, 4...Y decoder, 5...X decoder, 6.6A, 6B...ponding pad, 7
09. Fuse, 8.14...Semiconductor region, 9...
Connection hole, 10.16.17... Insulating film, 11.13.
...Conductive layer, 12°12A...M I S FET,
15...Field insulating film, 18.19...Opening hole,
20... Fuse selection decoder, 21... Laser light, 22... Detection latch circuit, 23... Protection resistor,
24...MIS FET for clamp. Figure 2. ! 'F-1

Claims (1)

[Claims] 1. A method for blowing out a fuse for a semiconductor integrated circuit device used in a redundant circuit, a delay circuit, etc., which includes preheating by supplying voltage to both ends of the fuse or laser light to the blowing portion of the fuse. and a method for blowing a fuse for a semiconductor integrated circuit device, which blows the fuse by supplying a laser beam to the blowing portion of the fuse or applying a voltage to both ends of the fuse. 2. The semiconductor integrated circuit device according to claim 1, wherein the spot diameter of the laser beam is larger than the fusing gap when the fuse for the semiconductor integrated circuit device is blown by only applying voltage. How to blow a fuse. 3. The method for blowing out the fuse for semiconductor integrated circuit device is as follows:
The semiconductor integrated circuit device according to claim 1, wherein the process is performed after selectively removing the insulating film above the portion of the fuse for the semiconductor integrated circuit device to be blown to form an opening. How to blow a fuse.