JPS59217374A - Semiconductor strain converter - Google Patents

Abstract

PURPOSE:To miniaturize the titled device and increase the accuracy thereof by a method wherein a diffused strain gauge is arranged in the orientation of a crystal of a high sensitivity, a part or the whole of an integrated circuit is formed on the strain motivating part, and a diffused resistance element is arranged in the crystal orientation wherein the strain sensitivity becomes the minimum. CONSTITUTION:The crystal plane of an Si substrate 11 wherein an N type epitaxial layer is grown on a P type substrate is a plane [110], and the strain motivating part 4 forms a circular thin diaphragm. The diffused strain gauges 21, 22 and 23, 24 are P type diffused layers and are arranged at the center of the diaphragm and in the periphery, whose longitudinal directions are all selected in the axial direction of the plane [110]. The direction of the maximum sensitivity is the axial direction of [111], however, the output in the case of constructing each strain gauge in a Wheatstone bridge is larger in the axial direction of [110]. The integrated circuit 3 incorporating each circuit for amplification, temperature compensation, and output adjustment of the voltage output from the Wheatstone bridge is formed in the fixed part 5, and resistance elements 6a, 6b...6i as passive elements have the longitudinal directions arranged all in the axial direction of [100] of the direction of the minimum sensitivity. Thereby, said circuit can be manufactured also in the strain motivating part, thus enabling miniaturization and stress measurement of a good accuracy.

Description

[Detailed Description of the Invention] The present invention relates to the improvement of semiconductor strain transducers that convert mechanical quantities such as strain and pressure into electrical signals, and in particular performs amplification and signal conversion with diffusion strain gauges that apply piezoresistive effects. This invention relates to improvements in so-called integrated semiconductor strain transducers in which integrated circuits are formed on the same silicon substrate.

First, the prior art and its problems will be explained with reference to the drawings.

FIG. 1 is a first example of the prior art, showing a top surface and a conceptual cross-sectional view of a silicon substrate 1 used in a pressure transducer, in which the crystal plane is a (100) plane. The strain-generating portion 4 forms a circular thin-walled diaphragm, and 5 is a fixed portion. Diffusion strain gauges 21.22 and 23.24
is located at the periphery of the diaphragm where large stresses act, forming a Wheatstone bridge. An integrated circuit 3 incorporating an operational amplifier and a temperature compensation circuit for amplifying the voltage output generated from the Wheatstone bridge is formed in the fixed part 5. Power and output are input and output through the electrode pads 7 around the board fixing part. Also, in the integrated circuit 3, there are a plurality of resistance elements 6a+ 6b+, which are used as circuit constants to determine the bias amount of voltage and current.
...61 is provided. The output of the Wheatstone bridge composed of strain gauges is output from the integrated circuit 3.
It is compensated, adjusted and amplified by the pressure and output as a voltage on the order of volts which is proportional to the pressure. Diffusion strain gauge 21.
22, 23, and 24 are made of p-type diffusion layers, and are arranged at ?6 on the (110:] axis with high strain sensitivity. Also, the resistive element 6a provided in the integrated circuit 3
+6b+...61 is made of a p-type diffusion layer like the strain gauge, and is made parallel to the sides of the rectangular silicon substrate 1 based on experience. Therefore, as shown in Figure 1, its longitudinal direction is similar to that of a strain gauge (
110) It is along the axial direction, and the resistance change against strain occurs in the same way as a strain gauge. In general, many of the resistance elements used in integrated circuits have values of Ω or more, and therefore, a surface impurity concentration of the same level or lower than that of a diffusion strain gauge is selected to obtain the above-mentioned high resistance. The sensitivity of a diffusion strain gauge due to the piezoresistive effect is higher when the impurity concentration is lower.

Therefore, the resistance element in the integrated circuit has a sensitivity comparable to or higher than that of the diffusion strain gauge. For this reason, as shown in FIG. 1, the integrated circuit portion is formed in a fixed portion outside the diaphragm where stress does not apply.

FIG. 2 shows a second example of the prior art. FIG. 2 shows a top surface and a conceptual cross-sectional view of a silicon substrate 1 used as a strain transducer, and the crystal plane is a (Zoo) plane. The strain-generating portion 4 forms a cantilever beam, and 5 serves as a fixed portion. Diffusion strain gauges 21, 22 and 23.
24 is arranged near the fixed end where large stress acts, and constitutes a Wheatstone bridge. The crystal orientation of the strain gauge is arranged along the [110] axis as in the first example. The fixed part 5 is provided with the integrated circuit 3 for the same reason as in the first example of the prior art, and it is possible to extract a voltage output on the order of volts that is proportional to the amount of strain.

Problems in improving performance in the two prior art examples described above are as follows.

(1) Regarding the shape and dimensions of the silicon substrate, the shape and dimensions of the fixing part must be larger than the area on which the integrated circuit can be mounted, which poses a limitation in achieving miniaturization.

(2) It is necessary to separate the strain-generating part and the fixed part, making it unsuitable for measurement in complex stress analysis.

(3) The strain-generating part and the fixed part are separated by the thickness of the silicon substrate, but when large strains or pressures are applied, stress also affects the fixed part, causing changes in the values of the resistance elements in the integrated circuit. , p which causes errors such as non-linearity and hysteresis, and highly accurate measurement cannot be expected.

(4) Due to the residual thermal stress that occurs when a silicon substrate is fixed to other components, the values of resistance elements in integrated circuits change with temperature changes, resulting in thermal hysteresis characteristics and changes over time. do.

The present invention aims to solve these problems in the prior art.

In order to achieve this objective, the present inventor investigated the piezoresistance sensitivity of the diffusion layer in the silicon substrate and found the following properties.

Resistance change ΔR/R of strain gauge due to piezoresistance effect
can be expressed as equation (1). Here πr+,
πf2+7Z'+3 is the piezoresistance coefficient for each of the stress component 01' in the direction parallel to the current direction, the stress component σ in the perpendicular direction, and the stress component σf in the crystal plane direction, and πr4. π15. The sound is a shear stress component, σ5′, σ
is the piezoresistance coefficient for each of J.

"-呵, σr+What, σ;+πf3σ≦+π;4 Medium-π
15 “l” 呵. σt... (]) The diffusion strain gauge is selected in the direction where πr+ is especially large in equation (1) to maximize the sensitivity to the stress σ(in the longitudinal direction of the gauge). It detects the stress acting on the part and converts mechanical quantities such as strain and pressure into electrical signals.

By the way, as described in the prior art example, it is not desirable for the resistive element fabricated in the integrated circuit to have sensitivity to distortion. That is, it is ideal that each piezoresistance coefficient in equation (1) is zero. Therefore, we selected a silicon crystal plane that is easy to process, and selected a crystal plane that has a crystal orientation with a high sensitivity suitable for a diffusion strain gauge and a crystal orientation with a low sensitivity suitable for a resistance element used in an integrated circuit on the same plane. Various considerations were made. As a result, in the case of a p-type diffused layer, 1 exists in the (100) and (110) planes.
I found something to do. Table 1 is a table showing the relationship between crystal planes, crystal orientations, and piezoresistance, and is an example of data that typically shows the results of the above study. However, to obtain the data in Table 1, the specific resistance of the gauge is p-type 7.8Ω,
The basic constant of the hiezoresistive coefficient is π,, = 6.6
10-12cm'//dyn +π1゜=-1,I
X 10-' 2c? dyn, π44-138, IX
10'' cJ/dyn was used.

Table 1 Unit x 10-”'cn”/dyn As is clear from Table 1, in the Dlo) plane, the direction with the maximum sensitivity is the [111) axis direction, and the direction with the minimum sensitivity is the [1oo] axis direction. It is. It's 1 (1oe
), the direction with maximum sensitivity is [:110
) in the axial direction, the direction with the minimum sensitivity is [:100]
It is axial.

Similarly, an n-type diffusion layer was also studied.

As a result, it was found that it exists in the (110) plane. Table 2 shows example data showing the results.

However, the specific resistance of the gauge used in the study is 117ΩG1 The fundamental constant of the piezoresistance coefficient is π'n−102.2X i
0-12cm2/dyn.

π1゜= 53.4 X 10 '%m'/dyn, π
44 = -13,6
Table 2 In the unit Xl0-12GIrL'//dyn plane, the direction with the maximum sensitivity is the (100') axis direction, and the direction with the minimum sensitivity is the (111) axis direction.

The present invention has been made based on the results of such studies, and its features include an integrated semiconductor strain transducer in which a diffused strain gauge, a strain generating section, and an integrated circuit are formed on a silicon substrate. , a diffused strain gauge is placed in a crystal orientation with high sensitivity, a part of the entire neck of the integrated circuit is formed on the strain-generating part, and a diffused resistance element as a passive element used in the integrated circuit is placed in a direction with high strain sensitivity. This is because it is placed in the lowest crystal orientation.

Hereinafter, the present invention will be explained in detail with reference to embodiments shown in the drawings.

FIG. 3 shows an example used as a pressure transducer in the first embodiment of the present invention. A silicon substrate 11 in which an n-type epitaxial layer is grown to a thickness of about 10 μm on a p-type substrate of about 400 μm.
This shows the top view and cross-sectional conceptual diagram of the crystal plane (11
0) side. The strain-generating portion 4 forms a circular thin diaphragm with a thickness of 40 μm, and 5 is a fixed portion.

Diffusion strain gauges 21, 22 and 2!3. 24 is a p-type diffusion layer arranged at the center and periphery of the diaphragm, and its longitudinal direction is all selected to be the (1101) axis direction.In the case of this crystal plane, the maximum sensitivity direction is the [111] axis direction, Considering the effect of stress in the direction perpendicular to the current, the output when strain gauges 21, 22 and 2'3, 24 are configured as a Wheatstone bridge is (1101
It is larger in the axial direction. The fixed part 5 is formed with an integrated circuit 3 incorporating circuits for amplifying the voltage output from the wheat strike/bridge, temperature compensation, and output adjustment.

7 is an input/output electrode pad. Resistance elements 6a, 6b, etc. as passive elements in an integrated circuit
- In 61, all longitudinal directions are arranged in the [100) axis direction, which is the direction of minimum sensitivity.

In the third embodiment, as described above, the resistance elements 6a+6b,
. . . All the longitudinal directions of 61 are arranged in the [lOO] axis direction of the minimum sensitivity direction, and the resistive element 6c can be formed in the strain-generating portion, so there are problems with the prior art described above. (1) , (3) , , (/I) can be resolved.

Note that a part 6c of the resistive element of the integrated circuit is placed on the strain-generating portion 4,
It is formed so that its longitudinal direction is the [100) axial direction. Since the resistance element 6c has the minimum strain sensitivity, normal operation is possible even if it is formed using the blank space of the strain generating section 4.

FIG. 4 shows a second embodiment of the present invention, which is another example used as a pressure transducer. n on a p-type substrate of about 400 μm
This figure shows a conceptual top view and a cross-sectional view of a silicon substrate 11 on which a type epitaxial layer has been grown to a thickness of about 10 μm, and the crystal plane is a (100) plane.

The strain-generating portion 4 is rectangular and forms a thin diaphragm with a thickness of 20 μm. Diffusion strain gauge 21. 22 and (j
23. 24 ld p-type diffusion layer is arranged in the shape of a mouth near the periphery of the diaphragm, and its longitudinal direction is [110
:] Selected in the axial direction. The integrated circuit 3 is formed across a strain generating section 4 and a fixed section 5, and incorporates an analog amplifier circuit 31 and a digital conversion circuit 32, and outputs a digital output. Resistance elements 6a + 6b, 6b, 6 made in the integrated circuit
c, . . . 61 are arranged in the (100) axis direction.

According to the second embodiment, the problems (3) and (4) of the prior art can be solved by arranging the resistor elements formed in the integrated circuit in the direction of minimum sensitivity. Furthermore, since the resistive elements of the integrated circuit are arranged in the direction of minimum sensitivity, a part of them can be formed also on the strain-generating section 4, which has the advantage of enabling miniaturization and solving the problem (1).

FIG. 5 shows another example used as a strain transducer in the third embodiment of the present invention. This figure shows a conceptual top view and cross-sectional view of a silicon substrate 12 in which an n-type epitaxial layer is grown to a thickness of about 10 μm on a p-type substrate and then etched to a thickness of about 20 μm, and the crystal plane is the (100) plane. The strain-generating portion 4 is the entire substrate. Diffusion strain gauge 21. 22
23 and 24 are p-type diffusion layers arranged approximately in the center of the silicon substrate, and the longitudinal direction is selected to be the Cll0E axis direction.

Resistance elements 6a and 6b formed in the integrated circuit 3
.

......61's longitudinal direction is the [:100] axial direction with the minimum strain sensitivity 1! The resistance elements are arranged in the same direction to further reduce the distortion effect, so even if a slight change in resistance occurs, each resistance Assuming that the rate of change of the element is the same,
Each pair of resistors is designed to compensate for each other.

When the strain transducer of this embodiment is actually used, it is attached directly to the strain-generating member 8 to be measured using an organic adhesive such as epoxy or an inorganic adhesive such as low-melting glass. Stress components can be measured with high precision. This method is used for resistance wire strain gauges, which have been widely used in the past.
This method is similar to that used for metal foil strain gauges and semiconductor strain gauges. According to the third embodiment, problems (1), (3), and (4) of the prior art described above can be solved, and since the entire silicon substrate is used as a strain-generating part, it can be used as shown in FIG. , problem (2) can also be solved.

As described above in detail using the embodiments, according to the present invention, the problems of the prior art can be solved.

That is, the present invention makes it possible to fabricate an integrated circuit, which was conventionally made in a fixed part on a silicon substrate, also in a strain-generating part, thereby further promoting miniaturization. It is revolutionary in that it can be used as a strain gauge, not only downsized, but also capable of highly accurate stress measurement, and can be used as a conventional strain gauge without any changes, as well as being able to take out bolt-order or digital output. It has a great effect. In addition, if the integrated circuit of the present invention is formed on a fixed part at the periphery of a diaphragm in a similar application to a conventional pressure transducer, the fixed part may be deformed due to large stress or may be caused by adhesion to other parts. A highly stable semiconductor strain transducer can be provided in which the change in resistance value of a diffused resistance element as a passive element in an integrated circuit due to residual thermal stress is almost negligible, and there is no nonlinearity, hysteresis, thermal hysteresis, or change over time. It is.

[Brief explanation of drawings]

FIG. 1 is a conceptual plan view and cross-sectional view showing a first example of a conventional device, FIG. 2 is a conceptual plan view and cross-sectional view showing a second example of a conventional device, and FIG. 3 is a plan view showing a first embodiment of the present invention. 4 is a conceptual plan view and a cross-sectional view showing a second embodiment of the present invention, FIG. 5 is a conceptual plan view and a cross-sectional view showing a third embodiment of the present invention, and FIG. 6 is a conceptual view of a third embodiment. It is a conceptual diagram which shows the usage state of an example. 1 Pa°...Silicon substrate, 21-24...
・・・・・・Diffusion strain gauge, 3・・・・・・・・・
・Integrated circuit, 4...... Strain generating part, 5 ・
...Fixed part, 6a, ~61...
...Resistance element, 7... Electrode pad,
8... River... Strain member to be measured. Figure 1 01o] Figure 3 Figure 4

Claims (4)

[Claims] (1) A strain generating section, a diffusion strain gauge provided in the strain generating section, a bridge circuit constituted by the diffusion strain gauge, and an integrated circuit that processes the voltage output of the bridge circuit on a silicon single crystal substrate. In the semiconductor strain transducer, a part or all of the integrated circuit is formed on the strain-generating part, and the piezoresistive sensitivity is set in the longitudinal direction of the diffused passive resistance element built into the integrated circuit. A semiconductor strain transducer characterized by being arranged in the minimum crystal orientation. (2) The surface of the silicon single crystal substrate is a (110) or (Zoo) crystal plane, the diffused passive resistance element is a p-diffused diffusion layer, and the longitudinal direction thereof is arranged in the [100] crystal axis direction. A semiconductor strain transducer according to claim (1). (3) Claims characterized in that the plane of the silicon single crystal substrate is a (110) crystal plane, the diffused passive resistance element is an n-type diffusion layer, and the longitudinal direction thereof is arranged in the (111) crystal axis direction. The semiconductor strain transducer according to item (1). (4) The surface of the silicon single crystal substrate is a (110) crystal plane, and the diffused passive resistance element has a p-diffusion layer and an n-type diffusion layer, and the p-diffusion layer has a [100] and an n-type diffusion layer. The semiconductor strain transducer according to claim 1, wherein the diffusion layer is arranged in the (:]111 crystal axis direction.