JPS58134450A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To readily and efficiently obtain a resin-sealed semiconductor device by forming leads on a substrate of glass epoxy, securing a pellent to the leads, wiring the leads and then sealing them with the resin. CONSTITUTION:A through hole 27 is opened at the prescribed position of a rectangular substrate 26 made of glass epoxy plate, on both side surfaces of which copper foils are bonded, copper plating is performed on the inner surface of the hole 27 to connect the copper foils of both side surfaces, independent inner leads 12, outer leads 13 and connecting parts 13A of the leads 12, 13 are formed, thereby completing leads 15 which are then connected via connecting wirings 29. The leads 12 are covered in a strip shape with a resin film 20, and Au plating is performed on an Ni-base. Then, a recess 16 is formed at the center, punched grooves 31 are formed along the holes 27 at four peripheral sides, and a base 11 is supported at the part 32 by an outer periphery 33, the leads 13 are respectively isolated, and the wirings 29 are also cut, thereby completing a series package. Thereafter, a pellet is secured to the recess 16 by utilizing the hole 34 in a resin-sealed device by an automatic assembling. Since the package is simultaneously formed on the sole substrate, the manufacturing efficiency is higher than the case of ceramic and the steps of the manufacture can be facilitated.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a carrier package type semiconductor device.
The present invention relates to a semiconductor device that has a thinner package, lower cost, and easier packaging, and a method for manufacturing the same.

A carrier package type semiconductor device, generally referred to as a chip carrier, can be mounted directly on a circuit board for mounting, and the mounting can be completed by simply connecting the wiring terminals of the circuit board and the external connection terminals of the semiconductor device. Therefore, it is effective for facilitating mounting and reducing the thickness of the entire device in which the semiconductor device is mounted, and the demand for it is increasing.

Most of the conventional semiconductor iIMs of this type are carrier cages using ceramics, as shown in Figure 1 (■). This carrier package 1 has a concave @3 formed on the upper surface of a gear rear space 2 formed by, for example, a green process, and a semiconductor element (pellet) 4 is fixed to the inner bottom surface of the concave @3, and an inner lead extends from the periphery of the concave 3 to the back surface of the base. A lead 6 consisting of an outer lead for external connection is formed by means such as metallization, and the pellet 4 and the lead 6 are electrically connected with a wire 7, and then
It is sealed with a metal or ceramic cap 8.

However, since there is a limit to the reduction in the thickness of Green Dragon Lamic in this package, there is also a limit to the reduction in the thickness of PACE 2, which is formed by laminating it, and this is an obstacle to making the overall package thinner. Furthermore, since the above-mentioned green process involves multiple IKs, the entire package becomes a high μ road along with the ceramic material cost.

Furthermore, ceramics are commonly used as mounting boards for printed circuits such as glass epoxy materials.
:1 The coefficient of thermal expansion is significantly different from that of the substrate, so when a ceramic package is directly fixedly connected to this type of printed circuit board, the difference in coefficient of thermal expansion between the package and the printed circuit board will occur due to temperature changes. stress may occur and the connection may fail.

In addition, since the ceramic nut cages mentioned above are individually manufactured one by one, it is difficult to fully automate operations such as fixing the pellet 4 onto the paste 2, bonding the wire 7, and fixing the cap 8. That's funny. A further disadvantage is that the dimensions of the respective manufactured socket cages tend to vary, making automation even more difficult.

Therefore, a first object of the present invention is to provide a semiconductor device that can achieve the above-mentioned thinner semiconductor device and lower cost. A second object is to provide a semiconductor device that can be easily mounted on a commonly used printed circuit board, while also improving the (i) dimension.Furthermore, The purpose of @3 is
To provide a semiconductor device that can achieve manufacturing automation.

Furthermore, the fourth object of the present invention is to form a substrate KIJ-de made of a material such as glass epoxy, and seal it with a resin ring after fixing the pellet and wire bonding the pellet and the lead. It is an object of the present invention to provide a method for manufacturing a semiconductor device that can easily and efficiently manufacture the semiconductor device described above.

DESCRIPTION OF THE PREFERRED EMBODIMENTS A semiconductor device and a method for manufacturing the same according to the present invention will be described below based on illustrated embodiments.

FIGS. 2A and 2B are cutaway perspective views of the semiconductor device 10 of the present invention, and in the figures, C1l is a plate made of a glass epoxy plate. This glass epoxy board can be used as is, as it is normally used as a printed circuit board, and the conductive layers formed on both sides of the board can be etched as described later to form inner leads 12 and outer leads 1.
3 are formed, and leads 15 are formed by connecting these inner leads and outer leads with a connecting portion 14 formed by a through-hole method. In addition, a rectangular recess w16 is formed in the center of the upper surface of the paste 11 by cutting or the like, and a semiconductor element (pellet) 17 is formed on the inner bottom surface of the recess w16.
are fixed with adhesive etc. And pellet 17
The electrode pad and the inner lead 12 are connected with the wire 18, and then the pace 1 is connected by a method such as botting.
1 by the register 719 supplied on the pellet 17. The wire 18 and inner lead 12 are hidden and sealed. Of the leads 15, at least the inner leads 12 and outer leads 13 are plated with gold to facilitate connection of wires 18 and soldering during mounting. Further, the exposed lead portion (excluding the wire bonding portion) on the upper surface of the base 11 may be coated with a sleep-retaining resin 2o in advance.

As shown in FIG. 8, the semiconductor device having the above structure includes a conductive pattern 22 formed on an ordinary printed circuit board 21 made of glass epoxy, phenol, etc.
Mounting is completed by placing the outer leads 13 on top with the back side facing f, and connecting the outer leads 13 with the corresponding patterns to the poles 22&C directly mJ* using brazing material made of the same material.

Next, a method of manufacturing a semiconductor device having the above structure will be explained with reference to FIGS. 3-4-+1).

First, as shown on the four sides, a substrate 26 is prepared on which steel foils 24 and 25 are formed as conductive layers on each of the front and back surfaces (upper and lower surfaces) K of a glass epoxy plate 23. In this case, since a plurality (5) of packages are usually formed in multiple series at the same time, a strip-shaped substrate is used as the substrate 26. Note that in the following explanation, the manufacturing method will be explained focusing on one package.

Next, K (as shown in the figure, the lead 1 to be formed is 8 in the outer edge of the package P to be formed and
A number of through holes 27 corresponding to the number of leads are formed at positions on the substrate '26 that can be connected to the leads. C) As shown in the figure, electroless plating is performed on the inner peripheral surface of this through hole 27 to form a copper plating layer 28 as the connecting portion 14, and each of the upper and lower surfaces is coated with the copper plating layer 28. The copper foils 24 and 25 are heated so as to be electrically conductive. After that, as shown in Figure 0 and Figure 2, each steel foil 2 on the upper and lower surfaces of the plate 26 is
4.25 is photo-etched to form a plurality of independent inner leads 12 and outer leads 13. It goes without saying that photoetching involves etching copper using a photoresist pattern film formed by photoresist film formation, pattern exposure, and phenomenon. In addition, during this etching, the inner leads 12 on the surface are made into independent shapes, but the outer leads 13 are formed at the portions 13 outside the outer edge JC1'Ei of the package.
Each lead is electrically connected at A, and the outer leads of each package are also connected by a connecting line 29. As a result, each inner lead 1
2 are connected to each outer lead 13 via a steel plating layer 28 in a through hole 27, and each inner lead 12.
Through hole 27. Although the outer leads 13 constitute independent leads 15, all the leads 15 are in a conductive state in this state due to the outer lead shape and the connecting line 29VC described above.

After forming the leads 15 as described above, (as shown in Figure 0), a strip of anti-reflective resin 20 is formed on the middle band of the inner leads 12 on the upper surface of the substrate 26 by screen printing or the like. 20 may be carried out according to necessity, and the parts not coated with this protective resin 20 should be
In this step, Ni underplating and Au plating are performed. This plating is electroplating, and due to the conduction between the connecting wire 29 and the outer lead 13, all the leads can be plated by simply connecting the power to one lead.

Next, as shown in Fig. 0, the upper surface of the substrate 26, that is, the center part of the package, is counterbored into a rectangle slightly larger than the semiconductor element (pellet) to form a recess 16, and as shown in Fig. 0. A groove 31 is formed by punching out four sides along the outer edge of the package. Due to this groove 31, the package paste 11 to be formed is formed in the outer peripheral part (frame part) 33kJI by the four bridge parts 32 formed in the groove 31FMlk.
It is assumed to be in a suspended state. Therefore, by cutting the narrow bridging portion 32, the package paste 11 can be easily obtained. Further, since the inner edge of the groove 31 is along the through hole 27, the inside of the through hole 27 (gold plated steel plating layer 28) is exposed to the outer edge of the package base 11 due to the groove. At the same time, the groove 31 punches out the outer portion 13A of the outer lead 13, so (1) as shown in the figure, each actor lead 13 is separated (insulated), and the connecting wire 29 is also cut to connect each package. There will be no continuity.

By the above process, five package spaces 11 can be formed in multiple series on the 5*iB-shaped substrate 26 as shown in FIG. In the figure, 34 is a guide hole formed at the same time as the groove 31. This board 26 is assembled by an automatic assembly machine kf (not shown).
1 is loaded, and the following steps are performed.

That is, as shown in FIG. 5, a semiconductor element (bellet) 17 is fixed to the inner bottom surface of the recess 16 of the package base 11 with an appropriate adhesive, and then each inner tip of the inner lead 12 and the pellet 17 are bonded to each other. A wire 18. is inserted between the electrode pads.
Connect at. After that, for sealing,) vji, 19,
The 17° wire 18 and the inner lead 12 are hermetically sealed by dropping them onto the 17° wire 18 and the inner lead 12 by potting or the like. From this K, the assembly of each package base is completed, and by cutting the bridging portion 32 appropriately, the completed package can be separated from the frame portion 33, and each package can be obtained as an independent package.

Therefore, in this assembly, the assembly can be performed on the pace board 26 shown in FIG. 4 using the same process and equipment as for forming a package using a multiple lead frame, and automation of the assembly can be realized.

In addition, in the above manufacturing process, the power supply parts of each package are connected in parallel with each other at a common line, and this common line is left even after each outer lead and connection line is cut by the formation of the above-mentioned $131. By doing this, you can energize all packages at the same time by simply energizing a part of the common line after each package is completed. Bulk:
:'1:,,.

I can do things efficiently. Predetermined temperature and voltage.

After the aging process is completed, a second punching process is performed to cut the common part to configure each package as electrically independent (even in this case, each package is connected to the frame part 3 by the bridge part 32). (mechanical integration via the 2-way 2-way 2-way 2-way 2-way 2-way 2-way 2-way 3-way 2-way 2-way 3-way) allows each package to be tested both individually and integrally.

Therefore, since the semiconductor device of the present invention manufactured as described above uses a single substrate, the thickness of the entire device can be approximately the thickness of a scissors substrate, which is effective in reducing the thickness. In addition, since the number of doffs is small and high-priced materials are not used, it has the effect of being able to be produced at a low cost. Furthermore, since the device is made of the same material as a normal printed circuit board, the coefficient of thermal expansion is almost the same, and even if it is mounted directly on a printed circuit board, connection damage due to temperature changes may occur. do not have. Moreover, since it is not made of ceramic, it can be obtained with high dimensional accuracy.

In addition, according to the method for manufacturing a semiconductor device of the present invention, it is possible to simultaneously form several packages on a single substrate, thereby increasing the manufacturing efficiency of semiconductor devices compared to ceramic packages. In addition, each operation in the manufacturing process is facilitated, and dimensional accuracy management is also facilitated, so that manufacturing can be carried out efficiently.

Here, although glass epoxy is used as the substrate material in the above embodiment, polyester, polyimide, paper phenol, and triazine may also be used. In addition, the leads are gold plated to ensure wire bondability and solderability, but in some cases AJ
, Ag, or Ni plating may be applied.

Furthermore, when considering heat dissipation when increasing the integration density, or when manufacturing semiconductor devices that emphasize heat dissipation such as power ICs, copper foil During photoetching of step 25, (paste 11) of substrate 26
A photo-etching process is performed so that a copper foil separated from the outer lead remains in the area surrounded by the outer lead 13 on the back surface of the part that will become the paste 11, and a copper foil that will become the heat sink is formed on the back surface of the part that will become the paste 11. Thereafter, processes similar to those shown in FIG. A cross-sectional view of a semiconductor device manufactured by such a method is shown in FIG. In the figure, 30 is a copper foil serving as a heat sink. The parts indicated by other numbers are the same as those described in the explanation of FIG. 5 above.

Further, as described above, after the heat sink 30 is formed, the center of the package paste 11 made of a glass epoxy substrate is penetrated in a rectangular manner to expose a part of the heat sink 30.

Then, the semiconductor element 17 is placed on this exposed heat sink surface.
is fixed, and this element 17 and the inner lead 12 are connected with a wire 18, and this element 17. A resin 19 covering a portion of the wire 18 and the inner lead 12 is formed by potting. A cross section of a semiconductor device formed by such a method is shown in FIG. 7, and a back perspective view is shown in FIG. 8. In the figure, a semiconductor element 17 is mounted on a heat sink 30.
are connected, □ this semiconductor element 17 and inner lead 12
are connected by a wire 18. Then, the semiconductor element 17. A portion of the wire 18 and the inner lead 12 is covered with a resin 19. In such a method, the semiconductor element is directly connected to the steel foil, so that the heat dissipation characteristics are further improved.

In the above method for forming a heat sink, if the thickness is insufficient, the thickness may be increased by plating or overlapping other copper foils. Also, a steel plate may be used instead of the steel foil.

As described above, according to the semiconductor device of the present invention, leads are formed on a paste substrate made of glass epoxy or the like to form a package paste, and pellets are fixed to this paste and wire bonded. Since the semiconductor device is sealed with resin, it not only makes the semiconductor device thinner and lower in cost, but also makes it easier to mount it on commonly used printed circuit boards, while also improving dimensional accuracy. Moreover, it is possible to achieve automation of manufacturing by -1°.

Further, according to the manufacturing method of the present invention, the semiconductor device can be easily and efficiently manufactured.

[Brief explanation of the drawing]

Figure 1 is a cutaway perspective view of a conventional package, Figure 2 is a
(B) is a broken front perspective view and a back perspective view of the semiconductor device of the present invention, and Figures 3 (A) to (I) are process diagrams of the method of the present invention. , 13) , ■ is a front perspective view, (C) is a sectional view, (E), (1) is a back perspective view, Fig. 4 is a perspective view of the multiple state, and Fig. 5 is a cross section of the completed assembly state. 6 is a sectional view of another embodiment, FIG. 7 is a sectional view of still another embodiment, and 8'5A is a rear perspective view of the semiconductor device shown in FIG. 7. 10... Semiconductor device, 1,1... Noktu cage pace. 12...Inner lead, 13...Outer lead, 14
...Communication part, 15...Lead, 17...Bellet, 18...Wire, 19...Resin, 20...Maintenance resin, 26...Board, 27...Through hole ,
29... Connection JlI wire, 30... Steel plate, 31... Groove, 32... Bridge portion. Figure 1 Figure 2 (A) Figure 3 (D) (E) Figure 3 (F) Figure 3 (H) <1) IP 4 Figure 5 Figure 6

Claims (1)

[Scope of Claims] 1. A package paste made of glass epoxy or the like, a plurality of leads formed from the front surface to the back surface of the package paste, and a semiconductor fixed to the package paste and electrically connected to the leads. Motoko and a few (
A semiconductor device comprising an element and a resin for sealing an electrical connection between the element and a lead. 2. The lead is an inner lead formed on the base surface,
The semiconductor device according to claim 1, comprising an outer lead formed on the back surface of the base, and a through hole that penetrates the base and connects the inner lead and the outer lead. 3. The claim that the semiconductor element is fixed in a recess formed on the surface of the paste! The semiconductor device according to item 1 or 2. 4. The semiconductor device according to any one of claims 1 to 3, wherein the semiconductor element is electrically connected to the leads by wires connected between them. 5. Form a plurality of leads from the front surface to the back surface K of a package paste made of glass epoxy or the like, adhere a semiconductor element pellet to the surface of the package paste, and connect the pellet and the leads with electricity. 1. A method for manufacturing a semiconductor device, which comprises connecting the pellets and connecting portions with resin. 6. For the leads, conductive foils previously formed on the front and back surfaces of the package paste are etched to form inner leads and outer leads, and a conductive plating layer is formed in the through holes formed in the package paste. A method of manufacturing a semiconductor device according to claim 5, wherein the semiconductor device is made conductive. 7. The leads are formed so that each lead is in a conductive state during etching, and after completion of plating, the conductive portion is removed to make each lead in an insulating state. A method for manufacturing a semiconductor device according to paragraph 1. 8. The package base is formed by integrally forming multiple pieces in series%W! A method for manufacturing a semiconductor device according to any one of items 5 to 7 in which the range of fd is determined.