JPS5748237A - Manufacture of 2n doubling pattern - Google Patents

Manufacture of 2n doubling pattern

Info

Publication number
JPS5748237A
JPS5748237A JP12325280A JP12325280A JPS5748237A JP S5748237 A JPS5748237 A JP S5748237A JP 12325280 A JP12325280 A JP 12325280A JP 12325280 A JP12325280 A JP 12325280A JP S5748237 A JPS5748237 A JP S5748237A
Authority
JP
Japan
Prior art keywords
pattern
sio2 film
original pattern
substrate
original
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12325280A
Other languages
Japanese (ja)
Inventor
Yukinori Kuroki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP12325280A priority Critical patent/JPS5748237A/en
Publication of JPS5748237A publication Critical patent/JPS5748237A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
    • H10P76/20—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials

Landscapes

  • Drying Of Semiconductors (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Non-Volatile Memory (AREA)
  • Preparing Plates And Mask In Photomechanical Process (AREA)
  • Diffracting Gratings Or Hologram Optical Elements (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)

Abstract

PURPOSE:To form a minute 2n doubling pattern, by a method wherein an original pattern with a vertical edge is provided on a substrate by photoetching to form SiO2 film patterns on both sides of the original pattern followed by removing the original pattern to form doubly-increasing patterns for repeating the same process. CONSTITUTION:A resist pattern 2 is formed on an Si substrate 1. An original pattern 3 is provided by performing etching to make an edge vertical to the surface of the substrate. Said substrate is thermally oxidized for covering the surface with an SiO2 film 4. An anisotropic etching is performed to the SiO2 film 4 so much as to correspond to the thickness of the SiO2 film only in the verical direction to the surface of the substrate thus leaving the SiO2 film only on the surface of the original pattern 5. Resist 7 is applied and the resist is removed until the original pattern 5 and the surface of the remaining SiO2 film 6 are exposed followed by removing the original pattern 5 to obtain the SiO2 film pattern 6 doubling the original pattern. In the same way the pattern is increased repeatedly, whereby enabling to form a minute pattern with no technical burden.
JP12325280A 1980-09-05 1980-09-05 Manufacture of 2n doubling pattern Pending JPS5748237A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12325280A JPS5748237A (en) 1980-09-05 1980-09-05 Manufacture of 2n doubling pattern

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12325280A JPS5748237A (en) 1980-09-05 1980-09-05 Manufacture of 2n doubling pattern

Publications (1)

Publication Number Publication Date
JPS5748237A true JPS5748237A (en) 1982-03-19

Family

ID=14855964

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12325280A Pending JPS5748237A (en) 1980-09-05 1980-09-05 Manufacture of 2n doubling pattern

Country Status (1)

Country Link
JP (1) JPS5748237A (en)

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02121692A (en) * 1988-10-31 1990-05-09 Juki Corp Thread cutter for sewing machine with horizontal bobbin case
JPH0621340A (en) * 1986-12-05 1994-01-28 Oki Electric Ind Co Ltd Manufacture of semiconductor device
KR100816754B1 (en) 2006-10-10 2008-03-25 삼성전자주식회사 Pattern Forming Method of Semiconductor Device
JP2008511991A (en) * 2004-09-01 2008-04-17 マイクロン テクノロジー，インコーポレイテッド Mask material conversion
JP2008546186A (en) * 2005-05-23 2008-12-18 マイクロン テクノロジー， インク． Method for forming an array of small, narrow space components
JP2009507375A (en) * 2005-09-01 2009-02-19 マイクロン テクノロジー， インク． Mask pattern having spacers for increasing pitch and method for forming the same
US7521348B2 (en) 2006-10-23 2009-04-21 Samsung Electronics Co., Ltd. Method of fabricating semiconductor device having fine contact holes
JP2009099792A (en) * 2007-10-17 2009-05-07 Toshiba Corp Manufacturing method of semiconductor device
JP2009536787A (en) * 2006-05-10 2009-10-15 ラム リサーチ コーポレーション Pitch reduction
JP2010511306A (en) * 2006-11-29 2010-04-08 マイクロン テクノロジー， インク． Method for reducing the critical dimension of a semiconductor device and semiconductor device having a reduced critical dimension that is partially fabricated
US9666695B2 (en) 2007-12-18 2017-05-30 Micron Technology, Inc. Methods for isolating portions of a loop of pitch-multiplied material and related structures
US9679781B2 (en) 2005-09-01 2017-06-13 Micron Technology, Inc. Methods for integrated circuit fabrication with protective coating for planarization
US10396281B2 (en) 2005-09-01 2019-08-27 Micron Technology, Inc. Methods for forming arrays of small, closely spaced features
US10515801B2 (en) 2007-06-04 2019-12-24 Micron Technology, Inc. Pitch multiplication using self-assembling materials

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4211582A (en) * 1979-06-28 1980-07-08 International Business Machines Corporation Process for making large area isolation trenches utilizing a two-step selective etching technique
JPS56112734A (en) * 1980-02-12 1981-09-05 Chiyou Lsi Gijutsu Kenkyu Kumiai Formation of infinitesimal pattern

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4211582A (en) * 1979-06-28 1980-07-08 International Business Machines Corporation Process for making large area isolation trenches utilizing a two-step selective etching technique
JPS56112734A (en) * 1980-02-12 1981-09-05 Chiyou Lsi Gijutsu Kenkyu Kumiai Formation of infinitesimal pattern

Cited By (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0621340A (en) * 1986-12-05 1994-01-28 Oki Electric Ind Co Ltd Manufacture of semiconductor device
JPH02121692A (en) * 1988-10-31 1990-05-09 Juki Corp Thread cutter for sewing machine with horizontal bobbin case
JP2008511991A (en) * 2004-09-01 2008-04-17 マイクロン テクノロジー，インコーポレイテッド Mask material conversion
JP2008546186A (en) * 2005-05-23 2008-12-18 マイクロン テクノロジー， インク． Method for forming an array of small, narrow space components
US10396281B2 (en) 2005-09-01 2019-08-27 Micron Technology, Inc. Methods for forming arrays of small, closely spaced features
JP2009507375A (en) * 2005-09-01 2009-02-19 マイクロン テクノロジー， インク． Mask pattern having spacers for increasing pitch and method for forming the same
US9679781B2 (en) 2005-09-01 2017-06-13 Micron Technology, Inc. Methods for integrated circuit fabrication with protective coating for planarization
JP2009536787A (en) * 2006-05-10 2009-10-15 ラム リサーチ コーポレーション Pitch reduction
KR100816754B1 (en) 2006-10-10 2008-03-25 삼성전자주식회사 Pattern Forming Method of Semiconductor Device
US7521348B2 (en) 2006-10-23 2009-04-21 Samsung Electronics Co., Ltd. Method of fabricating semiconductor device having fine contact holes
JP2010511306A (en) * 2006-11-29 2010-04-08 マイクロン テクノロジー， インク． Method for reducing the critical dimension of a semiconductor device and semiconductor device having a reduced critical dimension that is partially fabricated
US8338304B2 (en) 2006-11-29 2012-12-25 Micron Technology, Inc. Methods to reduce the critical dimension of semiconductor devices and related semiconductor devices
US8836083B2 (en) 2006-11-29 2014-09-16 Micron Technology, Inc. Methods to reduce the critical dimension of semiconductor devices and related semiconductor devices
US10515801B2 (en) 2007-06-04 2019-12-24 Micron Technology, Inc. Pitch multiplication using self-assembling materials
JP2009099792A (en) * 2007-10-17 2009-05-07 Toshiba Corp Manufacturing method of semiconductor device
US9666695B2 (en) 2007-12-18 2017-05-30 Micron Technology, Inc. Methods for isolating portions of a loop of pitch-multiplied material and related structures
US9941155B2 (en) 2007-12-18 2018-04-10 Micron Technology, Inc. Methods for isolating portions of a loop of pitch-multiplied material and related structures
US10497611B2 (en) 2007-12-18 2019-12-03 Micron Technology, Inc. Methods for isolating portions of a loop of pitch-multiplied material and related structures

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