JPH03173226A - Channel selection tuning circuit - Google Patents

Abstract

PURPOSE:To prevent generation of channel selection disabled operation by using an initial setting tuning voltage and an optimum tuning voltage for each point of time in existence between optimum tuning voltages fluctuated in accordance with a condition change to apply channel selection. CONSTITUTION:When a device is operated, the local oscillation frequency of a tuner 2 is fluctuated due to various causes and a channel selection microcomputer 4 receiving information from an AFC circuit generates an optimum tuning voltage 7b at that point of time to correct the fluctuation and keeps the optimum tuning frequency by using the voltage 7b. The optimum tuning voltage 7b at that time is written in a 2nd electronic memory element 6b of a storage means 6. Then since the optimum tuning voltage at that point of time exits between an initial setting tuning voltage 7a and the optimum tuning voltage 7b written in the electronic memory elements 6a, 6b of the storage means 6, the normal channel selection is attained by executing the channel selection between the tuning voltages 7a, 7b.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to a tuning circuit for a radio receiving device such as a television receiver.

[Prior Art] Fig. 2 is a block diagram showing the configuration of a conventional voltage combining system tuning circuit. (3) is intermediate frequency amplification and modulation wave 4! The A circuit (4) is a microcomputer for tuning, and the F upper intermediate frequency amplification and modulated wave demodulation circuit (3
) also includes an intermediate frequency discrimination circuit, and applies its discrimination output to the channel selection microcomputer (4).

(5) is a channel selection operation unit, for example, a non-locking type pushbutton switch or a keyboard switch;
This also includes those with remote control maneuvers.

(8) is a storage means, which is usually composed of multiplex memory elements F, and digitally stores the tuning voltage. (7
) is a tuning voltage from the tuning microcomputer (4), and a smoothed DC voltage is applied to the tuner (2).

(8) is a demodulated signal output terminal, which supplies the signal to a subsequent amplifier circuit (not shown) to produce a predetermined output as audio or video.

Next, the operation of the above configuration will be explained.

One channel selection microcomputer (4) is activated by operating the channel selection operation section (5).
The tuning voltage (
7) is applied to the tuner (2). This tuner (2)
A signal is supplied to the receiving antenna (1), and the tuning frequency is changed by applying the tuning voltage (7) to complete the selection of a predetermined signal. Along with this,
When the operation of the above-mentioned tuning operation section (5) is completed, the tuning tuning voltage (7) is written into the storage means (6) consisting of an electronic memory element according to the instruction from the microcomputer (4) for one tuning, and the tuning is performed. Complete the synchronization operation.

Usually, there is more than one signal, so by repeating the above tuning operation, the tuning operation for a plurality of stations is performed.

This kind of tuning tuning operation is called tuning preset operation.1
The user of the device incorporating the tuning tuning circuit then performs a predetermined tuning operation by arbitrarily selecting a desired station by operating the tuning operation section (5), and then adjusts the tuning voltage (7 ) in the storage means (6).

Then, during the reselection operation, the tuning voltage (7) stored in the storage means (6) is read out, and the tuning voltage (7) is applied to the tuner (2).
By applying a voltage to the applied voltage, a tuning frequency corresponding to the applied voltage is oscillated to perform tuning.

At this time, since the tuning frequency is not necessarily the optimal tuning frequency, the automatic frequency control circuit (hereinafter referred to as AFC)
(referred to as a circuit) to match the optimum tuning frequency.

[Problem 8 to be solved by the invention] The conventional tuning circuit is configured as described above, and the optimal tuning tuning frequency at the time of reselection is tracked by the AFC circuit, and the tuning voltage corresponding to the tuning frequency is applied to the tuner. Although it is possible to reduce the drift of the tuner's local oscillation frequency by applying a There was a problem in that it was not possible to prevent the inability to select a channel due to this.

In other words, the cause of the tuner's local oscillation frequency drift is:
There are many factors such as temperature, humidity, voltage, vibration, etc., and there is a transient state of channel selection operation, that is, when the control loop of the AFC circuit is interrupted and then shifts to loop formation operation again.
If the drift of the tuner is large, the loop will be out of the range of retracting operation, and a predetermined loop may not be formed.

As a result, there was a problem in which the tuner could not be selected. This invention was made to solve the above-mentioned problems. It is an object of the present invention to provide a tuning circuit that can prevent such problems.

[Means for Solving the Problems] A tuning circuit according to the present invention includes an initial setting tuning voltage,
The present invention is characterized in that the optimum tuning voltage that fluctuates with subsequent changes in conditions is stored, and the channel selection operation is performed using the optimum tuning voltage existing between these two voltages at each point in time.

[Operation] According to the present invention, in the reselection operation, the tuning operation is performed to find the optimum tuning voltage that exists between the initial setting tuning voltage and the optimum tuning voltage that has changed due to subsequent changes in conditions.

Even if the tuner drifts, it is possible to perform normal channel selection without becoming unable to select a channel.

[Embodiment of the Invention] Hereinafter, an embodiment of the present invention will be described based on the drawings.

FIG. 1 is a block diagram showing the configuration of a tuning circuit according to an embodiment of the present invention.
) and (8) are the same as the conventional example shown in FIG. 2, and the corresponding parts are given the same reference numerals and detailed explanation thereof will be omitted.

Regarding the first cause, the difference from the conventional example shown in Fig. 2 is as follows.
Storage means (6) include first and second electronic memory elements (E
la) and (6b), the first electronic memory element (6a) stores the initial setting tuning voltage (7a), and the second electronic memory element (8b) tracks the optimum tuning frequency as conditions change. It is configured to memorize the changed optimum tuning voltage (7b).

Next, the operation of the above configuration will be explained.

In the initial setting, the tuning voltage (7) for instructing the tuning microcomputer (4) to select a predetermined signal is applied to the tuner (2) by operating the tuning operation unit (5). The process until the initial setting tuning voltage (7) is written into the first electronic memory element (6a) of the storage means (6) is the same as the conventional example, and the number of bits at this time is the usual number including 2 bits of band selection information. It is 16 bits.

When the device operates, the tuner (
2), the local oscillation frequency drifts, and upon receiving information from the AFC circuit, the tuning microcomputer (4) generates the optimal tuning voltage (7b) at that time to correct the drift. ,
This voltage (7b) maintains the optimum tuning frequency. The optimum tuning voltage (7b) at this time is the second
electronic memory element (6b).

Then, during the reselection operation, the storage means (6) is connected to the first and second electronic memory elements (6a).

Initial setting tuning voltage (7a) written in (6b)
Since the optimum tuning voltage at that time exists between the above-mentioned optimum tuning voltage (7b), both of these tuning voltages (7a),
By performing the channel selection operation between (7b), a normal channel selection operation can always be performed.

Incidentally, since fluctuations in the local oscillation frequency of the tuner (2) occur due to various factors as described above, the optimum tuning voltage (7b) varies considerably depending on the conditions at the time.

Therefore, since the information written in the second electronic memory element (6b) always needs to be written so as to maximize (7a) - (7b) I, the previously stored tuning voltage ( 7b) and the voltage currently applied to tuner (2), + (7a) - (7
b) The tuning voltage that increases I is the optimal tuning voltage (7b)
The microcomputer (4) operates so as to fill in the second electronic memory element (6b).

In this way, the difference between the above two mold pressures (?a) and (7b) for the second electronic memory element (6b), that is, (7a)
−(7b), by writing tC
The number of bits can be reduced.

In the above embodiment, the first electronic memory element (6a) and the second electronic memory element (6b) of the storage means (6) are described separately, but depending on the setting of the memory capacity, one storage It is also possible to integrate it into means (8), and
One electronic memory element (8b) is connected to a channel selection microcomputer (4
), and the same effect as in the above embodiment can be achieved.

Furthermore, the tuning circuit of the present invention can be applied not only to television receivers but also to radios, VTRs, and the like.

[Effects of the Invention] As described above, according to the present invention, it is possible to fundamentally prevent the inability to tune a tune due to drift in the local oscillation frequency of the tuner, and also to reduce tuner drift. The tuner can be constructed at low cost by relaxing the design and production constraints of the tuner that have been conventionally applied.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of a tuning circuit according to an embodiment of the present invention, and FIG. 2 is a block diagram showing the configuration of a conventional tuning tuning circuit. (2)...Tuner, (4)...Buifun for channel selection,
(5)...Tuning selection operation unit, (6)...Storage means, (8
a)...first electronic memory element, (6b)...second
electronic memory element, (7a)j7b)...tuning voltage. Note that the same reference numerals in the figures indicate the same or matching parts.

Claims (1)

[Claims] (1) Equipped with a tuner, a tuning operation section, and a tuning microcomputer that changes the tuning frequency by applying a tuning voltage to the tuner to select a predetermined signal as the tuning operation section is operated. In the tuning circuit, the first storage means stores the initial setting tuning voltage, and the second storage means stores the optimal tuning voltage changed by tracking the optimal tuning frequency as the conditions change. What is claimed is: 1. A tuning circuit comprising: a tuning circuit configured to perform a tuning operation using an optimal tuning voltage existing between the first storage voltage and the second storage voltage at each point in time;