JP4277169B2 - Power semiconductor module - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a power semiconductor module such as an IGBT (Insulated Gate Bipolar Transistor).
[0002]
[Prior art]
FIG. 10 shows a main circuit diagram of the inverter.
1 is a commercial AC power source, 2 is a diode rectifier module that converts AC to DC, 3 is a capacitor with a large capacity, 4 is a load such as a motor, and 5 is an inverter module that is made of a power semiconductor and converts DC to AC. . In the inverter module 5, 6 is an IGBT, and 7 is a diode connected in reverse parallel thereto, and these are configured by 6 circuits (6 arms). Inverter module 5 usually has two upper and lower arms as one set or six elements as one set. When configuring an inverter, three modules with two elements are connected in parallel, or six elements are included. The thing is used as it is.
[0003]
FIG. 11 shows a general external view of an inverter module containing two elements. 8 is a DC positive power supply potential output electrode (P output electrode), 9 is a negative power supply potential output electrode (N output electrode), 10 is an output electrode connected to the load side (U output electrode), 11, 12, Reference numerals 13 and 14 denote gate terminals and emitter terminals of the upper arm side and lower arm side IGBTs.
[0004]
FIG. 12 shows a schematic cross-sectional view of a module with two elements.
15 is a copper base substrate, 16 is a ceramic substrate for insulation, 17, 18 and 19 are copper patterns for wiring and semiconductor chip connection, and 20 and 21 are IGBT chips with upper and lower arms (actually FWD chips are also mounted) , 22 and 23 are electrodes for connecting the semiconductor chip and the copper pattern, and 24, 25 and 26 are copper electrode bars for connecting the copper patterns and the output electrodes P, U and N, respectively.
[0005]
FIG. 13 shows an equivalent circuit of inductance components in the module of FIG.
27 is the inductance L1 between the upper arm side collector and the positive power supply potential output electrode, 28 is the inductance L2 between the emitter of the upper arm and the connection point 29 (copper pattern 18 and copper electrode bar 25), and 30 is the connection point 29 and lower Inductances L3 and L31 between the arm side collectors are inductances L4 between the lower arm side emitter and the negative power supply potential output electrode.
[0006]
In the inverter circuit of FIG. 10, the IGBT is generally operated by switching at about 10 kHz. At that time, the surge voltage V _{CE (peak)} applied between the collector and the emitter of the IGBT chip when the IGBT is turned off is expressed by the following equation.
V _{CE (peak)} = Ed + (LI + L2 + L3 + L4) · di / dt (1)
Ed: Voltage of capacitor 3 (DC voltage)
di / dt: IGBT current change rate at turn-off.
FIG. 14 shows the voltage V _CE and I _C waveform of the IGBT when the IGBT is turned off.
The surge voltage component ΔV from the DC voltage Ed is caused by the values of LI to L4. If the values of LI to L4 are large from the above equation (1), the peak voltage value applied to the IGBT chip at the time of turn-off increases. It is required having a high voltage withstand capability to the FWD (free wheel diode) chips connected to the IGBT chip and parallel. A chip having a high withstand voltage usually has a problem that the chip area becomes large, leading to an increase in size and cost of the module. Also, if the surge voltage is high, the noise brought to the outside increases, which causes malfunction of the external device.
Therefore, a technique for reducing inductance by arranging the first and second wiring patterns connected to the first and second power supply terminals close to each other has been proposed (see, for example, Patent Document 1). .
[0008]
[Patent Document 1]
Japanese Patent No. 2725952 (page 4-5, FIG. 1)
[0009]
[Problems to be solved by the invention]
However, the above proposed technique focuses only on the portions L1 and L4 in FIG. 13, and the portions L2 and L3 remain as they are, so that a surge voltage is generated in these portions during switching.
Accordingly, an object of the present invention is to further reduce the surge voltage and reduce the size and price of the module.
[0010]
[Means for Solving the Problems]
In order to solve such a problem, in the invention of claim 1, a plurality of power semiconductor elements and diodes connected in antiparallel to the elements are connected in series as one arm, or a plurality of these are further connected in parallel. In the power semiconductor module configured to be connected to
The first power supply potential output electrode connected to the copper pattern having the same potential as the collector of the upper arm element, the upper arm element and the diode are connected in parallel, and are connected to the copper pattern having the same potential as the collector of the lower arm element. A load electrode bar and a second power supply potential output electrode for connecting the lower arm element and the diode in parallel are provided, and the upper arm element of the load electrode bar and the diode and the collector of the lower arm element are connected to the copper pattern of the same potential. In this portion, the first power supply potential output electrode, the load electrode bar, and the second power supply potential output electrode have a laminate structure with an insulator interposed therebetween .
[0013]
DETAILED DESCRIPTION OF THE INVENTION
FIG. 1 is a block diagram showing an embodiment of the present invention. The figure (a) is a top view, The figure (b) is a perspective view (bird's-eye view).
This is because the P electrode bar 32 connected to the collector potential of the P output electrode 8 and the upper arm IGBT, the emitter potential of the upper arm IGBT, the collector potential of the lower arm IGBT, and the U electrode bar 33 connected to the U output electrode 10. And the emitter potential of the lower arm IGBT and the N electrode bar 34 connected to the N output electrode 9 are overlapped to form a plate shape like a laminate structure and arranged closely (close). However, since electrical insulation is required between the electrode bars, an insulator is sandwiched as shown by the dotted line in FIG. With this configuration, the current when the IGBT or FWD is switched flows in the overlapping portion of the electrode bars 32, 33 and 34 on the opposite side, so that the inductance value at that time is set to almost zero. Can do.
[0014]
FIG. 2 shows an equivalent circuit diagram of FIG.
For example, when the upper arm IGBT is turned on in FIG. 1A, the current flows from the P output electrode 8 through the P electrode bar 32 to the copper pattern having the same potential as the collector of the upper arm IGBT. It flows to the U output electrode 10 via the U output electrode bar 33 connected to the emitter. At this time, the currents are the portions where the electrodes 32 and 33 overlap, and the same currents flow in opposite directions. Since the rate of change of the current is very small, there is no need to consider the inductance value at all. However, at the turn-off time when the rate of change of current that is affected by the inductance value is large, currents of the same magnitude are in opposite directions. By flowing, the action of canceling out the magnetic field generated from each electrode occurs, and the inductance value becomes almost zero. The same applies to the lower arm IGBT. That is, as shown in FIG. 2, the inductances of L1 and L2 (electrodes 32 and 33) and L3 and L4 (electrodes 33 and 34) cancel each other.
[0015]
FIG. 3 shows a reference example of the present invention. The figure (a) is a top view, The figure (b) is a perspective view (bird's-eye view).
This is because each electrode is formed in a plate shape like a laminate structure, and an electrode bar 35 for connecting the U output electrode 10, the emitter potential of the upper arm IGBT, and the collector potential of the lower arm IGBT as shown in the figure. The P electrode bar 36 and the N electrode bar 37 are individually overlapped and arranged in close contact with each other. As a result, since the current when the IGBT or FWD is switched flows in the overlapping portion of the electrode bars 35 and 36 and the electrode bars 35 and 37, the inductance value at that time becomes almost zero.
FIG. 4 shows an equivalent circuit diagram of FIG. L1 and L2 (inductance of the portion where the electrodes 35 and 36 overlap) and L3 and L4 (inductance of the portion where the electrodes 35 and 37 overlap) cancel each other.
[0016]
By the way, in the conventional semiconductor module, since the P-side output electrode and the N-side output electrode are separated from each other, as shown in FIG. 15, the connection between the output electrode portion and the external wiring is a plate-like shape like a laminate wiring. Cannot be connected (see the dotted line in FIG. 15). As a result, inductance is generated in this portion. In FIG. 15, 3 is a large-capacitance capacitor, 38 is a positive potential wiring bar, 39 is a negative potential wiring bar, 40 is a six-element semiconductor module, and 41 is a cooling radiator.
FIG. 16 shows an equivalent circuit including the inside of the module with the configuration of FIG. In FIG. 16, the inductances La, Lb and Lc, Ld can be made almost zero by using a plate-like proximity wiring, but the inductance values Le, Lf (Le≈Lf = about 10 nH) of the connection portion between the output electrode portion and the external wiring. Will remain, and a surge voltage will be generated as described in the above equation (1).
[0017]
FIG. 5 shows another embodiment that addresses such problems. FIG. 5A is a perspective view and FIG. 5B is a cross-sectional view.
As shown in FIG. 5 (a), the P-side output electrode 42 and the N-side output electrode 43 of the module 40 are each formed in a plate shape like a laminate structure, and a certain spatial distance is given as shown. They are separated and arranged in parallel.
As shown in FIG. 5B, the inside of the module 40 is configured such that the electrode 42 (P side) and the electrode 43 (N side) are wired in a plate shape with an insulator 44 interposed therebetween. Here, an example is shown in which the electrode 43 (N side) is connected to the emitter side of the lower arm side IGBT chip 46 and the electrode 42 (P side) is connected to the copper pattern 48 having the same potential as the collector of the upper arm side IGBT chip 47. .
In FIG. 5, the output portion of the electrode is formed horizontally with respect to the module, but it can also be formed vertically as shown in FIG.
[0018]
FIG. 7 shows an application example of FIG. FIG. 7A is a perspective view and FIG. 7B is a cross-sectional view.
As is clear from FIGS. 7A and 7B, the external electrode wiring bar 38, in which two pieces are arranged close to each other in a plate shape between the P-side output electrode 42 and the N-side output electrode 43 of the module 40, 39 is inserted, and the P side and the N side are brought into contact with each other to be electrically short-circuited.
As a result, the inductance value of the coupling portion between the P-side output electrode portion of the module and the external electrode wiring bar becomes almost zero, and the surge amount is (Le + Lf) · di / dt≈0. Therefore, the voltage applied to the IGBT can be reduced to about 100 V compared to the conventional method.
[0019]
FIG. 8 shows another application example of FIG.
In FIG. 7, the electrodes 42, 38, 39, and 43 are fixed by screws 49 while being electrically short-circuited only by contact. However, in order to electrically insulate the P-side electrode and the N-side electrode, the screw 49 is an insulator.
FIG. 9 shows an example of using a conductor screw as a cross-sectional view. That is, instead of using the screw 49 as an insulator, the conductor screw is coated with the insulator 50 to achieve electrical insulation.
[0020]
【The invention's effect】
According to the present invention, since the surge voltage generated when the IGBT and FWD are switched can be further reduced, it is possible to use IGBT and FWD having a low voltage rating, and to configure a small and inexpensive power semiconductor module. Can do. As a result, the amount of noise that affects external devices can also be reduced.
[Brief description of the drawings]
FIG. 1 is a block diagram showing an embodiment of the present invention. FIG. 2 is an equivalent circuit diagram of FIG. 1. FIG. 3 is a block diagram showing a reference example of the present invention. ] another configuration diagram showing an embodiment of FIG. 6 is a block diagram showing a modified example of FIG. 5 FIG. 7 is a configuration diagram showing a first application example of FIG. 5 [8] Figure 5 of the present invention the FIG. 9 is a sectional view showing a modification of FIG. 8. FIG. 10 is a general inverter main circuit diagram. FIG. 11 is a general inverter module external view. Module cross-sectional schematic diagram [Fig. 13] Module internal equivalent circuit diagram [Fig. 14] IGBT turn-off waveform diagram [Fig. 15] Wiring structure example diagram of inverter module and external electrode [Fig. 16] Fig. 15 Equivalent circuit diagram [Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 ... AC power source, 2 ... Diode rectifier module, 3 ... Large capacity capacitor, 4 ... Motor (load), 5 ... Inverter module, 6 ... IGBT (insulated gate bipolar transistor), 7 ... Diode, 8, 42 ... P output electrode, 9, 43 ... N output electrode, 10 ... U output electrode, 11, 13 ... gate terminal, 12, 14 ... emitter terminal, 15 ... copper base substrate, 16 ... ceramic substrate, 17, 18, 19 , 48 ... Copper pattern, 20, 21, 46, 47 ... IGBT chip, 22, 23 ... Connection electrode, 24, 25, 26 ... Copper electrode bar, 27, 28, 29, 30, 31, ..., Inductance, 32, 33, 34, 35, 36, 37 ... electrode bar, 38, 39 ... external electrode wiring bar, 40 ... power semiconductor module, 41 ... radiator, 44, 45 ... insulator, 49 ... screw, 5 ... insulating material.

Claims (1)

In a power semiconductor module configured by connecting a plurality of power semiconductor elements and diodes connected in reverse parallel to the elements as a single arm, or a plurality of these connected in parallel,
The first power supply potential output electrode connected to the copper pattern having the same potential as the collector of the upper arm element, the upper arm element and the diode are connected in parallel, and are connected to the copper pattern having the same potential as the collector of the lower arm element. A load electrode bar and a second power supply potential output electrode for connecting the lower arm element and the diode in parallel are provided, and the upper arm element of the load electrode bar and the diode and the collector of the lower arm element are connected to the copper pattern of the same potential. The power semiconductor module is characterized in that the first power supply potential output electrode, the load electrode bar, and the second power supply potential output electrode have a laminate structure with an insulator interposed therebetween.

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