JP3257277B2 - High side switch circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a low on-resistance high-side switch circuit for, for example, a vehicle.

[0002]

2. Description of the Related Art A high-side switch circuit operates by raising the gate potential of a high-side switch or a high-side MOS transistor of an H-bridge to (power supply voltage + threshold) or more. Since the on-resistance of a MOS transistor decreases as the voltage applied to the gate increases, a voltage as high as possible is required to reduce the on-resistance. Therefore, a booster circuit that performs high-efficiency boosting for a given power supply voltage is required. When supplying the power supply voltage to the booster circuit, it is necessary to add a protection circuit as a measure against a surge voltage higher than the maximum rated power supply voltage.

FIG. 6 shows a first conventional example of a high-side switch circuit having such a surge voltage protection function that is higher than the maximum rated power supply voltage. A booster circuit 10 is provided which receives a power supply voltage from the power supply voltage line 5 and boosts the gate voltage of the high-side MOS transistor 9 in the high-side switch or H-bridge. Booster circuit 1
0 is connected to the oscillator 1, the capacitor 2, the first diode 3 connected to the path for supplying electric charge from the power supply voltage line 5 to the capacitor 2, and to the path for transferring electric charge from the capacitor 2 to the gate of the MOS transistor 9. It is composed of a second diode 4. A surge protection MOS transistor 6 is connected between the power supply voltage line 5 and the booster circuit 10 as a measure against a surge voltage exceeding the maximum rated power supply voltage. A resistor 7 is connected between the power supply voltage line 5 and the gate of the surge protection MOS transistor 6, and a switching MOS transistor 8 is connected between the gate and the ground potential. The output terminal of a surge voltage detection circuit 11 for detecting a surge voltage higher than the maximum rated power supply voltage is connected to the gate of the switching MOS transistor 8. The surge voltage detection circuit 11 is, for example, disclosed in
FIG. 7 disclosed in US Pat.
In FIG. 7, a diode 111 is connected to a power supply voltage line 5.
, Two resistors 112 and 113 are connected in series. By comparing the voltage value divided by the two resistors 112 and 113 with the reference voltage 115 by the comparator 114, a surge voltage higher than the maximum rated power supply voltage is generated when an input higher than a certain set value is input to the comparator 114. Is to be determined. In the conventional high-side switch circuit, the charge supplied from the power supply voltage line 5 to the capacitor 2 through the surge protection MOS transistor 6 and the first diode 3 in the booster circuit 10 is continuously supplied by the oscillator 1 through the second diode 4. The gate potential of the MOS transistor 9 is boosted in one direction. When a surge voltage higher than the maximum rated power supply voltage is applied, the detection signal output from the surge voltage detection circuit 11 causes the switching MOS transistor 8
Is turned on and the surge protection MOS transistor 6 is turned off to protect the booster circuit 10.

However, in the first conventional example as described above, the net power supply voltage for supplying the electric charge to the capacitor 2 of the booster circuit 10 is at least reduced by the threshold value of the surge protection MOS transistor 6. Occur. The ideal maximum value of the boosting level of the booster circuit 10 is determined by (power supply voltage value for supplying charge to the capacitor of the booster circuit) + (voltage output of the oscillator, that is, power supply voltage of the oscillator output stage). Cannot be boosted sufficiently efficiently. Similarly, if a power supply voltage with surge voltage protection is used for the power supply at the output stage of the oscillator 1, the boosted level is further reduced. For this reason, the gate potential of the MOS transistor 9 cannot be sufficiently boosted, and the on-resistance cannot be reduced to a desired value.

On the other hand, a configuration is adopted in which the gate voltage of the surge protection MOS transistor is boosted to prevent the power supply voltage of the booster circuit from decreasing by the threshold value of the surge protection MOS transistor. There is a prior art. Next, this prior art will be described.

FIG. 8 shows a second conventional example. In this conventional example, a surge protection MOS
A second booster circuit 12 that boosts the gate voltage of the transistor 6 is provided. 13 is a resistor. With this configuration, the gate of the surge protection MOS transistor 6 is boosted by the second booster circuit 12 to (power supply voltage + threshold) or more. Therefore, the power supply voltage of the first booster circuit 10 does not decrease by the threshold value of the surge protection MOS transistor 6. As a result, in the second conventional example, the gate voltage of the surge protection MOS transistor 6 is raised to (power supply voltage + threshold) or more while maintaining the surge voltage protection function of the maximum rated power supply voltage or more, and the first boosting is performed. The circuit 10 is designed to perform sufficiently efficient boosting.

FIG. 9 shows a third conventional example. In this conventional example, the boosted output of the booster circuit 10 is M
The signal is fed back to the gate of the OS transistor 6 via a feedback system 15 including a diode 14. With this configuration, the gate of the surge protection MOS transistor 6 is boosted by the booster circuit 10 to (power supply voltage + threshold) or more. Therefore, the power supply voltage of the booster circuit 10 does not decrease by the threshold value of the surge protection MOS transistor 6. Thereby, in the third conventional example,
The gate voltage of the surge protection MOS transistor 6 can be increased to (power supply voltage + threshold) or more with a single booster circuit while maintaining the surge voltage protection function of not less than the maximum rated power supply voltage.

FIG. 10 shows a fourth conventional example. In this conventional example, the boosted output of the booster circuit 10 is
The boosted output is fed back to the gate of the surge protection MOS transistor 6 via a feedback system 16 having a diode 14. Thus, in the fourth conventional example, the gate of the surge protection MOS transistor 6 is boosted by the booster circuit 10 to (power supply voltage + threshold) or more. Therefore, in the fourth conventional example, the booster circuit 1
The location of the output of 0 is different from that of the third conventional example. The potential of the gate of the surge protection MOS transistor 6 may be boosted to (power supply voltage + threshold) or more, but it is more reliable to eliminate the effect of the forward voltage drop of the second diode 4 on the output of the booster circuit 10. Thus, the gate potential of the surge protection MOS transistor 6 can be boosted.
This is particularly effective when the forward voltage drop of the second diode 4 is large. In this way, the power supply voltage of the booster circuit 10 does not drop by the threshold value of the surge protection MOS transistor 6. Therefore, also in the fourth conventional example, the surge protection MOS can be provided by only one boosting circuit while maintaining the surge voltage protection function of the maximum rated power supply voltage or more.
Set the gate potential of transistor 6 to (power supply voltage + threshold)
It is possible to raise it above.

[0009]

In the first conventional example, the net power supply voltage for supplying the electric charge to the capacitor of the booster circuit is reduced by at least the threshold value of the surge protection MOS transistor. If the power supply voltage with surge voltage protection is used similarly for the power supply of the output stage of the oscillator in the booster circuit, the boosted level is further reduced. For this reason, there has been a problem that the gate voltage of the high-side MOS transistor in the high-side switch or the like cannot be sufficiently boosted, and the on-resistance cannot be reduced to a desired value. When a high-side switch circuit is mounted on a vehicle, the power supply voltage is a battery voltage. The battery voltage is
The voltage value varies depending on the state of charge. FIG. 11 shows the relationship between the change in the battery voltage Vbat and the change in the boosted voltage VC of the booster circuit 10 and the voltage change in the gate-source voltage Vgs of the MOS transistor 9. The boosted voltage VC and the gate-source voltage Vgs fluctuate greatly with respect to the fluctuation of the battery voltage Vbat as the power supply voltage. Therefore, in the second to fourth conventional examples in which the second booster circuit 12 is provided or the gate voltage of the surge protection MOS transistor 6 is boosted by the feedback of the boosted output of the booster circuit 10, the battery voltage is increased. When Vbat is low, it is effective to increase the gate voltage of the MOS transistor 9, but when the battery voltage Vbat is high, there is a problem that the gate voltage of the MOS transistor 9 is too high. If the gate voltage of the MOS transistor 9 is set too high, the following adverse effects occur. That is, first, the capacitor 2 in the booster circuit 10 needs to have a large withstand voltage. Second, a gate voltage exceeding the gate breakdown voltage may be applied to the MOS transistor 9.

SUMMARY OF THE INVENTION The present invention has been made in view of such a conventional problem, and a booster which is sufficiently efficient for a given power supply voltage while maintaining a surge voltage protection function of a maximum rated power supply voltage or more. It is an object of the present invention to provide a high-side switch circuit that can realize a low on-resistance by performing the above-described operation and that operates stably in consideration of the withstand voltage of the internal element.

[0011]

According to a first aspect of the present invention, there is provided a high-side switch or a high-side MOS in an H-bridge which receives a power supply voltage as an input.
A first booster circuit for boosting a gate voltage of the transistor, a surge protection MOS transistor connected to an input line of the power supply voltage in the first booster circuit, and a surge protection MOS transistor having a power supply voltage as an input; A high-side switch circuit comprising: a second booster circuit for boosting a gate voltage; and a surge voltage detection circuit for turning off the surge protection MOS transistor when the application of a surge voltage equal to or higher than the maximum rated power supply voltage is detected. Monitoring the level of the power supply voltage with respect to the value; when the power supply voltage is low, the second booster circuit is operated to boost the gate voltage of the surge protection MOS transistor; when the power supply voltage is high, the second booster circuit is used. The boosting operation of the booster circuit is stopped to change the power supply voltage to the surge protection MOS.
The gist is to provide a power supply voltage monitoring circuit for setting a gate voltage of a transistor.

According to a second aspect of the present invention, there is provided a first booster circuit for boosting a gate voltage of a high-side MOS transistor in a high-side switch or an H-bridge using a power supply voltage as an input, and the power supply in the first booster circuit. A surge protection MOS transistor connected to a voltage input line, a second booster circuit for boosting a gate voltage of the surge protection MOS transistor with a power supply voltage as an input, and application of a surge voltage equal to or higher than a maximum rated power supply voltage. A high-side switch circuit having a surge voltage detection circuit that turns off the surge protection MOS transistor when the voltage is detected. The high-side switch circuit monitors the level of the boosted voltage of the first booster circuit with respect to a predetermined voltage value. Is the gate voltage of the surge protection MOS transistor by activating the second booster circuit. A step-up voltage monitoring circuit that stops the step-up operation of the second step-up circuit when the step-up voltage is high and uses the power supply voltage as a gate voltage of the surge protection MOS transistor. I do.

According to a third aspect of the present invention, there is provided a booster circuit for boosting a gate voltage of a high-side MOS transistor in a high-side switch or an H-bridge using a power supply voltage as an input, and a booster circuit connected to an input line of the power supply voltage in the booster circuit. A surge protection MOS transistor, a feedback system for feeding back a boosted voltage by the booster circuit to a gate of the surge protection MOS transistor, and a surge protection MOS when detecting application of a surge voltage higher than a maximum rated power supply voltage. A high-side switch circuit having a surge voltage detection circuit for turning off a transistor, wherein the level of the power supply voltage with respect to a predetermined voltage value is monitored, and when the power supply voltage is low, the feedback system is turned on and the boosted voltage is subjected to the surge protection. MOS transistor gate It is fed back, when the power supply voltage is high is summarized in that formed by providing a power supply voltage monitoring circuit of the gate voltage of the power supply voltage is turned off the feedback system the surge protection MOS transistor.

According to a fourth aspect of the present invention, there is provided a high-side MOS transistor in an oscillator, a capacitor, a first diode connected to a path for supplying electric charge from a power supply voltage line to the capacitor, a high-side switch from the capacitor or an H-bridge. A booster circuit for boosting the gate voltage of the MOS transistor by using a power supply voltage as an input, and a surge protection M connected to the power supply voltage line.
An OS transistor and a boosted voltage by the booster circuit are taken out from a connection point between the capacitor and a second diode, and the surge protection MOS is passed through a third diode.
A high-side switch circuit having a feedback system for feeding back to the gate of the transistor and a surge voltage detection circuit for turning off the surge protection MOS transistor when the application of a surge voltage equal to or higher than the maximum rated power supply voltage is detected; A resistor is connected between a point at which the boosted voltage is taken out and a third diode in the feedback system, a switching element is connected between the connection point and a ground potential, and the level of the power supply voltage with respect to a predetermined voltage value is monitored. When the voltage is low, the switching element is turned off, and the boosted voltage is fed back to the gate of the surge protection MOS transistor. When the power supply voltage is high, the switching element is turned on to turn off the feedback system, and the power supply is turned off. Voltage surge protection And summarized in that formed by providing a power supply voltage monitoring circuit according to the gate voltage of the MOS transistor.

[0015]

According to the first aspect of the present invention, when the power supply voltage is lower than the predetermined value, the gate voltage of the surge protection MOS transistor is boosted by the second booster circuit to (power supply voltage + threshold) or higher. Therefore, the power supply voltage input to the first booster circuit does not decrease by the threshold value of the surge protection MOS transistor, and sufficiently efficient boosting is performed. When the power supply voltage exceeds a predetermined value, the boosting operation of the second booster circuit is stopped, and the power supply voltage is applied to the gate of the surge protection MOS transistor. Therefore, the power supply voltage input to the first booster circuit is the surge protection MO.
The threshold voltage of the S transistor is reduced, and the voltage applied to the internal element is limited. On the other hand, when a surge voltage higher than the maximum rated power supply voltage is applied, the surge protection MOS
The transistor is turned off, and the first booster circuit is protected.

In the present invention, the boosted voltage itself of the first booster circuit is directly monitored, and when the boosted voltage is equal to or lower than a predetermined value, the gate voltage of the surge protection MOS transistor is increased by the second booster circuit. As a result, the voltage is increased to (power supply voltage + threshold) or more. Therefore, the power supply voltage input to the first booster circuit does not decrease by the threshold value of the surge protection MOS transistor, and sufficiently efficient boosting is performed. When the power supply voltage increases and the boosted voltage becomes equal to or higher than a predetermined value, the boosting operation of the second booster circuit is stopped,
A power supply voltage is applied to the gate of the surge protection MOS transistor. For this reason, the power supply voltage input to the first booster circuit is reduced by the threshold value of the surge protection MOS transistor, and the voltage applied to the internal elements is limited.

According to the third aspect of the present invention, a feedback system for feeding back the boosted voltage of the booster circuit to the gate of the surge protection MOS transistor is provided, and when the power supply voltage is lower than a predetermined value, the feedback system is turned on. As a result, the boosted voltage is fed back to the gate of the surge protection MOS transistor. For this reason, the power supply voltage input to the booster circuit does not decrease by the threshold value of the surge protection MOS transistor, and the boosting is performed sufficiently efficiently. When the power supply voltage exceeds a predetermined value, the feedback system is turned off and the surge protection MOS
A power supply voltage is applied to a gate of the transistor. For this reason, the power supply voltage input to the booster circuit is the surge protection M
The threshold voltage of the OS transistor is reduced, and the voltage applied to the internal element is limited.

In the invention described in claim 4, the point at which the boosted voltage is taken out in the feedback system is the connection point between the capacitor and the second diode in the booster circuit. Therefore, when the power supply voltage is lower than the predetermined value, the second
The boosted voltage which is not affected by the forward voltage drop of the diode is fed back to the gate of the MOS transistor for surge protection, and the booster circuit can more efficiently boost the power supply voltage.

[0019]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a diagram showing a first embodiment of the present invention. In the drawings showing FIG. 1 and the second to fourth embodiments which will be described later, the same or equivalent components as those of the circuits and elements in FIGS. The explanation given above is omitted. In the present embodiment, in the configuration of the second conventional example (FIG. 8), a power supply voltage monitoring circuit 20 is newly added.
Is added, and the operation of the second booster circuit 12 is
A control line is connected from an output terminal of the power supply voltage monitoring circuit 20 to an oscillator 17 having a control function in the second booster circuit 12 so that the non-operation can be controlled. In the power supply voltage monitoring circuit 20, the input power supply voltage from the power supply voltage line 5 divided by the dividing resistors 21 and 22 is input to the inverting input terminal of the comparator 23. The non-inverting input terminal is supplied with the output of a stable reference voltage circuit 24 that does not depend on the power supply, such as a band gap reference circuit. The comparator 23 monitors the level of the power supply voltage value, and inverts the output when the power supply voltage is higher than a predetermined value. Comparator 2
The output of 3 is supplied to the oscillator 17 with a control function in the second booster circuit 12. When the power supply voltage is high, the second booster circuit 12 stops boosting and directly outputs the power supply voltage, and the power supply voltage is low. In this case, the boosted voltage is
Output to the gate of S transistor 6. FIG. 2 shows a circuit configuration example of the oscillator 17 with a control function. The CR oscillation circuit includes a plurality of inverters 171, a resistor 172, a capacitor 173, and a NAND gate 174. The CR oscillation circuit oscillates when the input terminal of the NAND gate 174 is set to a high level, and stops when the input terminal is set to a low level.

Next, the operation of this embodiment will be described. A charging system including a vehicle battery is connected to the power supply voltage line 5. The power supply voltage monitoring circuit 20 constantly monitors the fluctuation of the battery voltage. When the power supply voltage is equal to or lower than the predetermined value, the gate voltage of the surge protection MOS and the transistor 6 is boosted by the second booster circuit 12 to (power supply voltage + threshold) or higher. Therefore, the power supply voltage of the first booster circuit 10 does not drop by the threshold value of the surge protection MOS transistor 6. Thereby, the first booster circuit 1
When the value is 0, a sufficiently efficient boosting is performed. When the power supply voltage becomes equal to or higher than a predetermined value, the power supply voltage monitoring circuit 20 issues a boost off command to the second booster circuit 12. The booster OFF command causes the oscillator 17 with the control function to stop oscillating, and the second booster circuit 12 stops boosting. With this operation, the gate voltage of the surge protection MOS transistor 6 becomes substantially equal to the power supply voltage. As a result, the power supply voltage of the first booster circuit 10 drops by the threshold value of the surge protection MOS transistor 6, and the boosted voltage VC applied to the boosted MOS capacitor 2 and the MOS transistor 9, the gate-source voltage Vgs
Is restricted. This prevents an excessive voltage from being applied to the element. The judgment level of the power supply voltage monitoring circuit 20 depends on the withstand voltage of the internal element, but is, for example, about 12V. On the other hand, when a surge equal to or higher than the maximum rated power supply voltage is applied, the detection signal from the surge voltage detection circuit 11 turns on the switch MOS and the transistor 8, turns off the surge protection MOS transistor 6, and turns off the first. Booster circuit 10
Is protected.

As described above, according to the present embodiment, a sufficiently efficient boosting is performed for a given power supply voltage while maintaining a surge voltage protection function of a maximum rated power supply voltage or more, thereby reducing a low on-resistance. It is possible to realize a stable operation in consideration of the breakdown voltage of the internal element.

FIG. 3 shows a second embodiment of the present invention.
In the present embodiment, a boosted voltage monitoring circuit 30 for directly monitoring the boosted voltage itself of the first booster circuit 10 is provided instead of observing a rise in the power supply voltage as in the first embodiment. The output of the boosted voltage monitoring circuit 30 causes the second
The second booster circuit 12 is connected to the output terminal of the booster voltage monitoring circuit 30 so that the operation and non-operation of the booster circuit 12 can be controlled.
The control line is connected to the oscillator 17 with the control function in the above. In the boosted voltage monitoring circuit 30, the boosted voltage of the first booster circuit 10 is divided by the dividing resistors 31 and 32, and is input to the inverting input terminal of the comparator 33. The output of the reference voltage circuit 34 is provided to the non-inverting input terminal. The comparator 33 monitors the state of the boosted voltage VC of the first booster circuit 10, and inverts the output when the boosted voltage is high. Thereafter, by the same operation as in the first embodiment, the boosting operation of the second booster circuit 12 is stopped when an excessive voltage is generated.

As described above, according to the present embodiment, a sufficiently efficient boosting is performed on a given power supply voltage while maintaining a surge voltage protection function of a maximum rated power supply voltage or more, thereby reducing a low on-resistance. It is possible to realize a stable operation in consideration of the breakdown voltage of the internal element.

FIG. 4 shows a third embodiment of the present invention.
In the present embodiment, in the configuration of the third conventional example (FIG. 9), a power supply voltage monitoring circuit 20 is newly added, and the boosted voltage of the boosting circuit 10 is fed back to the gate of the surge protection MOS transistor 6 by the output thereof. The on / off of the feedback system 15 is controlled. To realize this control operation, a resistor 25 is connected between the output terminal of the booster circuit 10 and the diode 14 in the feedback system 15, and a second switch is connected between the connection point of the resistor 25 and the diode 14 and the ground potential. MOS transistor 26 is connected. And the second switch MO
The output terminal of the power supply voltage monitoring circuit 20 is connected to the gate of the S transistor 26. The circuit configuration of the power supply voltage monitoring circuit 20 and its power supply voltage monitoring operation are the same as those of the first embodiment.

The operation of the third embodiment will be described. When the power supply voltage is higher than the predetermined value, the output of the comparator 23 goes high, and the second switching MOS transistor 26 is turned on. This eliminates the effect of feeding back the boosted voltage VC of the booster circuit 10 to the gate of the surge protection MOS transistor 6, and the boosted voltage of the booster circuit 10 is reduced by the threshold voltage of the surge protection MOS transistor 6. When the power supply voltage is lower than the predetermined value, the output of the comparator 23 goes low and the second switching MOS transistor 26 is turned off. As a result, the boosted voltage V is applied to the gate of the surge protection MOS transistor 6.
The action of feeding back C works to prevent the boosted voltage of the booster circuit 10 from decreasing by the threshold voltage of the MOS transistor 6 for surge protection.

As described above, according to the present embodiment, only one booster circuit is used, and a booster circuit that is sufficiently efficient with respect to a given power supply voltage while maintaining a surge voltage protection function equal to or higher than the maximum rated power supply voltage. Is performed, a low on-resistance can be realized, and a stable operation taking into account the breakdown voltage of the internal element can be obtained.

FIG. 5 shows a fourth embodiment of the present invention.
In the present embodiment, a power supply voltage monitoring circuit 20 is newly added to the configuration of the fourth conventional example (FIG. 10). That is, as compared with the configuration of the third embodiment, the boosted output of the booster circuit 10 includes the capacitor 2 and the second diode 4.
The only difference is the point that is taken out of the connection point.
Therefore, when the power supply voltage is low, a boosted voltage that is not affected by the forward voltage drop of the second diode 4 is fed back to the gate of the surge protection MOS transistor 6, and the booster circuit 10 further reduces the power supply voltage. Efficient boosting can be performed.

[0028]

As described above, according to the first aspect of the present invention, the first booster circuit for boosting the gate voltage of the high-side switch or the high-side MOS transistor in the H-bridge by using the power supply voltage as an input. A surge protection MOS transistor connected to the power supply voltage input line in the first booster circuit, a second booster circuit that boosts a gate voltage of the surge protection MOS transistor by using the power supply voltage as an input, When the application of a surge voltage higher than the rated power supply voltage is detected, the surge protection MOS
A high-side switch circuit having a surge voltage detecting circuit for turning off a transistor, wherein the level of the power supply voltage with respect to a predetermined voltage value is monitored, and when the power supply voltage is low, the second booster circuit is operated to activate the surge protection circuit. MOS
Since a gate voltage of the transistor is boosted, and when the power supply voltage is high, a boosting operation of the second booster circuit is stopped, and a power supply voltage monitoring circuit for using the power supply voltage as a gate voltage of the surge protection MOS transistor is provided. When the power supply voltage is equal to or lower than the predetermined voltage value, the power supply voltage input to the first booster circuit is sufficiently efficiently boosted without dropping by the threshold value of the surge protection MOS transistor. If the voltage is equal to or larger than the value, the power supply voltage input to the first booster circuit is reduced by the threshold value of the surge protection MOS transistor, and the voltage applied to the internal elements is limited. Therefore, it is possible to realize a low on-resistance by sufficiently boosting the applied power supply voltage while maintaining the surge voltage protection function that is higher than the maximum rated power supply voltage, and to realize a stable on-state considering the withstand voltage of the internal elements. Operation can be performed.

According to the second aspect of the present invention, the first booster circuit for boosting the gate voltage of the high-side MOS transistor in the high-side switch or the H-bridge using the power supply voltage as an input, and the first booster circuit A surge protection MOS transistor connected to the power supply voltage input line;
A high-side switch circuit comprising: a second booster circuit that boosts a gate voltage of an S transistor; and a surge voltage detection circuit that turns off the surge protection MOS transistor when the application of a surge voltage equal to or higher than a maximum rated power supply voltage is detected. Monitoring the level of the boosted voltage of the first booster circuit with respect to a predetermined voltage value, and when the boosted voltage is low, activates the second booster circuit to boost the gate voltage of the surge protection MOS transistor; When the boosted voltage is high, a boosted voltage monitoring circuit that stops the boosting operation of the second booster circuit and uses the power supply voltage as the gate voltage of the surge protection MOS transistor is provided. The voltage itself is directly monitored, and when the power supply voltage is low and the boosted voltage is equal to or lower than a predetermined value, the power supply input to the first booster circuit Pressure enough efficient boosting is performed not occur reduction in the threshold amount of surge protection MOS transistor. Further, when the power supply voltage is high and the boosted voltage is equal to or higher than a predetermined value, the power supply voltage input to the first booster circuit drops by the threshold value of the surge protection MOS transistor,
The voltage applied to the internal elements is limited. Therefore, the same effect as the effect of the first aspect can be obtained.

According to the third aspect of the present invention, a booster circuit for boosting a gate voltage of a high-side switch or a high-side MOS transistor in an H-bridge using a power supply voltage as an input, and an input line for the power supply voltage in the booster circuit A surge protection MOS transistor connected to the power supply circuit, a feedback system for feeding back a boosted voltage of the booster circuit to the gate of the surge protection MOS transistor, and a surge protection circuit that detects the application of a surge voltage higher than a maximum rated power supply voltage. A high-side switch circuit having a surge voltage detection circuit for turning off the MOS transistor for monitoring a level of the power supply voltage with respect to a predetermined voltage value, and when the power supply voltage is low, the feedback system is turned on to increase the boosted voltage. MO for surge protection
A power supply voltage monitoring circuit is provided which feeds back the voltage to the gate of the S transistor and turns off the feedback system when the power supply voltage is high and uses the power supply voltage as the gate voltage of the surge protection MOS transistor. In this case, the boosted voltage of the booster circuit is fed back to the gate of the MOS transistor for surge protection, and the power supply voltage input to the booster circuit is the MO for surge protection.
Sufficiently efficient boosting is performed without the decrease of the threshold value of the S transistor. When the power supply voltage is equal to or higher than a predetermined value, the boosted voltage of the booster circuit is not fed back to the gate of the surge protection MOS transistor, and the power supply voltage input to the booster circuit drops by the threshold value of the surge protection MOS transistor. , The voltage applied to the internal elements is limited. Therefore, only one booster circuit can perform a sufficiently efficient boosting for a given power supply voltage while maintaining a surge voltage protection function of a maximum rated power supply voltage or more, thereby realizing a low on-resistance. A stable operation can be performed in consideration of the breakdown voltage of the internal element.

According to the fourth aspect of the present invention, the oscillator, the capacitor, the first diode connected to the path for supplying the electric charge from the power supply voltage line to the capacitor, the high side switch or the high side of the H bridge from the capacitor. A booster circuit that includes a second diode connected to a path for transferring charges to a gate of the MOS transistor and boosts a gate voltage of the MOS transistor by inputting a power supply voltage; and a surge protection MOS connected to the power supply voltage line A transistor and a boosted voltage by the booster circuit are taken out from a connection point between the capacitor and a second diode, and the surge protection M is supplied through a third diode.
A high-side switch circuit comprising: a feedback system for feeding back to the gate of an OS transistor; and a surge voltage detection circuit for turning off the surge protection MOS transistor when the application of a surge voltage higher than the maximum rated power supply voltage is detected. A resistor is connected between the point at which the boosted voltage is taken out and the third diode in the feedback system, a switching element is connected between this connection point and the ground potential, and the level of the power supply voltage with respect to a predetermined voltage value is monitored. When the power supply voltage is low, the switching element is turned off, and the boosted voltage is fed back to the gate of the surge protection MOS transistor.When the power supply voltage is high, the switching element is turned on, and the feedback system is turned off. Supply voltage to the surge Due to the provision of a power supply voltage monitoring circuit according to the gate voltage of the Mamoruyo MOS transistor, the claims 3
In addition to the effects of the described invention, the following effects can be further obtained. That is, when the power supply voltage is equal to or lower than the predetermined value, the boosted voltage that is not affected by the forward voltage drop of the second diode is fed back to the gate of the surge protection MOS transistor, and the booster circuit is more efficient with respect to the power supply voltage. Voltage can be increased.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a first embodiment of a high-side switch circuit according to the present invention.

FIG. 2 is a diagram illustrating a circuit configuration example of the oscillator with a control function in FIG. 1;

FIG. 3 is a circuit diagram showing a second embodiment of the present invention.

FIG. 4 is a circuit diagram showing a third embodiment of the present invention.

FIG. 5 is a circuit diagram showing a fourth embodiment of the present invention.

FIG. 6 is a circuit diagram showing a first conventional example of a high-side switch circuit.

7 is a diagram showing a circuit configuration of a surge voltage detection circuit in FIG.

FIG. 8 is a circuit diagram showing a second conventional example.

FIG. 9 is a circuit diagram showing a third conventional example.

FIG. 10 is a circuit diagram showing a fourth conventional example.

FIG. 11 is a table showing a relationship between a change in a power supply voltage (battery voltage) and a change in a boosted voltage and the like.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Oscillator 2 Capacitor 3 1st diode 4 2nd diode 5 Power supply voltage line 6 Surge protection MOS transistor 8, 26 Switching MOS transistor 9 High side MOS transistor in a high side switch etc. 10 1st booster circuit 11 Surge Voltage detection circuit 12 Second booster circuit 15, 16 Feedback system 20 Power supply voltage monitor circuit 25 Resistance 30 Boost voltage monitor circuit

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-2-100415 (JP, A) JP-A-4-167814 (JP, A) JP-A-64-5223 (JP, A) 35531 (JP, U) (58) Field surveyed (Int. Cl. ⁷ , DB name) H03K 17/00-17/70 H02M 3/00-3/44

Claims (4)

(57) [Claims] 1. A first booster circuit for boosting a gate voltage of a high-side MOS transistor in a high-side switch or an H-bridge using a power supply voltage as an input, and connected to an input line of the power supply voltage in the first booster circuit. A surge protection MOS transistor, a power supply voltage as input, a second booster circuit for boosting a gate voltage of the surge protection MOS transistor, and a surge protection circuit that detects the application of a surge voltage higher than a maximum rated power supply voltage. MO for
A high-side switch circuit having a surge voltage detection circuit for turning off an S transistor, wherein the level of the power supply voltage with respect to a predetermined voltage value is monitored, and when the power supply voltage is low, the second booster circuit is activated to operate the surge protection circuit. MO for
A power supply voltage monitoring circuit is provided, which boosts the gate voltage of the S transistor, stops the boosting operation of the second booster circuit when the power supply voltage is high, and uses the power supply voltage as the gate voltage of the surge protection MOS transistor. A high-side switch circuit characterized by: 2. A first booster circuit for boosting a gate voltage of a high-side MOS transistor in a high-side switch or an H-bridge using a power supply voltage as an input, and connected to an input line of the power supply voltage in the first booster circuit. A surge protection MOS transistor, a power supply voltage as input, a second booster circuit for boosting a gate voltage of the surge protection MOS transistor, and a surge protection circuit that detects the application of a surge voltage higher than a maximum rated power supply voltage. MO for
A high-side switch circuit having a surge voltage detecting circuit for turning off an S transistor, wherein a level of a boosted voltage of the first booster circuit with respect to a predetermined voltage value is monitored, and when the boosted voltage is low, the second booster circuit To boost the gate voltage of the surge protection MOS transistor, and when the boosted voltage is high, stop the boosting operation of the second booster circuit to reduce the power supply voltage to the gate voltage of the surge protection MOS transistor. A high-side switch circuit comprising a boosted voltage monitoring circuit. 3. A booster circuit for boosting a gate voltage of a high-side MOS transistor in a high-side switch or an H-bridge using a power supply voltage as an input, and a surge protection MOS connected to an input line of the power supply voltage in the booster circuit. A transistor, a feedback system that feeds back a boosted voltage by the booster circuit to the gate of the surge protection MOS transistor, and a surge voltage that turns off the surge protection MOS transistor when the application of a surge voltage higher than the maximum rated power supply voltage is detected. A high-side switch circuit having a detection circuit for monitoring the level of the power supply voltage with respect to a predetermined voltage value. When the power supply voltage is low, the feedback system is turned on to apply the boosted voltage to the gate of the surge protection MOS transistor. Feedback A high-side switch circuit comprising a power supply voltage monitoring circuit that turns off the feedback system when the power supply voltage is high and uses the power supply voltage as a gate voltage of the surge protection MOS transistor. 4. A first circuit connected to a path for supplying electric charge from an oscillator, a capacitor, and a power supply voltage line to the capacitor.
And a second diode connected to a path for transferring charges from the capacitor to the gate of the high-side switch or the high-side MOS transistor in the H-bridge. The power supply voltage is input to boost the gate voltage of the MOS transistor. A booster circuit, a surge protection MOS transistor connected to the power supply voltage line,
A feedback system for extracting a boosted voltage by the booster circuit from a connection point between the capacitor and a second diode, and feeding back the boosted voltage to the gate of the surge protection MOS transistor via a third diode; And a surge voltage detection circuit that turns off the surge protection MOS transistor when the application of a voltage is detected. In the high-side switch circuit, a resistor is provided between a point at which a boosted voltage is extracted in the booster circuit and a third diode in the feedback system. And connect
A switching element is connected between the connection point and the ground potential, and the level of the power supply voltage with respect to a predetermined voltage value is monitored. When the power supply voltage is low, the switching element is turned off and the boosted voltage is applied to the surge protection MOS transistor. When the power supply voltage is high, the switching element is turned on to turn off the feedback system, and the power supply voltage is applied to the surge protection M.
A high-side switch circuit including a power supply voltage monitoring circuit for setting a gate voltage of an OS transistor.