JP2679686B2 - Print control device for thermal printer - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thermal printer, and more particularly to a method for driving a heat generating element of the thermal printer. 2. Description of the Related Art Conventionally, in a thermal printer, various methods have been used in order to prevent deterioration of print quality due to heat accumulation in a thermal head during continuous use. Among them, there is a method of storing the previous data for each dot to determine the energization time, as in Japanese Patent Publication No. 55-48631.
A method of changing the energization time depending on the driving cycle, such as Japanese Patent Publication No. 57-18507, is used. These are generally called history control methods. In these conventional examples, generally, a method of sequentially sending data to a drive IC of a thermal head while performing data processing by a CPU was common. In such a method, even if an attempt is made to operate the thermal printer at high speed, the processing cannot catch up, which has been an obstacle to increasing the speed of the thermal printer. SUMMARY OF THE INVENTION An object of the present invention is to eliminate such problems of the prior art and to provide a print control device for a serial type thermal printer which is high speed and excellent in print quality. [0005] A processing device for processing print data and outputting drive data for driving a head at predetermined timings is arranged between the processing device and the thermal head. A first storage circuit for storing the drive data of the above, a second storage circuit for storing the data at any timing in the past, and a plurality of drive data at the same timing, which are connected to a data bus of a plurality of bits of the processor A data input terminal capable of inputting data, an address input terminal connected to at least two bits of an address bus of the processing device, a data strobe input terminal for receiving a strobe signal at the time of data output of the processing device, and the processing A circuit select input terminal that receives a signal that is output from the device and that specifies a predetermined circuit section, and a head that outputs a drive signal for the heating element. Head drive circuit having a drive drive output terminal and an energizing pulse input terminal for determining the energizing time to the heat generating element as main components, and R for sequentially storing past drive data.
After storing the current data in a storage circuit that has AM and stores the current drive data in the head control circuit, sequentially calls past data from the RAM to the second storage circuit for comparison control. Accordingly, the print control device of the thermal printer is characterized in that the energization time of the heat generating element is controlled by the past drive data. FIG. 1 is a schematic diagram showing the operating principle of a print controller for a thermal printer according to the present invention. Reference numeral 1 is a thermal head having a plurality of heat generating elements 1a, 2 is a head drive circuit for driving this thermal head, 3 is a CPU 4 which is a kind of processing apparatus, and the amount of heat generated by the thermal head is disposed between the thermal head 1. The head control circuit unit, which is a unitized head control circuit for controlling the CPU, controls the entire thermal printer as a whole. A pulse generation circuit 18 supplies a pulse having two or more kinds of pulse widths to the head control circuit unit 3, and has a thermistor 14 for detecting the temperature of the thermal head 1 or its ambient temperature. The CPU 4 has an 8-bit CP as an example.
U has a data bus 16, an address bus 17, a kind of WR signal which is a data strobe signal, and the like. The head control circuit unit 3 is composed of a gate array as an example, and is integrated into one chip like the CPU 4. Hereinafter, the head control circuit unit will be abbreviated as HCU. HCU
3 has a built-in data latch circuit which is a kind of memory circuit,
The data input terminal 5 connected to the data bus 16, the address input terminal 6 for inputting the lower 2 bits of the address bus 17, the predetermined address from the CPU 4, and the circuit select terminal for knowing the designation of the unit according to the information, A kind of chip select terminal (CS terminal) 7, WR of CPU4
At least a data latch timing input terminal connected to a signal, a plurality of energization pulse input terminals 9 for determining energization time to the heat generating element, and a head drive output terminal 10 for outputting a drive signal to each heat generating element of the thermal head 1. Have 11 is the HCU based on the address information of the CPU 4.
3 is a decoder for generating a predetermined address code assigned to the address 3. Reference numeral 12 is a ROM for storing a control program for the CPU 4 and a character generator, and 13 is an RA.
M and 15 are power supplies. FIG. 2 is a detailed circuit diagram showing an embodiment of the HCU 3, and the same parts as those in FIG. 1 are designated by the same reference numerals. The data input terminal 5 can input 8-bit data D0 to D7 in parallel. Reference numerals 21 to 29 denote data latch circuits which hold 8-bit data, 21 to 23 latch the data H0 to H15 of the head drive signal, and 27 to 29 latch the data H16 to H23. ing. The head drive output has, for example, 24 output terminals H0 to H24 for driving a 24-dot thermal head. Reference numeral 31 is a data latch circuit group for holding one dot row of the current head data, 32 is one dot row of the past data one time before, and 33 is one of the past data two times before. A data latch circuit group that holds one dot row is shown. Reference numeral 30 denotes an address decoder for storing head data by dividing it into 8-bit data according to the address information of the data output of the CPU. As an example, a data latch circuit is provided according to the lower 2 bits A0 and A1 of the address data. 21, 24 and 27 can be selected. Reference numeral 34 denotes a gate circuit that converts a pulse input from the energizing pulse input terminal into an energizing section signal. This is unnecessary when the output signal of the pulse generation circuit 18 is originally output as the energized section signal. At the same time when the head drive data is output from the CPU 4 to the data bus, the WR signal is output and the CS terminal is accessed by the address information previously determined on the memory map of the CPU 4, and the lower 2 bits of the address bus are accessed.
Depending on the bit information, the data latch circuits 21, 24, 27
Data is transferred to each of the. Then, the already stored data is shifted to the right in FIG. 2, for example, the data of the data latch circuit 21 is shifted to the data latch circuit 22 and sequentially held as past data. Up to four data latch circuits can be accessed with the information of the lower 2 bits, but the number of address input terminals and the number of data latch circuits may be increased according to the number of heat generating elements. The data latch circuits 21, 22 and 23 are connected by the same latch timing input, and at the same time when the next data is input, the data immediately before the past is written to the data latch circuit 23 and the data just printed this time is past. As in the case of the data latch circuit 22 which is the data storage unit one time before, the data is automatically sequentially advanced and stored as past data. After the data is set, when a predetermined pulse is input to the energization pulse input terminal 9, the heating element is energized. Reference numerals 35 and 36 are gate circuits G0 and G1 for producing a heat generation control signal for controlling the heat generation amount according to the past history by combining the latched data and the energization period signal, and G0 is a heat generating element at both ends. Of the signals H0 and H23, and G1 of the signals H1 to H22. FIG. 3 shows the relationship between the input signal of the energizing pulse input terminal 9 and the energizing section signal. T0 to T3
Is an input waveform of the energization pulse input terminal 9, and TW0 to T
W3 indicates each energization section signal. t0 to t3
Indicates the pulse width of the energization section signal. FIG. 4 is an explanatory diagram showing a method of energizing the thermal head of the print control apparatus according to the present invention. 41, 42 and 43 are latch circuits 21 and 2
The data in 2 and 23 are shown, 41 shows the present data, 42 shows the previous data, and 43 shows the previous data. Reference numerals 51, 52 and 53 show output waveforms of the head drive signal. 51 is a terminal of H0, 52 is a terminal of H2, 5
Reference numerals 3 denote H5 terminals, respectively. Reference numeral 43 indicates data at the start of printing. In the first energization, all energization sections are added to the heat generating elements. If the dot is energized at the timing one before, the shaded area indicated by t3 is reduced, and if the dot is energized at the timing two before, the output waveform 52 indicates t2. The section is reduced, and at the time of continuous 3-dot energization, the section t2 + t3 is reduced. Furthermore, when both dots are energized in the vertical direction at the immediately preceding timing, the t1 section is reduced as shown by the output waveform 53. The energization time is determined by a combination of the above cases. This method has a configuration in which only four energization section signals need to be provided for eight past cases of 2 × 2 × 2 = 8. The gate circuits G0 and G1 of FIG. 2 produce this output signal. When the current to be applied to the heat generating element of the thermal head may be as small as 50 mA or less, the head drive circuit can be formed in the same package when forming the HCU 3 by the gate array. or,
Similarly, by forming the HCU 3 with a standard cell, one chip can be obtained. FIG. 5 is a schematic diagram showing an embodiment of the pulse generating circuit. Reference numeral 60 denotes an oscillation circuit including the thermistor 14 described above, which includes resistors 61, 62, 66 and a capacitor 6
3, a power supply V formed by a transistor 64, an inverter 68, a zener diode 65, and a voltage comparator 67.
c. The cycle S0 of this output waveform 69
Has a characteristic that it senses the temperature of the thermal head and becomes small when the temperature is high and becomes large when the temperature is low. 70 indicates a frequency dividing circuit, and 71 indicates a gate circuit. The gate circuit 71 outputs pulses of each of T0 to T3. As an example, T3 = S0 × 6, T2 = S0 × 10,
Times of T1 = S0 × 12 and T0 = S0 × 22 are formed. By determining the energization time of the thermal head using such a pulse generation circuit, the optimum applied energy is always given to the thermal head, and the applied energy reduced by the past drive history is always correlated with the total energization time at this time. It becomes possible to improve the print quality. The frequency dividing circuit 70 and the gate circuit 71 in the pulse generating circuit can be integrated into a gate array, and can be further simplified by using a programmable timer. In this embodiment, the memory circuit is described as the data latch circuit. However, when there is a large amount of data to be stored, a RAM is installed separately from the data control unit and the RAM is set immediately after the next data is written in the data control unit. Access, move the stored data one time before to the storage area two times before, move the data immediately before the next data to the storage area one time before, and read them out in synchronization with the energization interval signal. It is also possible to supply the heat generation control data to the head while selecting the gate circuit of. FIG. 6 is a schematic diagram of an embodiment of the print control device of the present invention using the RAM as a storage circuit. Reference numeral 80 denotes a head control circuit section for controlling the individual energization time of the heat generating elements of the head, and the data storage section for the past drive data of the HCU in FIG. 2 is unified and is provided by one storage section. . Reference numeral 90 denotes a RAM that stores past drive data. In the head control circuit 80, the data latch circuit 81 of the first storage circuit for storing the latest data of this time and the data at any past time to be compared when energized,
The data latch circuit 83 of the second memory circuit, which is read from the temporary RAM 90 and stored therein, controls the movement of the data in the RAM 90 immediately after the latest data is written, and sequentially passes the past drive data to the data latch circuit 83 during energization. A data control unit 84 having a reading function, a gate circuit unit having a function similar to that of the gate circuit 35 of FIG. 2 by comparing current drive data with past data during energization to generate energization data. 82 and the head drive circuit 85 as main constituent elements. The data control section 84 plays a role of recalling data at an arbitrary time point in the past to the data latch circuit for temporary storage 83 based on a predetermined control process during energization, and compares the past data with the current data. The energizing time is determined. The energization section signals 86T0 to Tn can be increased depending on the number of times of storage in the past. The main difference from the HCU 3 is that a clock input CLK terminal 87 for operating the data control unit 84 in sequence and a control signal for accessing the RAM are required. Since the operation of the data control unit 84 is an extremely sequential operation, it does not perform complicated control of the CPU or the like, and a logic circuit which can be constituted by TTL or the like is sufficient. In the present embodiment, the CPU is used as the processing device, but the present invention is not limited to the CPU, and a DMA controller or the like can perform the same function. According to the present invention, since it is not necessary for the CPU to perform data processing based on past drive history, high-speed processing of the CPU is possible and printing speed of the thermal printer can be increased. Become. Since the movement control of data is executed in a unit of a plurality of bits, it is most suitable for high speed support such as a serial printer. Further, since the RAM is used as the past data storage unit, the reference frequency of the past drive history can be freely set without being limited to two.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic diagram showing the configuration of a print control device for a thermal printer of the present invention. FIG. 2 is a circuit diagram showing an embodiment of a head control circuit unit of the present invention. FIG. 3 is an explanatory diagram showing a relationship between an energization pulse input signal and an energization section signal of the head control circuit unit of the present invention. FIG. 4 is an explanatory diagram showing a method of energizing a thermal head of the print control apparatus according to the present invention. FIG. 5 is a circuit diagram of an embodiment of a pulse generation circuit of the print control device of the present invention. FIG. 6 is a schematic view of another embodiment of the print control device according to the present invention. [Explanation of Codes] 1 ... Thermal head 3 ... Head heat generation control circuit unit 4 ... CPU 18 ... Pulse generation circuit 80 ... Head control circuit unit 90 ... RAM

Claims (1)

(57) [Claims] Using a thermal head with multiple heating elements,
In a thermal printer that prints on plain paper via thermal paper or an ink ribbon, a processing device for processing print data and outputting drive data for driving a head at predetermined timing, the processing device, and the thermal head Connected to a first storage circuit that stores drive data for this time, a second storage circuit that stores data at arbitrary timing in the past, and a data bus of a plurality of bits of the processing device. A data input terminal capable of inputting a plurality of drive data at the same timing, an address input terminal connected to at least 2 bits or more of an address bus of the processing device, and a strobe signal at the time of data output of the processing device are received. A data strobe input terminal and a circuit select input terminal for receiving a signal output from the processing device and designating a predetermined circuit section. , A head drive output terminal that outputs a drive signal for the heat generating element, and a head control circuit that mainly includes an energization pulse input terminal that determines an energization time to the heat generating element, and further past drive data sequentially. After storing the present data in the storage circuit for storing the present drive data in the head control circuit, the past control data is sequentially called from the RAM to the second storage circuit for comparison. A print control device for a thermal printer, wherein the energization time of the heat generating element is controlled by controlling the past drive data. 2. Print control apparatus according to claim 1, characterized in that the head control circuit constituted by a gate array.