JP2019149127A - Information processor, method for processing information, and program - Google Patents

Abstract

An information processing apparatus, an information processing method, and a program capable of continuing a BIOS process without terminating a computer when a hardware error occurs in the BIOS.
According to a first aspect of the present invention, an information processing device converts a first BIOS into a spare memory that is a memory different from a memory in which the first BIOS is stored in advance in a nonvolatile memory. A BIOS that replicates as a BIOS and BIOS control that stops the first process of the first BIOS and performs the second process of the error using the second BIOS when an error occurs in the process of the first BIOS A section.
[Selection] Figure 1

Description

  The present invention relates to an information processing apparatus, an information processing method, and a program.

  Information devices such as computers use firmware called BIOS (Basic Input / Output System) at the time of startup. The BIOS is a program incorporated in a nonvolatile memory such as a ROM (Read Only Memory). Nonvolatile memory is a general term for memories that can hold memory without supplying power. The BIOS also provides a runtime service to the OS (Operating System) in order to absorb hardware differences.

  The runtime service is a function abstracted by the BIOS in order to absorb differences in hardware, and is a service used by the OS and programs on the OS. The runtime service reads and writes time, reads and writes nonvolatile memory, reads hardware logs (fault monitoring), and so on.

  When the computer is started, the BIOS first initializes a cache and a register in a CPU (Central Processing Unit). Next, the BIOS accesses various controllers on the motherboard and performs POST (Power On Self Test). POST is processing for detecting, initializing, and setting peripheral devices. After the POST is completed, the BIOS loads the OS loader in the first sector of the storage from the storage in which the OS is recorded according to a predetermined priority order. The OS loader represents a program that detects and activates the OS.

  Since the computer is started through the BIOS process, if an error occurs in the BIOS, the computer cannot be started and ends. Errors that occur in the BIOS include software errors such as undefined instruction exceptions and access exceptions, and hardware errors such as uncorrectable errors and MCE (Machine Check Exception).

  As a countermeasure against a software error, Document 1 discloses a method for saving a vector number, an interrupt handler, and the like as tracer information (collection information) when an interrupt occurs when the OS is started. Document 1 discloses a technique for maintaining a system by writing tracer information to a storage device or caching it in a memory when the BIOS is broken.

  Further, as a countermeasure against software error, Document 2 discloses a method for comparing with a backup BIOS stored in a storage device when any error occurs in the BIOS. In Document 2, the BIOS is first backed up. Document 2 discloses a method of maintaining a system by using a backed up BIOS when the BIOS in use is broken.

JP 2016-184204 A JP 2004-302997 A

  As described above, in the above-mentioned documents 1 and 2, when a software error occurs in the BIOS, the recovery of the software error is attempted by rewriting the BIOS in the computer again using the backup data of the BIOS. However, when a hardware error occurs, there is a problem that the computer cannot be recovered by the above method.

  Therefore, an object of the present invention is to provide an information processing apparatus, an information processing method, and a program that solve the above-described problems.

  According to the first aspect of the present invention, the information processing apparatus replicates the first BIOS as the second BIOS in a spare memory that is a memory different from the memory in which the first BIOS in the nonvolatile memory is stored in advance. A replication unit, and a BIOS control unit that stops the first process of the first BIOS and performs the second process of the error using the second BIOS when an error occurs in the process of the first BIOS. Prepare.

  According to the second aspect of the present invention, there is provided an information processing method in which one or a plurality of computers is a spare memory in which the first BIOS is different from the memory in which the first BIOS in the nonvolatile memory is stored in advance. When an error occurs in the duplication step to duplicate as the second BIOS and the process of the first BIOS, the first process of the first BIOS is stopped, and the second process of the error is performed using the second BIOS. BIOS control step to be performed.

  According to the third aspect of the present invention, the program stores the first BIOS in a spare memory that is different from the memory in which the first BIOS in the nonvolatile memory is stored in advance. A BIOS that replicates as a second BIOS and a BIOS that stops the first process of the first BIOS and performs the second process of the error using the second BIOS when an error occurs in the process of the first BIOS And a control step.

  According to at least one of the above aspects, the computer replicates the normally operating first BIOS to the spare memory as the second BIOS. When an error occurs during the processing of the first BIOS, the OS rewrites the address of the first BIOS in which the error has occurred with the address of the second BIOS and executes it. Thereby, even when an error occurs during the processing of the first BIOS and the system stops operating, the BIOS processing can be continued without terminating the computer.

It is a schematic block diagram which shows the hardware constitutions of the information processing apparatus 1 which concerns on one Embodiment of this invention. It is a schematic block diagram which shows the software structure of CPU100 which concerns on one Embodiment of this invention. It is a data table which shows an example of the service discrimination | determination table which the shared memory 420 which concerns on one Embodiment of this invention memorize | stores. It is a data table which shows an example of the interrupt vector table which concerns on one Embodiment of this invention. It is a flowchart which shows the flow of a process at the time of generation | occurrence | production of the BIOS error which concerns on one Embodiment of this invention. It is a flowchart which shows the flow of a process at the time of generation | occurrence | production of the hardware error which concerns on one Embodiment of this invention. It is a flowchart which shows the flow of a process at the time of generation | occurrence | production of the software error which concerns on one Embodiment of this invention. It is a flowchart which shows the flow of the process of flag confirmation which concerns on one Embodiment of this invention. It is a figure which shows the minimum structure of the information processing apparatus 1 by this embodiment.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a schematic block diagram showing a hardware configuration of an information processing apparatus 1 according to an embodiment of the present invention.
The information processing apparatus 1 includes a CPU 100, a main memory 200, a nonvolatile memory 300, a storage 400, and an interface 500.

The CPU 100 reads a program from the nonvolatile memory 300 or the storage 400, expands it in the main memory 200, and executes processing according to the program.
The main memory 200 is a volatile memory such as a RAM (Random Access Memory).
The nonvolatile memory 300 stores a BIOS 310 and a spare memory 320. Examples of the non-volatile memory 300 include a ROM (Read Only Memory) and a flash memory.

The storage 400 stores an OS 410 and a shared memory 420. Examples of the storage 400 include an HDD (Hard Disk Drive), an SSD (Solid State Drive), a magnetic disk, a magneto-optical disk, a CD-ROM (Compact Disc Read Only Memory), and a DVD-ROM (Digital Versatile Disc Read Only Memory). And semiconductor memory.
Further, the storage 400 may be an internal medium directly connected to the bus of the information processing apparatus 1 or may be an external medium connected to the information processing apparatus 1 via the interface 500 or a communication line.

The OS 410 performs basic computer management and control, such as input / output control, hardware management such as memory and hard disk, and process management.
The shared memory 420 is a memory area that can be read and written by each handler of the BIOS and each runtime service. The shared memory 420 stores a data table (hereinafter referred to as “service discrimination table”) having runtime service information.

  The main memory 200, the non-volatile memory 300, and the storage 400 are examples of storage devices.

The interface 500 is used when connecting to an external device. Examples of the interface 500 include USB (Universal Serial Bus), HDMI (High-Definition Multimedia Interface) (registered trademark), DVI (Digital Visual Interface), Bluetooth (registered trademark), and the like.
The interface 500 may be a hardware interface or a software interface.

FIG. 2 is a schematic block diagram showing a software configuration of the CPU 100 according to the embodiment of the present invention.
The CPU 100 functions as the duplication unit 110, the exception determination unit 120, the BIOS control unit 130, and the memory control unit 140 by executing the program.

  The duplication unit 110 duplicates the data and code of the BIOS 310 by securing an area in the spare memory 320. At this time, the source BIOS 310 is the first BIOS, and the BIOS copied to the spare memory 320 is the second BIOS. In addition, when duplicating the first BIOS, the duplication unit 110 may duplicate the second BIOS by securing another area in the nonvolatile memory 300 in addition to the spare memory 320, or in the main memory 200 or the storage 400. The second BIOS may be duplicated with an area reserved. A plurality of second BIOSes may be duplicated. In the following embodiment, the BIOS processing performed by the information processing apparatus 1 mainly uses the first BIOS.

  The exception determination unit 120 determines whether or not an exception handler or MCE handler interrupt occurs from the first BIOS. An exception handler is an interrupt handler that is generated when a software error occurs. The MCE handler is an interrupt handler that is generated when a hardware error occurs. When an interruption occurs, the exception determination unit 120 registers a flag item and each data item in a service determination table described later with reference to FIG. In the example of FIG. 3 of the present embodiment, the exception determination unit 120 registers an ON state flag, exception location data, exception location code, runtime service name, and handler name. If no interrupt has occurred, the exception determination unit 120 registers the flag item in the runtime service table as an OFF state.

FIG. 3 is a data table showing an example of the service determination table stored in the shared memory 420 according to an embodiment of the present invention.
The service determination table has a flag, exception data, exception code, runtime service name, and handler name.

  The flag is an item indicating whether an error has occurred in the first process of the first BIOS. The state where the flag is ON represents a state where an error has occurred in the first process of the first BIOS, and the state where the flag is OFF represents a state where the first process of the first BIOS can be continued. The exception data is an item representing the data content of the first process in which the exception process has occurred. The exception code is an item representing the program of the first process in which the exception process has occurred. The runtime service name is an item representing the name of the runtime service used in exception handling. The handler name is an item indicating the name of the interrupt handler used for the interrupt.

  Returning to the description of FIG. The BIOS control unit 130 controls the first process of the first BIOS and the second process of the second BIOS based on the determination result of the exception determination unit 120 and the instruction of the OS. When an exception occurs in the first process of the first BIOS, the BIOS control unit 130 stops the first process when the exception occurs.

  Next, the BIOS control unit 130 waits for an instruction to resume processing from the OS. When the BIOS control unit 130 receives a process restart instruction from the OS, the BIOS control unit 130 performs a second process corresponding to the first process of the first BIOS using the second BIOS. Then, the BIOS control unit 130 stops the second BIOS that has completed the second process, and restarts the process subsequent to the first process using the first BIOS. Thereby, in this embodiment, when exception processing occurs in the first BIOS, the BIOS operation can be continued without terminating the system.

  The memory control unit 140 controls at least one of data and addresses of the OS, the first BIOS, and the second BIOS. The memory control unit 140 allows the OS to refer to at least one of the second BIOS data and the second BIOS address. The memory control unit 140 allows the runtime service to refer to at least one of the data and address of the second BIOS. The memory control unit 140 rewrites the address of the first BIOS where the error has occurred and the address of the second BIOS.

  Specifically, the memory control unit 140 passes the address of the second BIOS to the OS as a pointer so that the OS can refer to it. When an error occurs in the first BIOS, the memory control unit 140, the address of the first process where the error of the first BIOS has occurred, the address of the second process of the second BIOS corresponding to the address of the first process, Rewrite.

  Note that the memory control unit 140 may rewrite only the address of the first process in which an error has occurred as the second process, or rewrite the addresses of all processes after the first process in which the error has occurred as the second process. Also good.

FIG. 4 is a data table showing an example of the interrupt vector table according to the embodiment of the present invention.
The interrupt vector table is a data table in which information on interrupt handlers is registered in advance for each cause of interrupt. The interrupt handler is the name of a handler such as an illegal exception handler or MCE handler. The interrupt vector table has a vector address, a vector number, an interrupt factor, and a default operation.

  The vector address represents the start address of the interrupt handler. The vector number represents an arbitrary number assigned to the data item of the interrupt vector. The cause of the interrupt indicates what kind of exception or interrupt has occurred. The operation when the definition is omitted represents the content of the operation performed in the function minimum mode. The interrupt handler registered in the service discrimination table is set in this interrupt vector table.

  In the minimal function mode, when the runtime service causing the exception is called from the OS, the operation when the definition of the interrupt vector table is omitted is returned based on the vector number of the service determination table. The function minimum mode is one of the operation modes of the runtime service. The runtime service in the minimum function mode performs a minimum predetermined operation necessary for operating the computer. Thus, when a software error occurs, the BIOS can perform a predetermined operation without terminating the system.

FIG. 5 is a flowchart showing a processing flow when a BIOS error occurs according to an embodiment of the present invention.
The duplication unit 110 reserves a storage area for duplicating the BIOS 310 in the spare memory 320 (step S100). The duplication unit 110 duplicates the BIOS 310 stored in the nonvolatile memory 300 to the spare memory 320 (step S101). In addition, the duplication unit 110 sets the BIOS 310 of the nonvolatile memory 300 as the first BIOS, the BIOS duplicated in the spare memory 320 as the second BIOS, and sets the BIOS handled by the OS as the first BIOS.

  The memory control unit 140 allows the OS to refer to the data and code of the second BIOS (step S102). The exception determination unit 120 determines whether an interrupt by the exception handler or the MCE handler, that is, an exception processing error occurs from the first BIOS (step S103).

  When an error occurs (step S103: YES), the BIOS control unit 130 stops the first process of the first BIOS when an error occurs based on the determination result of the exception determination unit 120 (step S104). . If no error has occurred (step S103: NO), the information processing apparatus 1 repeats step S103 until an error occurs.

  The memory control unit 140 rewrites the address of the first process in which the error of the first BIOS has occurred and the address of the second process of the second BIOS (step S105).

  The BIOS control unit 130 performs the second process using the second BIOS while the first process is stopped (step S106). The BIOS control unit 130 stops the second process of the second BIOS (Step 107). Then, the BIOS control unit 130 resumes the second process with the first process of the first BIOS (step S108).

FIG. 6 is a flowchart showing a processing flow when a hardware error occurs according to an embodiment of the present invention.
The exception determination unit 120 determines whether or not an MCE handler interrupt occurs from the type of the handler in the exception generated in the first BIOS, that is, whether or not a hardware error occurs (step S200).

When a hardware error has occurred (step S200: YES), the MCE handler specifies the runtime service used when the hardware error has occurred (step S201).
If no hardware error has occurred (step S200: NO), the information processing apparatus 1 repeats step S200 until a hardware error occurs.

  The exception determination unit 120 registers error content information such as a flag and the name of the runtime service specified by the MCE handler in the service determination table (step S202). Further, the exception determination unit 120 registers the flag item of the service determination table in the ON state.

  The memory control unit 140 passes the second BIOS pointer referred to by the OS to the runtime service (step S203). The MCE handler refers to the pointer of the second BIOS that can be referred to by the runtime service, and shifts the processing from the runtime service to the OS (step S204).

  The OS rewrites the first process address of the first BIOS and the second process address of the second BIOS. Next, the OS sends a process restart instruction to the BIOS control unit 130. When receiving a restart command from the OS, the BIOS control unit 130 performs the second process using the second BIOS (step S205). Then, when the second BIOS completes the second process, the BIOS control unit 130 resumes from the process subsequent to the first process of the first BIOS.

FIG. 7 is a flowchart showing the flow of processing when a software error occurs according to an embodiment of the present invention.
The exception determination unit 120 determines whether an exception handler interrupt occurs from the type of handler in the exception generated in the first BIOS, that is, whether a software error occurs (step S300).

If a software error has occurred (step S300: YES), the exception handler specifies the runtime service used at the time of the exception (step S301).
If no software error has occurred (step S300: NO), the information processing apparatus 1 repeats step S300 until a software error occurs.

  The exception determination unit 120 registers information on exception contents such as the flag and the name of the runtime service specified by the exception handler in the service determination table (step S302). Further, the exception determination unit 120 registers the flag item of the service determination table in the ON state.

  The memory control unit 140 passes the pointer of the second BIOS referred to by the OS to the runtime service (step S303). The exception handler refers to the pointer of the second BIOS that can be referred to by the runtime service, and shifts the processing from the runtime service to the OS (step S304).

  If an illegal exception occurs, a software bug has occurred, so the runtime service changes its own mode to the minimum function mode (step S305).

[Modification]
FIG. 8 is a flowchart showing a flow of flag confirmation processing according to a modification of the present invention.
The runtime service has a characteristic of referring to the service determination table (step S401). The runtime service refers to a flag registered when an error occurs from the service determination table (step S402).

  If the flag is ON (step S401: YES), it is determined whether it is a software error or a hardware error (step S402). If the flag is OFF (step S402: NO), the process is terminated.

  In the case of a software error (step S402: YES), the vector number is referenced from the service determination table, and the operation when the definition corresponding to the number is omitted from the interrupt vector table is performed as the minimum function mode (step S403). .

  In the case of a hardware error (step S402: NO), the interrupt handler specifies that an MCE SRAR has occurred (step S404). When receiving the restart command from the OS, the BIOS control unit 130 performs the second process using the second BIOS (step S405). The interrupt handler changes the pointer referred to by the handler to the pointer referred to by the OS, and ends the process (step S406).

FIG. 9 is a diagram illustrating a minimum configuration of the information processing apparatus 1 according to the present embodiment.
The information processing apparatus 1 according to the present embodiment only needs to include at least the duplication unit 110 and the BIOS control unit 130.

  The duplication unit 110 duplicates the data and code of the BIOS 310 by securing an area in the spare memory 320. At this time, the source BIOS 310 is the first BIOS, and the BIOS copied to the spare memory 320 is the second BIOS.

  The BIOS control unit 130 controls the first process of the first BIOS and the second process of the second BIOS. When an error occurs in the first process of the first BIOS, the BIOS control unit 130 stops the first process when an exception occurs.

  Next, the BIOS control unit 130 waits for an instruction to resume processing from the OS. When the BIOS control unit 130 receives a process restart instruction from the OS, the BIOS control unit 130 performs a second process corresponding to the first process of the first BIOS using the second BIOS. Then, the BIOS control unit 130 stops the second BIOS that has completed the second process, and restarts the process subsequent to the first process using the first BIOS. Thereby, in this embodiment, when exception processing occurs in the first BIOS, the BIOS operation can be continued without terminating the system.

  As described above, in the present embodiment, by having the duplicating unit 110 and the BIOS control unit 130, an uncorrectable error or the like occurs due to the influence of hardware, and the BIOS is broken due to a software bug. In both cases, the OS processing can be continued without terminating the system.

  The information processing apparatus described above has a computer system inside. When an exception occurs in the above-described BIOS, the process of continuing the OS processing is stored in a computer-readable recording medium in the form of a program, and this program is read and executed by the computer. The above processing is performed. Here, the computer-readable recording medium means a magnetic disk, a magneto-optical disk, a CD-ROM, a DVD-ROM, a semiconductor memory, or the like. Alternatively, the computer program may be distributed to the computer via a communication line, and the computer that has received the distribution may execute the program.

  1 is recorded on a computer-readable recording medium, and the program recorded on the recording medium is read into the computer system and executed, thereby executing the BIOS exception. Sometimes OS processing may continue. Here, the “computer system” includes an OS and hardware such as peripheral devices. The “computer system” includes a WWW system having a homepage providing environment (or display environment). The “computer-readable recording medium” refers to a storage device such as a flexible medium, a magneto-optical disk, a portable medium such as a ROM and a CD-ROM, and a hard disk incorporated in a computer system. Further, the “computer-readable recording medium” refers to a volatile memory (RAM) in a computer system that becomes a server or a client when a program is transmitted via a network such as the Internet or a communication line such as a telephone line. In addition, those holding programs for a certain period of time are also included.

  The program may be transmitted from a computer system storing the program in a storage device or the like to another computer system via a transmission medium or by a transmission wave in the transmission medium. Here, the “transmission medium” for transmitting the program refers to a medium having a function of transmitting information, such as a network (communication network) such as the Internet or a communication line (communication line) such as a telephone line. The program may be for realizing a part of the functions described above. Furthermore, what can implement | achieve the function mentioned above in combination with the program already recorded on the computer system, what is called a difference file (difference program) may be sufficient.

《Appendix》
A part or all of the above-described embodiment can be described as in the following supplementary notes, but is not limited thereto.

(Appendix 1)
A duplication unit that duplicates the first BIOS as a second BIOS in a spare memory that is a memory different from a memory in which the first BIOS in the nonvolatile memory is stored in advance;
When an error occurs in the process of the first BIOS, the BIOS control unit that stops the first process of the first BIOS and performs the second process of the error using the second BIOS;
An information processing apparatus comprising:

(Appendix 2)
The information processing apparatus according to claim 1, wherein when the second process is completed, the BIOS control unit stops the second process and restarts the first BIOS from a process subsequent to the first process.

(Appendix 3)
The information processing apparatus according to appendix 1 or 2, further comprising: a memory control unit that controls at least one of data and addresses of the OS, the first BIOS, and the second BIOS.

(Appendix 4)
The information processing apparatus according to claim 3, wherein the memory control unit enables an OS to refer to at least one of the data of the second BIOS and the address of the second BIOS.

(Appendix 5)
The information processing apparatus according to any one of claims 3 and 4, wherein the memory control unit enables a runtime service to refer to at least one of the data and address of the second BIOS.

(Appendix 6)
The information processing apparatus according to any one of appendices 3 to 5, wherein the memory control unit rewrites the address of the first BIOS in which the error has occurred and the address of the second BIOS.

(Appendix 7)
The information processing apparatus according to appendices 1 to 6, further comprising an exception determination unit that determines whether or not the error has occurred in the process of the first BIOS.

(Appendix 8)
Based on the determination result of the exception determination unit, when it is determined that the error has occurred, a runtime service that performs a minimum predetermined operation necessary for moving the computer is included.
The information processing apparatus according to appendix 7.

(Appendix 9)
One or more computers
A duplication step of duplicating the first BIOS as a second BIOS in a spare memory which is a memory different from a memory in which the first BIOS in the nonvolatile memory is stored in advance;
If an error occurs in the processing of the first BIOS, the BIOS control step of stopping the first BIOS at the first stop location and processing the error using the second BIOS;
An information processing method comprising:

(Appendix 10)
On one or more computers,
A duplication step of duplicating the first BIOS as a second BIOS in a spare memory which is a memory different from a memory in which the first BIOS in the nonvolatile memory is stored in advance;
If an error occurs in the processing of the first BIOS, the BIOS control step of stopping the first BIOS at the first stop location and processing the error using the second BIOS;
A program for running

DESCRIPTION OF SYMBOLS 1 ... Information processing apparatus 100 ... CPU
DESCRIPTION OF SYMBOLS 110 ... Duplicating part 120 ... Exception determination part 130 ... BIOS control part 140 ... Memory control part 200 ... Main memory 300 ... Non-volatile memory 310 ... BIOS
320 ... Spare memory 400 ... Storage 410 ... OS
420: Shared memory 500 ... Interface

Claims (10)

A duplication unit that duplicates the first BIOS as a second BIOS in a spare memory that is a memory different from a memory in which the first BIOS in the nonvolatile memory is stored in advance;
When an error occurs in the process of the first BIOS, the BIOS control unit that stops the first process of the first BIOS and performs the second process of the error using the second BIOS;
An information processing apparatus comprising: The information processing apparatus according to claim 1, wherein when the second process is completed, the BIOS control unit stops the second process and restarts the first BIOS from a process subsequent to the first process. The information processing apparatus according to claim 1, further comprising: a memory control unit that controls at least one of data and an address of the OS, the first BIOS, and the second BIOS. The information processing apparatus according to claim 3, wherein the memory control unit enables an OS to refer to at least one of the data of the second BIOS and the address of the second BIOS. The information processing apparatus according to claim 3, wherein the memory control unit enables a runtime service to refer to at least one of the data and address of the second BIOS. The information processing apparatus according to claim 3, wherein the memory control unit rewrites the address of the first BIOS in which the error has occurred and the address of the second BIOS. The information processing apparatus according to any one of claims 1 to 6, further comprising an exception determination unit that determines whether or not the error has occurred in the process of the first BIOS. Based on the determination result of the exception determination unit, when it is determined that the error has occurred, a runtime service that performs a minimum predetermined operation necessary for moving the computer is included.
The information processing apparatus according to claim 7. One or more computers
A duplication step of duplicating the first BIOS as a second BIOS in a spare memory which is a memory different from a memory in which the first BIOS in the nonvolatile memory is stored in advance;
A BIOS control step for stopping the first process of the first BIOS and performing the second process of the error using the second BIOS when an error occurs in the process of the first BIOS;
An information processing method comprising: On one or more computers,
A duplication step of duplicating the first BIOS as a second BIOS in a spare memory which is a memory different from a memory in which the first BIOS in the nonvolatile memory is stored in advance;
A BIOS control step for stopping the first process of the first BIOS and performing the second process of the error using the second BIOS when an error occurs in the process of the first BIOS;
A program for running

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