JP2019057611A - Semiconductor device and power conversion device - Google Patents

Abstract

An object of the present invention is to provide a technology capable of improving the heat dissipation of a semiconductor element and improving the reliability of a semiconductor device.
A semiconductor device 202 includes a case unit 2 having a wall 2b and provided with a terminal 4, and a terminal 3 incorporated in the case unit 2 and joined to the terminal 4. The terminal 4 extends upward from the wall 2b, the terminal 3 extends upward from the semiconductor element 1 so as to face the terminal 4, and has a hole 10, and the terminal 4 and the terminal 3, the surface area of the terminal 3 is smaller than the surface area of the terminal 4.
[Selection] Figure 2

Description

  The present invention relates to a semiconductor device used for an inverter for controlling a motor such as an electric vehicle and a train, and a converter for regeneration, and a power conversion device including the semiconductor device.

  In a conventional semiconductor device, a semiconductor element is incorporated in a case unit, and a terminal provided on the semiconductor element and a terminal provided on the case unit are welded. In order to perform good welding, it is known that the tip of the terminal has a crown shape (see, for example, Patent Document 1).

  In addition, since conduction between both terminals is essential, the tip end side of the terminal of the semiconductor element is inclined toward the terminal side of the case unit so that the tip ends of both terminals can easily come into contact with each other.

JP 2009-193928 A

  However, since the tip side of the terminal of the semiconductor element is inclined toward the terminal side of the case unit, when the semiconductor element is assembled in the case unit, the frictional resistance between the terminal of the semiconductor element and the terminal of the case unit is generated. There was a problem that the semiconductor element could not be pushed down to the lowest point.

  When the semiconductor element cannot be pushed down to the lowest point, the grease applied to the back surface of the semiconductor element does not spread and heat dissipation is deteriorated. As a result, there is a problem that the reliability of the semiconductor device is lowered.

  Therefore, an object of the present invention is to provide a technique capable of improving the heat dissipation of a semiconductor element and improving the reliability of a semiconductor device.

  A semiconductor device according to the present invention includes a case unit having a wall portion and provided with a first terminal, and a second terminal incorporated in the case unit and joined to the first terminal. The first terminal extends upward from the wall portion, the second terminal extends upward from the semiconductor element so as to face the first terminal, and has a hole. In the range where the first terminal and the second terminal overlap, the surface area of the second terminal is smaller than the surface area of the first terminal.

  According to the present invention, since the surface area of the second terminal is smaller than the surface area of the first terminal in a range where the first terminal and the second terminal overlap, the first terminal and the second terminal when the semiconductor element is incorporated in the case unit. The frictional resistance with the terminal is reduced, and the semiconductor element is easily pushed to the lowest point. Thereby, grease spreads between the semiconductor element and the case unit, and the heat dissipation of the semiconductor element is improved, so that the reliability of the semiconductor device is improved.

1 is a schematic cross-sectional view of a semiconductor device according to a first embodiment. FIG. 3 is a schematic diagram of a terminal and a periphery of a semiconductor element provided in the semiconductor device according to the first embodiment. FIG. 3 is a schematic diagram of a terminal and a periphery of a case unit provided in the semiconductor device according to the first embodiment. FIG. 5 is a schematic cross-sectional view of a terminal and a periphery of a semiconductor element provided in a semiconductor device according to a second embodiment. 6 is a schematic cross-sectional view of a semiconductor device according to a third embodiment. FIG. It is a block diagram which shows the structure of the power conversion system to which the power converter device which concerns on Embodiment 4 is applied. It is a schematic sectional drawing of the semiconductor device which concerns on a premise technique. It is the schematic of the terminal and periphery of a semiconductor element with which the semiconductor device which concerns on a premise technique is equipped.

<Embodiment 1>
Embodiment 1 of the present invention will be described below with reference to the drawings. FIG. 1 is a schematic cross-sectional view of a semiconductor device 202 according to the first embodiment. FIG. 2 is a schematic diagram of the terminal 3 and the periphery of the semiconductor element 1 provided in the semiconductor device 202. FIG. 3 is a schematic diagram of the terminal 4 and the periphery of the case unit 2 provided in the semiconductor device 202.

  As shown in FIG. 1, the semiconductor device 202 includes a case unit 2 and a semiconductor element 1. The case unit 2 includes a bottom 2a, a wall 2b, and a step 2c. The bottom portion 2 a constitutes the bottom surface of the case unit 2, and the wall portion 2 b constitutes the side surface of the case unit 2. The step 2c is provided on the inner surface of the lower end of the wall 2b.

  The semiconductor element 1 is disposed on the bottom 2 a via the grease 8 printed on the back surface of the semiconductor element 1 in a state spaced from the wall 2 b, and is incorporated in the case unit 2.

  On the inner surface of the wall 2b of the case unit 2, a terminal 4 extending upward is provided. More specifically, the terminal 4 is L-shaped, extends from the inner surface of the wall 2b to the semiconductor element 1 side along the upper surface of the step 2c, is bent near the tip of the step 2c, and extends upward. ing.

  A terminal 3 extending upward is provided on the side surface of the semiconductor element 1 so as to face the terminal 4 of the case unit 2. More specifically, the terminal 3 is L-shaped, extends from the side surface of the semiconductor element 1 to the wall 2b side of the case unit 2, is bent near the tip of the step 2c, and extends upward. Note that the terminal 4 corresponds to the first terminal, and the terminal 3 corresponds to the second terminal.

  Since the terminal 3 and the terminal 4 are welded, the terminal 3 is disposed in a state in which an upwardly extending portion including the distal end side thereof is inclined toward the terminal 4 side so that both the terminals 3 and 4 can be easily contacted.

  As shown in FIG. 2, the terminal 3 has a crown shape. More specifically, the terminal 3 is provided with a recess 3a in which the central portion of the tip is recessed downward. The terminal 3 has a hole 10 below the recess 3a. As shown in FIG. 3, the terminal 4 has a crown shape. More specifically, the terminal 4 is provided with a recess 4a in which the central portion of the tip is recessed downward. The terminal 4 is not provided with a hole below the recess 4a.

  As described above, by providing the hole 10 in the terminal 3, the surface area of the terminal 3 is smaller than the surface area of the terminal 4 in a range where the terminal 4 and the terminal 3 overlap each other. Thereby, the contact area of the terminal 3 and the terminal 4 can be made small. The shape of the hole 10 may be circular or polygonal, and may be any shape as long as the surface area of the terminal 3 is smaller than the surface area of the terminal 4 in a range where the terminal 4 and the terminal 3 overlap.

  Next, the operation and effect of the semiconductor device 202 according to the first embodiment will be described in comparison with the semiconductor device 212 according to the base technology. FIG. 7 is a schematic cross-sectional view of the semiconductor device 212 according to the base technology. FIG. 8 is a schematic diagram of the terminal 33 and the periphery of the semiconductor element 1 provided in the semiconductor device 212.

  As shown in FIG. 8, since the hole 33 is not provided in the terminal 33 of the semiconductor element 1 provided in the semiconductor device 212 according to the base technology, the terminal 33 of the semiconductor element 1 is compared with the case of the first embodiment. The contact area with the terminal 4 of the case unit 2 was large. Therefore, as shown in FIG. 7, the upwardly extending portion including the tip end side of the terminal 33 is inclined toward the terminal 4 side. Therefore, when the semiconductor element 1 is incorporated into the case unit 2, the terminal 33 and the terminal 4 are arranged. There was a problem that the semiconductor element 1 could not be pushed down to the lowest point due to the frictional resistance. When the semiconductor element 1 cannot be pushed down to the lowest point, the grease 8 printed on the back surface of the semiconductor element 1 does not spread, so that a region 9 where the grease 8 does not exist is formed between the semiconductor element 1 and the bottom 2a. Thereby, the heat dissipation of the semiconductor element 1 is deteriorated, and there is a problem that the reliability of the semiconductor device 212 is reduced.

  On the other hand, in the semiconductor device 202 according to the first embodiment, since the surface area of the terminal 3 is smaller than the surface area of the terminal 4 in a range where the terminal 4 and the terminal 3 overlap, the semiconductor element 1 is placed inside the case unit 2. When assembled, the frictional resistance between the terminal 4 and the terminal 3 is reduced, and the semiconductor element 1 is easily pushed to the lowest point. As a result, the grease 8 spreads between the semiconductor element 1 and the bottom 2a and the heat dissipation of the semiconductor element 1 is improved, so that the reliability of the semiconductor device 202 is improved. As described above, the yield of the semiconductor device 212 can be improved.

<Embodiment 2>
Next, a semiconductor device according to the second embodiment will be described. FIG. 4 is a schematic cross-sectional view of the terminal 3A and the periphery of the semiconductor element 1 provided in the semiconductor device according to the second embodiment. In the second embodiment, the same components as those described in the first embodiment are denoted by the same reference numerals, and the description thereof is omitted.

  As shown in FIG. 4, in the second embodiment, the terminal 3 </ b> A of the semiconductor element 1 further has a cut 11 provided on the surface opposite to the contact surface with the terminal 4. The notch 11 is provided on the inner surface of the terminal 3A slightly on the tip side from the bent portion of the terminal 3A. As a result, the rigidity of the terminal 3A is reduced, and when the semiconductor element 1 is assembled into the case unit 2, the portion extending upward including the tip side of the terminal 3A is inclined to the semiconductor element 1 side, whereby the terminal 4 and the terminal 3A. And the semiconductor element 1 is more easily pushed to the lowest point.

  As described above, in the semiconductor device according to the second embodiment, the terminal 3 </ b> A further includes the notch 11 provided on the surface opposite to the contact surface with the terminal 4. Therefore, since the rigidity of the terminal 3A is reduced, it becomes easier to push the semiconductor element 1 to the lowest point, and an improvement in the spread state of the grease 8 between the semiconductor element 1 and the bottom 2a can be expected.

<Embodiment 3>
Next, a semiconductor device 202A according to the third embodiment will be described. FIG. 5 is a schematic cross-sectional view of a semiconductor device 202A according to the third embodiment. In the third embodiment, the same components as those described in the first and second embodiments are denoted by the same reference numerals, and the description thereof is omitted.

  As shown in FIG. 5, in the third embodiment, the terminal 3 </ b> B of the semiconductor element 1 further has a semicircular convex portion 12 provided on the contact surface with the terminal 4. More specifically, the convex portion 12 is provided on the surface on the terminal 4 side at the tip of the terminal 3B. Thereby, since the contact between the terminal 4 and the terminal 3B becomes a point contact, the frictional resistance between the terminal 4 and the terminal 3B is reduced, and it becomes easier to push the semiconductor element 1 to the lowest point. In this case, the terminal 3 </ b> B may be arranged in a state in which a portion extending upward including the tip end side is inclined to the side opposite to the terminal 4.

  As described above, in the semiconductor device 202 </ b> A according to the third embodiment, the terminal 3 </ b> B further includes the convex portion 12 provided on the contact surface with the terminal 4. Accordingly, since the contact between the terminal 4 and the terminal 3B becomes a point contact, the frictional resistance between the terminal 4 and the terminal 3B is reduced, and the semiconductor element 1 is further easily pushed to the lowest point. Thereby, the expansion state of the grease 8 between the semiconductor element 1 and the bottom 2a can be expected.

  Furthermore, since the terminal 3B is disposed in a state in which the tip side is inclined to the opposite side to the terminal 4, it is difficult to contact the terminal 4 at a portion other than the convex portion 12, and the semiconductor element is more than the case where the convex portion 12 is provided. It becomes easier to push 1 to the lowest point.

<Embodiment 4>
In the present embodiment, the semiconductor device according to the first embodiment described above is applied to a power conversion device. Although the present invention is not limited to a specific power converter, hereinafter, a case where the present invention is applied to a three-phase inverter will be described as a fourth embodiment.

  FIG. 6 is a block diagram illustrating a configuration of a power conversion system to which the power conversion apparatus according to Embodiment 4 is applied.

  The power conversion system illustrated in FIG. 6 includes a power supply 100, a power conversion device 200, and a load 300. The power source 100 is a DC power source and supplies DC power to the power conversion device 200. The power source 100 can be composed of various types, for example, can be composed of a direct current system, a solar battery, a storage battery, or can be composed of a rectifier circuit or an AC / DC converter connected to the alternating current system. Also good. The power supply 100 may be configured by a DC / DC converter that converts DC power output from the DC system into predetermined power.

  The power conversion device 200 is a three-phase inverter connected between the power supply 100 and the load 300, converts the DC power supplied from the power supply 100 into AC power, and supplies the AC power to the load 300. As shown in FIG. 6, the power conversion device 200 converts a DC power into an AC power and outputs the main conversion circuit 201, and a control circuit 203 outputs a control signal for controlling the main conversion circuit 201 to the main conversion circuit 201. And.

  The load 300 is a three-phase electric motor that is driven by AC power supplied from the power conversion device 200. Note that the load 300 is not limited to a specific application, and is an electric motor mounted on various electric devices. For example, the load 300 is used as an electric motor for a hybrid vehicle, an electric vehicle, a railway vehicle, an elevator, and an air conditioner.

  Hereinafter, details of the power conversion device 200 will be described. The main conversion circuit 201 includes a switching element and a free wheel diode (not shown). When the switching element switches, the main conversion circuit 201 converts the DC power supplied from the power supply 100 into AC power and supplies the AC power to the load 300. Although there are various specific circuit configurations of the main conversion circuit 201, the main conversion circuit 201 according to the present embodiment is a two-level three-phase full bridge circuit, and includes six switching elements and respective switching elements. It can be composed of six anti-parallel diodes. Each switching element and each free-wheeling diode of the main conversion circuit 201 are configured by a semiconductor device corresponding to any one of the first to third embodiments. Here, a case where the semiconductor device 202 according to the first embodiment is configured will be described. The six switching elements are connected in series for each of the two switching elements to constitute upper and lower arms, and each upper and lower arm constitutes each phase (U phase, V phase, W phase) of the full bridge circuit. The output terminals of the upper and lower arms, that is, the three output terminals of the main conversion circuit 201 are connected to the load 300.

  The main conversion circuit 201 includes a drive circuit (not shown) that drives each switching element. However, the drive circuit may be built in the semiconductor device 202 or a drive circuit may be provided separately from the semiconductor device 202. The structure provided may be sufficient. The drive circuit generates a drive signal for driving the switching element of the main conversion circuit 201 and supplies the drive signal to the control electrode of the switching element of the main conversion circuit 201. Specifically, in accordance with a control signal from the control circuit 203 described later, a drive signal for turning on the switching element and a drive signal for turning off the switching element are output to the control electrode of each switching element. When the switching element is kept on, the drive signal is a voltage signal (on signal) that is equal to or higher than the threshold voltage of the switching element. When the switching element is kept off, the drive signal is a voltage that is equal to or lower than the threshold voltage of the switching element. Signal (off signal).

  The control circuit 203 controls the switching element of the main conversion circuit 201 so that desired power is supplied to the load 300. Specifically, based on the power to be supplied to the load 300, the time (ON time) during which each switching element of the main converter circuit 201 is to be turned on is calculated. For example, the main conversion circuit 201 can be controlled by PWM control that modulates the ON time of the switching element in accordance with the voltage to be output. Then, a control command (control signal) is supplied to the drive circuit included in the main conversion circuit 201 so that an ON signal is output to the switching element that should be turned on at each time point and an OFF signal is output to the switching element that should be turned off. Is output. The drive circuit outputs an ON signal or an OFF signal as a drive signal to the control electrode of each switching element in accordance with the control signal.

  In the power conversion device according to the present embodiment, since the semiconductor device according to the first embodiment is applied as the switching element and the free wheel diode of the main conversion circuit 201, the reliability can be improved.

  In the present embodiment, the example in which the present invention is applied to the two-level three-phase inverter has been described. However, the present invention is not limited to this, and can be applied to various power conversion devices. In the present embodiment, a two-level power converter is used. However, a three-level or multi-level power converter may be used. When power is supplied to a single-phase load, the present invention is applied to a single-phase inverter. You may apply. Further, when power is supplied to a direct current load or the like, the present invention can be applied to a DC / DC converter or an AC / DC converter.

  The power conversion device to which the present invention is applied is not limited to the case where the load described above is an electric motor. For example, the power supply of an electric discharge machine, a laser machine, an induction heating cooker, and a non-contact device power supply system It can also be used as a device, and can also be used as a power conditioner for a photovoltaic power generation system, a power storage system, and the like.

  It should be noted that the present invention can be freely combined with each other within the scope of the invention, and each embodiment can be appropriately modified or omitted.

  DESCRIPTION OF SYMBOLS 1 Semiconductor element, 2 Case unit, 2b Wall part, 3,3A, 3B terminal, 4 terminal, 10 hole, 11 notch, 12 convex part, 201 Main conversion circuit, 202,202A Semiconductor device, 203 Control circuit.

Claims (5)

A case unit having a wall and provided with a first terminal;
A semiconductor element provided in the case unit and provided with a second terminal joined to the first terminal;
With
The first terminal extends upward from the wall;
The second terminal extends upward from the semiconductor element so as to face the first terminal, and has a hole.
The semiconductor device, wherein a surface area of the second terminal is smaller than a surface area of the first terminal in a range where the first terminal and the second terminal overlap.   The semiconductor device according to claim 1, wherein the second terminal further includes a cut provided on a surface opposite to a contact surface with the first terminal.   The semiconductor device according to claim 1, wherein the second terminal further includes a convex portion provided on a contact surface with the first terminal.   4. The semiconductor device according to claim 3, wherein the second terminal is arranged in a state in which a distal end side is inclined to the opposite side to the first terminal. A main conversion circuit comprising the semiconductor device according to any one of claims 1 to 4 for converting and outputting input power;
A control circuit for outputting a control signal for controlling the main conversion circuit to the main conversion circuit;
A power conversion device comprising:

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