JP2010078807A - Active matrix type display device, method of manufacturing the same, and method of driving the same - Google Patents

Abstract

An aging process of a display device is performed with a large current in a short time.
A control line in which pixels having a light emitting element, a source and a drain having a power source and a driving transistor connected to the light emitting element are arranged in a matrix and commonly connected to pixels arranged in a row direction. And a signal line commonly connected to the pixels arranged in the column direction, selecting a pixel for each row by the control line, and writing a signal from the signal line to the selected pixel,
A first mode in which a voltage of a power source is applied to the light emitting element via the driving transistor; and a second mode in which a current is supplied from the power source to the light emitting element based on the gate voltage of the driving transistor to cause the light emitting element to emit light. Have
Switching means for switching between a fixed signal to be written to the pixel to operate the driving transistor in the first mode and an image signal to be written to the pixel to operate the driving transistor in the second mode to be applied to the signal line Equipped with.
[Selection] Figure 1

Description

  The present invention relates to an active matrix display device that displays an image based on an input video signal, and in particular, an active matrix display device that displays an image by inputting a current signal corresponding to display to each pixel, and its manufacture The present invention relates to a method and a driving method thereof.

  An active matrix display device using organic electroluminescence (EL) elements has a higher gray scale for each pixel compared to the simple matrix method in which the electrodes are arranged in a grid and the light emission is controlled only by on / off operation. Can be turned on. Therefore, this active matrix display device can realize a display with a high contrast ratio and a high response speed.

  The EL display device includes an image display unit in which pixels are arranged, and a drive circuit for processing signal information such as a video signal input from the outside and sending it to each pixel of the image display unit. Among the drive circuits, a drive control circuit built in the same display panel as the image display unit is usually configured using thin film transistors (TFTs). Also, TFTs are mainly used as drive transistors for controlling the light emission state of EL elements in each pixel.

  In recent years, EL devices driven by TFTs using organic thin films have improved the efficiency of carrier injection from the electrodes and improved the internal quantum efficiency of specific materials such as phosphorescence in order to improve the light emission efficiency. The characteristics are close to practical use. In addition, the organic light-emitting layer is made of a low-molecular material that can be vacuum-deposited, or a manufacturing method that uses a high-molecular material such as a roll-to-roll method or an inkjet method that can form a film at a low temperature. Many methods have been proposed. And in these methods, development which raises luminous efficiency is performed, respectively.

  On the other hand, the EL device has the following problems in order to obtain stable light emission characteristics when commercialized.

  In the current EL element, the element deteriorates in proportion to the integrated amount of the drive time and the drive current amount. Therefore, the light emission luminance after the elapse of a specific time is lowered under the same driving conditions. As shown in the example of FIG. 12, the deterioration characteristic has an initial deterioration in which the luminance deterioration suddenly occurs in the initial stage of production within the period t1, and the deterioration rate is slower than the initial deterioration in the subsequent period t2. There will be late deterioration, and the rate of deterioration is not constant.

  Therefore, an aging process is performed at the time of shipment from the factory so as to pass the initial deterioration so that the light-emitting element is commercialized with characteristics in a late deterioration state where the deterioration of the light emitting element is relatively gradual. In the aging state, the initial deterioration is passed in a short time by injecting more current into the light emitting element than in the normal display state.

Patent Document 1 describes that an organic light emitting layer is aged at a current density of 5 to 1000 times the current density during driving.
Japanese Patent Laid-Open No. 8-185979

  Active matrix pixels for driving organic EL elements are roughly classified into two driving methods. The first driving method is a current driving method in which a current is written into a driving transistor and a current is injected into a display element. The second driving method is a method in which a voltage is written in a driving transistor and the driving transistor is mainly switched to a power source. This is a voltage drive system in which power is directly injected from the power source.

  The current drive method has an advantage that it can be designed to suppress variations in drive transistors in a pixel because current information to be injected into an organic EL element is mainly built in a column control unit and line sequential writing is performed. The two-dimensional brightness variation can be suppressed. However, it is difficult to realize stable driving characteristics of the driving transistor in the pixel that drives a large current necessary for aging and the driving transistor in the column control circuit that writes the driving transistor. Therefore, it takes time for the aging process, and it is difficult to avoid the yield deterioration during the manufacturing.

  In the voltage driving method, a driving transistor in a pixel is used as a switch, and in gradation expression, the driving transistor is ON / OFF time in one field by PWM driving. Since power supply to the display element is mainly performed from the power supply, the luminance unevenness in the display region depending on the characteristics of the driving transistor tends to be relatively suppressed. And since it can drive to the drive capability limit of a display element, a large current can be inject | poured in an aging state and it can process in a short period. However, in the voltage driving method in the normal display state, the organic EL element is more easily affected by the power supply impedance than the current driving method, and the luminance variation is likely to cause the phenomenon of shading and smear. Further, it is required to change the IV characteristic so that the light emission efficiency of each color is prepared independently or if the same power supply line is used, the light emission efficiency of each color is uniform.

In the present invention, pixels each having a light emitting element and a source and a drain connected to a power supply line and a driving transistor connected to the light emitting element are arranged in a matrix and commonly connected to the pixels arranged in a row direction. A control line and a signal line commonly connected to the pixels arranged in a column direction, the pixel is selected for each row by the control line, and a signal is transmitted from the signal line to the selected pixel. An active matrix display device for writing,
Based on a first mode in which a voltage of the power supply line is applied to the light emitting element via the driving transistor and a gate voltage of the driving transistor, a current is supplied from the power supply line to the light emitting element, and the light emitting element is supplied. And a second mode for emitting light,
A fixed signal written to the pixel to operate the driving transistor in the first mode and an image signal written to the pixel to operate the driving transistor in the second mode are switched to the signal line. It is characterized by providing switching means for giving.

Further, according to the present invention, pixels each having a light emitting element, a source and a drain connected to a power supply line and a driving transistor connected to the light emitting element are arranged in a matrix and commonly connected to the pixels arranged in a row direction. A control line and a signal line commonly connected to the pixels arranged in a column direction, and applying a control signal to the control line to select the pixel for each row, to the selected pixel An active matrix display device manufacturing method for displaying an image by writing an image signal from the signal line and supplying a current corresponding to the image signal from the power line to the light emitting element to cause the light emitting element to emit light. And
Forming the pixel, the control line, the signal line, and means for applying a signal to the control line and the signal line;
The control signal is applied to the control line to select the pixel for each row, a fixed signal is written to the selected pixel from the signal line, and the voltage of the power supply line is applied to the light emitting element via the driving transistor. And a step of applying.

Further, according to the present invention, pixels each having a light emitting element, a source and a drain connected to a power supply line and a driving transistor connected to the light emitting element are arranged in a matrix and commonly connected to the pixels arranged in a row direction. A driving method of an active matrix display device having control lines and signal lines commonly connected to the pixels arranged in a column direction,
The control signal is applied to the control line to select the pixel for each row, and a fixed signal is written from the signal line to the selected pixel, whereby the power supply line is connected to the light emitting element via the drive transistor. A first drive mode for applying a voltage of
Applying the control signal to the control line to select the pixel for each row, and writing an image signal from the signal line to the selected pixel, thereby supplying a current based on the image signal from the power line to the light emitting element And switching to a second driving mode in which the light emitting element emits light.

  The present invention relates to an active matrix display device and a manufacturing method and a driving method thereof, and is particularly applied to an active matrix display device using a current drive display element such as an organic EL.

  Several information display devices can be constructed using this display device. This information display device is a mobile phone, a mobile computer, a still camera, a video camera, or a device having a plurality of functions thereof.

  Some information display devices include an information input unit. The information input unit of the cellular phone includes an antenna. The information input unit of the PDA or mobile PC includes an interface unit for the network. An information input unit of a still camera or a movie camera includes a sensor unit such as a CCD or a CMOS.

  According to the present invention, in the display state, the current is controlled by the driving transistor that drives the organic EL element, and the current corresponding to the image signal is injected into the organic EL element. Is obtained. In the aging state, the power supply line voltage is directly applied to the EL element via the drive transistor, so that a current exceeding the saturation characteristic of the drive transistor can be injected into the EL element, and a short-term aging is possible.

  Hereinafter, the best mode for carrying out a display device according to the present invention will be specifically described with reference to the drawings. Although this embodiment is applied to an active matrix display device using EL elements, the light emitting elements are not limited to EL elements.

(First embodiment)
FIG. 1 is a block diagram showing the overall configuration of a display device according to a first embodiment of the present invention.

  The pixels 3 are arranged in a matrix (n rows and m columns) in the display area 5. The pixels in the display area are commonly connected by control lines in the row direction (horizontal direction in FIG. 1) and commonly connected by signal lines in the column direction (vertical direction in FIG. 1).

The row control circuit 7 receives the horizontal synchronization signal lk and the scan start signal vs. The row control circuit 7 outputs control signals to control lines p1 (1), p1 (2)... P1 (n) provided for each row. The control line p1 is commonly connected to the pixels 3 arranged in the same row. (Hereinafter, when parentheses and line numbers in them are omitted, it indicates a control line in an arbitrary line. The same applies to other symbols.)
A sampling control signal sp, a clock signal k, and a video signal video are input to the column control circuit 6 serving as an image signal generating circuit. The column control circuit 6 converts the video signal video and outputs an image signal to the signal lines Dl (1), Dl (2)... Dl (m). Each signal line is connected in common to the pixels 3 arranged in the same column.

  In the present embodiment, transistors MN3 (1), MN3 (2)... MN3 (m), which are signal switching means, are arranged on the signal lines in each column. The drains of the transistors MN3 (1) to MN3 (m) are connected to the signal lines of the respective columns, and the sources are connected to a ground potential serving as a fixed signal source. Further, the mode switching line p2 is commonly connected to the gates of the transistors MN3 (1) to MN3 (m).

  FIG. 2 shows a configuration example of the pixel 3.

  The pixel 3 includes a drive transistor MP1, transistors MP2, MN1, and MN2 that operate as switches, a capacitor C1, and an EL element 1. Connected to this are the control line p1 and signal line D1 in FIG. 1, and a power supply line 2 for supplying a constant voltage (VDD) from a power supply (not shown). (In FIG. 1, the power supply line 2 is omitted.) One end of the EL element is at ground (ground) potential.

  The power supply line 2 is connected to the source of the driving transistor MP1, and the gate is connected to one terminal of the capacitor C1 and one terminal of the switch MN1. The other terminal of the capacitor C1 is connected to the power line 2. The other terminal of the switch MN1 is connected to the drain of the driving transistor MP1, and is connected to one terminal of the switch MP2. The other terminal of the switch MP2 is connected to the anode electrode of the organic EL element 1.

  One terminal of the switch MN2 is further connected to the drain of the driving transistor MP1, and the other terminal is connected to the signal line Dl. The gates of the switches MN1, MN2, and MP2 are connected to a common control line p1.

  Here, the switches MN1 and MN2 use N-type field effect transistors, and the switch MP2 uses P-type field effect transistors. However, the N-type transistor may be changed to a P-type polarity transistor and the P-type transistor may be changed to an N-type polarity transistor according to the manufacturing process or TFT characteristics.

Next, the operation of each pixel 3 will be described.
(Write operation)
When the output p1 becomes H level, the pixels in the row are in the ON state, the switch MP2 is in the OFF state, and the drive transistor MP1 is in the diode connection state in FIG. In this state, each current signal generated by the signal conversion circuit 4 changes the gate voltage of the drive transistor MP1 through the signal line Dl to become a current value corresponding to the current of the signal conversion circuit 4, and the gate voltage is stored in the capacitor C1. It is done.
(Display operation)
When the output p1 becomes L level, the switches MN1 and MN2 in FIG. 2 are turned off and the switch MP2 is turned on. The drive transistor MP1 injects a constant current determined by the voltage stored in the capacitor C1 at the time of writing into the organic EL element 1. As a result, the EL element emits light.

  In the display operation, the current flowing through the EL element is determined by the voltage of the capacitor C1, and it is necessary not to depend on the power supply voltage or the voltage-current characteristics of the EL element. For this reason, the driving transistor is operated in a saturation region.

In the saturation region of a P-channel MOS transistor, the gate potential VG, source potential VS, and drain potential VD
VS−VG> Vth and VD <VG
This is an operating range that satisfies the above relationship. Vth is a threshold voltage at which the transistor becomes conductive.

In the saturation region, the drain current is determined solely by the gate-source voltage and basically does not depend on the drain-source voltage. In contrast,
VS−VG> Vth and VD> VG
In the linear region, the drain current is proportional to the drain-source voltage, and the transistor functions as an analog switch.

  FIG. 3 shows a circuit configuration of the column control circuit 6.

In FIG. 3, Dh1, Dh2,..., Dhm are registers, MS1, MS2,..., MSm are switch transistors, 4 (1), 4 (2),. , Dl (1), Dl (2),..., Dl (m) are signal lines. (The number in parentheses for each symbol represents the column number. If () is omitted below, it indicates that in any column.)
Dh1, Dh2,..., Dhm are each a D-type flip-flop circuit that latches the signal input to the data terminal D in synchronization with the rising timing of the clock signal k and outputs it to the output terminal Q.

  Dh1, Dh2,..., Dhm each input the output of the previous stage to the data terminal D and the output terminal Q as the input of the next stage, so that the input signal D of the first stage Dh1 is changed by one cycle of the clock signal k. A shift register for transferring data one after another with a delay is configured.

  The video signal video is commonly input to one terminal of the transistors MS1 to MSm, and the other terminal is connected to the signal conversion circuits 4 (1), 4 (2)... 4 (m), respectively. The output of the signal conversion circuit 4 is signal lines Dl (1), Dl (2)... Dl (m) which are signal lines.

  The operation of the column control circuit 6 will be described with reference to the timing chart of FIG.

  The sampling start signal sp input to the data terminal D of the first-stage register Dh1 becomes H (High) level only for one period of the clock signal k. The register Dh1 latches the sampling start signal sp in synchronization with the rising timing of the clock signal k and outputs it from the output terminal Q as the sampling signal p5 (1).

  In synchronization with the next rise of the clock signal k, the output p5 (1) returns to the L (Low) level, and at the same time, the output p5 (2) of the next register Dh2 changes to the H level. In this way, the sampling signal sp (1) that is at the H level during the section th (1) is generated.

  Since the output terminal Q of the register Dh1 is connected to the data terminal D of the register Dh2 at the next stage, the signals are shifted one after another, and the shift operation is continued until the section th (m). As a result, sampling signals p5 (2),..., P5 (m) that are delayed by one clock cycle from p5 (1) are generated.

  The video signal video is a signal in which image information is serially transmitted from the outside, and changes the amplitude of the voltage or current in accordance with the image information.

  When the sampling signal p5 is in the H level, the switch transistor MS is turned on, and the video signal video is sampled and input to the signal conversion circuit 4 in that column.

  FIG. 4 is a circuit diagram of one signal conversion circuit 4.

  The video signal video is input to the drain of the transistor MN6. The transistor MN6 has a drain-gate short-circuited and a capacitor C2. The source of the transistor MN6 and one end of the capacitor C2 are connected to the ground potential (ground). The gate of the transistor MN6 is connected to the gate of the transistor MN5. The source of the transistor MN5 is connected to the ground, and the drain is the output of the signal conversion circuit 4 and is connected to the signal line Dl.

  The video signal sampled and input to the signal conversion circuit 4 is directly stored in the capacitor C2 if it is a voltage signal, and if it is a current signal, the gate voltage of the diode-connected transistor MN6 is stored in the capacitor C2. It is done. When output to the signal line Dl, a current signal converted and amplified in accordance with the LW size ratio of the transistors MN6 and MN5 is output. The LW size ratio is determined on the input side by the wiring impedance with the driver circuit (IC) input to the display device, the pin capacitance, and the characteristics of the organic EL element 1 as the display element on the output side. Further, the case where a current signal is output to the signal line has been described. However, when current writing is difficult due to the above-described wiring impedance and pin capacitance, a source follower circuit is used instead of the transistor MN5, and C2 is used. The stored voltage may be output to the signal line as it is.

  FIG. 6 is a block diagram showing the configuration of the row control circuit 7, and FIG. 7 is a timing chart showing the operation thereof.

  The row control circuit 7 is composed of a shift register including register columns Dv1-Dvn.

  The scanning start signal vs is input to the first stage register Dv1 as a signal for one cycle of the horizontal synchronization clock signal lk. The register Dv1 latches the signal at the data terminal D at the rising timing of the horizontal synchronization clock signal lk and outputs it to the output terminal Q. The output is connected to the data terminal D of the register Dv2 at the next stage.

  Since vs is at the L level at the rising timing of the next clock, the output p1 (1) returns to the L level and the output p1 (2) of the next register Dv2 changes to the H level. Hereinafter, the clock is input to continue the shift operation until the interval tv (m).

  In FIG. 3, the column control circuit 6 simultaneously performs sampling of the image signal video and writing of pixels in a certain row. If there is no allowance for the writing time to the pixel 3 after sampling, two signal conversion circuits 4 are prepared, and the image signal video is sampled in the signal conversion circuit 4 for one line. Then, pixel writing is performed in the signal conversion circuit 4 for the other row while holding the video conversion information after sampling. If a toggle signal for switching the roles of the two rows for each row is newly provided and alternately performed, the writing time to the pixel 3 is secured for the sampling time for one row.

Next, the role and operation of the transistors MN3 (1) to MN3 (m) in FIG. 1 will be described.
(Normal display)
When normal image display is performed, the mode switching line p2 in FIG. 1 is set to the L level. The transistors MN3 (1) to MN3 (m) are turned off, and the signal line is disconnected from the ground potential.

  The pixels 3 in each row are selected by the control signals p1 (1) to p1 (n) output from the row control circuit 7. The pixels in the selected row receive the image signal from the signal line and perform the writing operation described above. A pixel in the non-selected row performs a display operation. That is, a current is output to the EL element according to the voltage held in the capacitor C2. This current is determined by the voltage held in the capacitor C2 and the characteristics of the driving transistor MP1, and basically does not depend on the power supply voltage or the characteristics of the EL element. This is called a current driving method.

  In the display state, the source-drain voltage of the driving transistor MP1 varies depending on the current flowing through the EL. As the gate potential of the driving transistor MP1 (that is, the signal line potential at the time of writing) moves away from the power supply voltage VDD in the lower direction, the EL current increases and the voltage across the EL element increases. Since the driving transistor MP1 must be operated in the saturation region (VG> VD), the signal line potential must be higher than the drain potential at the maximum current, that is, when the voltage between the terminals of the EL element is maximized. Don't be.

If a sufficiently large difference (VDD−Von) between the power supply voltage VDD and the maximum ON voltage Von of the organic EL element 1 is secured, the normal image signal modulation range may operate in a saturation (pentode) region. Guaranteed.
(aging)
The aging process is a process of stabilizing the characteristics by flowing a constant current through the EL element or the thin film transistor for a certain period of time. Since it is often incorporated into the manufacturing process, in order to finish the processing in a short time, the display is driven with a larger current than in a normal display operation.

  To perform the aging process, the mode switching line p2 in FIG. 1 is set to the H level.

  Since p2 is at the H level, the transistors MN3 (1) to MN3 (m) are turned on, and the signal lines are all at the ground (ground) potential.

  The pixel 3 writes a ground potential when the control signal p1 becomes H level. The capacitor C1 holds the difference between the power supply potential and the ground potential.

  As in the case of normal display, the row control circuit 7 controls the rows by sequentially selecting the rows one by one by applying a control signal and performing a write operation, and supplying current to the EL when not selected thereafter. .

  The potential applied to the signal line is not necessarily a ground potential, and may be a fixed signal source that supplies a constant voltage signal or current signal. However, the fixed signal is set so that the gate-source voltage of the drive transistor becomes larger than the drain-source voltage in order to operate the drive transistor as an analog switch after being written in the pixel.

  When the control signal p1 becomes L level, the drive transistor MP1 becomes conductive. At this time, since a large current flows through the EL element and the drain potential rises, the gate potential VG becomes lower than the drain potential VD. At this time, the driving transistor operates in a linear region and functions as an analog switch. Since the ON resistance of the saturation transistor is very small, most of the power supply voltage is applied to the EL element, and the current flowing through the EL element is determined by the voltage of the power supply line.

  As described above, this current is set to be larger than the current corresponding to the image signal when normal display is performed. Therefore, the voltage generated between the terminals of the EL element is also higher than the maximum value during normal display. This condition is always satisfied as long as the image signal is set in a range in which the driving transistor operates in the saturation region.

  A method of controlling light emission of the EL element by voltage is called a voltage driving method. Hereinafter, driving the EL by the voltage driving method is referred to as a first driving mode (or a first mode).

  On the other hand, in the normal display described above, the drive transistor is operated in saturation, and the current flowing through the EL element is controlled. That is, the EL element is driven by a current driving method. This is called the second drive mode (or second mode).

  Thus, in the aging state, the driving transistor MP1 operates in the linear region (triode region). The current required for aging can be adjusted by changing the power supply voltage VDD.

  In the present embodiment, the switch transistors MN3 (1) to MN3 (m) function as switching elements that switch between two modes of current driving and voltage driving.

  Instead of the switch transistor MN3, mode switching means may be provided inside the signal conversion circuit 4.

Specifically, a circuit for generating an aging voltage signal is provided separately from the circuit of FIG. 4, and the output of this circuit and the output of the circuit of FIG. 4 are switched by a switch and supplied to the signal line. Alternatively, an aging signal current larger than the image signal current may be generated by the transistor MN5 of the signal conversion circuit 4.
Aging is performed by forming a pixel including EL elements and pixels, a control line, and a signal line on a substrate, connecting a power source for driving these and a circuit for generating a signal, and then setting the first driving mode. This is done by writing a fixed signal from the signal line to the pixel and driving the EL element with voltage. Aging is performed in order to pass the initial characteristic change of the EL element in the final step of the manufacturing process, but when used as a display device, it is normally performed for characteristic stabilization before the display state. Also good.

(Second Embodiment)
In the second embodiment of the present invention, two or more power lines are connected to the pixel 3, and the normal display state and the aging state are used interchangeably. Others are the same as the first embodiment.

  FIG. 8 shows an example in which two power supply lines are used. The two power supply lines have different thicknesses, and thus have different impedances as viewed from the pixels. Elements having the same element and control line symbols as those in FIG.

  Of the two power lines, the power line 2 is thicker than the power line 5. Making the power supply line 2 thicker than the power supply line 5 can be realized by making the width of the power supply line 2 wider than that of the power supply line 5 or making the layer thickness of the power supply line 2 thicker than the layer thickness of the power supply line 5. These two power lines 2 and 5 are not connected within the display area 5 and are supplied separately from outside the display area.

  A new switch MP3 is provided between the power supply line 2 and the source which is one main electrode of the drive transistor MP1, and a second control line p3 is provided at the gate. The source of the driving transistor MP1 is electrically connected to the power supply line 2 via the switch MP3. The second control line p3 is commonly connected to the pixels 3 (1, 1) to (n, m).

  In the display state, the second control line p3 is kept at the L level. The power is supplied from both the power supply line 2 and the power supply line 5, but is supplied mainly from the power supply line 2 having a lower impedance.

  In the aging state, the second control line p3 is set to the H level. As a result, the power is supplied only to the power line 5. Since the wiring impedance of the power supply is high, the voltage applied to the EL element in the display area 5 varies, and the shading phenomenon that is bright in the periphery of the display area and dark in the center is induced. (First drive mode) is performed.

  During aging, the peripheral EL element that emits light with high brightness undergoes a faster characteristic change than the central EL element, so that the luminance gradually decreases, and at the end of aging, the luminance difference between the peripheral part and the central part is aging. It is smaller than before.

  In this state, when the power supply line 2 is connected and the drive mode is switched to the normal display state (second drive mode), the central pixel has higher luminance than the peripheral pixel for the same current, so that the impedance By supplying current from a power supply line having a small difference, there is almost no difference in luminance from the peripheral portion.

  Depending on the degree of impedance difference between the power supplies 2 and 5, the luminance at the center may be higher than that at the periphery. The luminance difference between the central portion and the peripheral portion can be adjusted by appropriately changing the aging condition according to the user's intention.

(Third embodiment)
In the third embodiment of the present invention, a new third control line p4 for switching on / off of the current flowing through the organic EL element 1 is provided independently of the control line p1 supplied from the row control circuit. is there.

  FIG. 9 shows a case where two control lines are provided. In the first embodiment, the switch MP2 whose on / off is controlled by the control line p1 is controlled by the newly provided third control line p4. In the circuit of FIG. 9, the same elements and control line symbols as those in FIG.

  In the display state or the aging state, the third control line p4 is at the L level only during a part of one field, and a current flows through the EL element. FIG. 10 is an example of a control signal applied to the third control line p4. A control signal shifted by 1H may be applied to the third control lines p4 (1) to p4 (n) in synchronization with the row control signal to sequentially turn on and off. Alternatively, in the aging state, all the third control lines p4 of the pixels 3 may be collectively pulse-driven asynchronously with the row control circuit.

In the aging state, when a large current flows through the organic EL element 1 by voltage driving, the element generates heat.
Therefore, the third control line p4 is pulse-driven to reduce the light emission period and appropriately cut off the power supply to the organic EL element 1. By using a luminance meter to change the pulse drive cycle and duty, a highly accurate aging process is possible, and process management during manufacture is facilitated.

  In the present embodiment, intermittent lighting is performed by driving the organic EL element in pulses during the aging process. Since the luminance can be measured and the luminance can be appropriately set while varying the lighting cycle and duty, an accurate aging process can be performed without destroying the organic EL element.

  In addition to the lighting duty, the luminance may be adjusted by changing the voltage of the power supply line.

(Fourth embodiment)
In the present embodiment, the third control line p4 in the pixel shown in FIG. 9 is driven separately for each color pixel of R, G, B, for example.
For example, assuming that the power supply voltage and the pulse width applied to the third control line p4 are the same, the time required for aging is R>G> B. In this case, as shown in FIG. 11, the ON state (L level section) of the switch MP2 in one cycle is set to satisfy R>G> B. That is, {L level section length of third control line p4 (R) of R pixel}> {L level section length of third control line p4 (G) of G pixel}> {Third control of B pixel L level section length of line p4 (B)} is set. Thereby, the effective aging time after the lapse of the same time can be set to R>G> B. Therefore, the aging process can be performed with high accuracy by a simple process.

  As long as an independent power supply line is assigned to each color, the voltage may be controlled independently with the above-described pulse width constant for each color or always ON. In other words, the aging process can be accurately performed within the same time by setting the voltage values different from R, G, and B in consideration of the current efficiency of each color and the time of initial deterioration.

Further, by using a chromaticity meter, the accuracy can be further improved by appropriately changing the pulse width and voltage value of the monitored information applied to the control lines p4 (R), P4 (G), and P4 (B). An enhanced aging process can be performed.
As described above, the present invention implements different driving methods in the display state and the aging state. In the display state, the current drive method is adopted. By injecting the current controlled by the driving transistor into the organic EL element, high quality driving independent of the power source impedance can be obtained. Further, in the aging state, the aging for a short time is enabled by implementing the voltage driving method.

1 is a block diagram illustrating an overall configuration of a display device according to a first embodiment of the present invention. It is a figure which shows the internal structure of the pixel which concerns on this invention. FIG. 2 is a diagram showing an internal configuration of a column control circuit shown in FIG. 1. It is a figure which shows the internal structure of the signal converter circuit shown in FIG. 4 is a timing chart showing the operation of the column control circuit shown in FIG. 3. FIG. 2 is a diagram showing an internal configuration of the row control circuit shown in FIG. 1. 7 is a timing chart showing an operation of the row control circuit shown in FIG. 6. It is a figure which shows the internal structure of the pixel which concerns on the 2nd Embodiment of this invention. It is a figure which shows the internal structure of the pixel which concerns on the 3rd Embodiment of this invention. 10 is a timing chart showing an operation of the third control line p4 of FIG. 9 according to the third embodiment of the present invention. 10 is a timing chart showing an operation of the third control line p4 of FIG. 9 according to the fourth embodiment of the present invention. It is a figure which shows the luminance-time characteristic of an organic EL element.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Organic EL element 2 Power supply line 3 Pixel 4 Signal conversion circuit 5 Second power supply line 6 Column control circuit 7 Row control circuit MN1, MN2, MN5, MN6, MS1-MSm, MN3 (1) -MN3 (m) n-type Transistor
MP1, MP2 p-type transistors Dh1-Dhm, Dv1-Dvn registers

Claims (14)

Pixels having light emitting elements, and power source lines and driving transistors each connected to the light emitting elements are arranged in a matrix, and a control line commonly connected to the pixels arranged in a row direction; An active matrix type having a signal line commonly connected to the pixels arranged in a column direction, selecting the pixel for each row by the control line, and writing a signal from the signal line to the selected pixel A display device,
Based on a first mode in which a voltage of the power supply line is applied to the light emitting element via the driving transistor and a gate voltage of the driving transistor, a current is supplied from the power supply line to the light emitting element, and the light emitting element is supplied. And a second mode for emitting light,
A fixed signal written to the pixel to operate the driving transistor in the first mode and an image signal written to the pixel to operate the driving transistor in the second mode are switched to the signal line. An active matrix display device comprising switching means for giving.   2. The active matrix type according to claim 1, wherein a voltage applied to the light emitting element in the first mode is a voltage larger than a maximum value of a voltage generated in the light emitting element in the second mode. Display device.   3. The active according to claim 1, wherein the voltage applied to the light emitting element in the first mode is a voltage of a power supply line that supplies current to the light emitting element in the second mode. Matrix type display device.   4. The active matrix display device according to claim 1, wherein the fixed signal is a signal for operating the driving transistor in a linear region.   5. The active matrix display device according to claim 1, wherein the image signal is a signal for operating the driving transistor in a saturation region.   6. The active matrix display device according to claim 1, wherein the switching unit is a switch that connects the signal line to a fixed signal source that supplies the fixed signal.   7. The image signal generating circuit for generating the image signal and outputting it to the signal line, wherein the switching means is provided in the image signal generating circuit. The active matrix type display device described in 1.   The power supply line is two power supply lines having different impedances, and the power supply line having a low impedance is disconnected from the two wirings in the first drive mode. The active matrix display device according to any one of the above. Pixels having light emitting elements, and power source lines and driving transistors each connected to the light emitting elements are arranged in a matrix, and a control line commonly connected to the pixels arranged in a row direction; A signal line connected in common to the pixels arranged in a column direction, applying a control signal to the control line to select the pixel for each row, and selecting an image from the signal line on the selected pixel A method of manufacturing an active matrix display device that displays an image by writing a signal and supplying a current corresponding to the image signal from the power line to the light emitting element to cause the light emitting element to emit light,
Forming the pixel, the control line, the signal line, and means for applying a signal to the control line and the signal line;
The control signal is applied to the control line to select the pixel for each row, a fixed signal is written to the selected pixel from the signal line, and the voltage of the power supply line is applied to the light emitting element via the driving transistor. And a method of manufacturing an active matrix display device.   The method for manufacturing an active matrix display device according to claim 9, wherein the step of applying the voltage of the power line to the light emitting element is a step of aging the light emitting element.   The power supply lines are two power supply lines having different impedances, and in the step of applying a voltage of the power supply line to the light emitting element, a power supply line having a low impedance is disconnected from the two wirings. A method for manufacturing an active matrix display device according to claim 10. Pixels having light emitting elements, and power source lines and driving transistors each connected to the light emitting elements are arranged in a matrix, and a control line commonly connected to the pixels arranged in a row direction; A driving method of an active matrix display device having a signal line commonly connected to the pixels arranged in a column direction,
The control signal is applied to the control line to select the pixel for each row, and a fixed signal is written from the signal line to the selected pixel, whereby the power supply line is connected to the light emitting element via the drive transistor. A first drive mode for applying a voltage of
Applying the control signal to the control line to select the pixel for each row, and writing an image signal from the signal line to the selected pixel, thereby supplying a current based on the image signal from the power line to the light emitting element And a second drive mode for causing the light emitting element to emit light,
A method of driving an active matrix display device, characterized by switching between the two.   13. The method of driving an active matrix display device according to claim 12, wherein in the first driving mode, the voltage of the power supply line is made different depending on the color of light emitted from the light emitting element. 14. The driving method of an active matrix display device according to claim 12, wherein in the first driving mode, a duty of light emission is changed in accordance with a luminance of the light emitting element.

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