JP2010040693A - Method for forming pattern - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To form a film onto a desired micro pattern by electrodeposition in a state free from waste. <P>SOLUTION: First, an electrodeposition liquid 152 is accommodated in a container 151, and faces forming a metal pattern 104 of a substrate 101 are opposingly disposed in an opposing electrode 153 made of platinum in the electrodeposition liquid 152. In this state, a positive voltage is applied to the opposing electrode 153; and a negative voltage is applied to a seed layer 102 by a constant voltage supply 154. Here, a necessary wiring is connected to a metal pattern 105, so that the negative voltage is applied to the seed layer 102. By this cationic electrodeposition, an electrodeposition component in the electrodeposition liquid 152 is attached (deposited) onto a face (upper face) onto which the metal pattern 104 and the metal pattern 105 are exposed to form an electrodeposition insulating film 106. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a method for forming a pattern in which a film is formed by electrodeposition.

  In LSI and MEMS (Micro Electro Mechanical Systems), a technique for forming a film by electrodeposition on the surface of a pattern is used to protect the pattern. For example, in order to prevent sticking due to contact between the movable part and the fixed electrode, a film is formed by electrodeposition (see Patent Document 1). Formation of a film by electrodeposition has an advantage that a film can be formed in a desired region because a film can be selectively formed in a portion to which a voltage is applied.

JP 2004-130448 A Takayuki Uemura et al., “Formation of polyimide film by electrodeposition coating”, Journal of Japan Institute of Electronics Packaging, Vol.5, No.3, pp.233-240, 2002.

  However, the formation of a film by electrodeposition as described above requires a wiring structure for applying a voltage to the pattern to be electrodeposited. However, this wiring structure is used for electrodeposition, and is unnecessary in a fine device such as LSI or MEMS to be manufactured, and is a useless part on the fine device. On the other hand, for example, in Patent Document 1, a wiring structure for electrodeposition is provided in a cutting region of a substrate on which a plurality of fine devices are formed simultaneously, and waste due to this wiring structure is suppressed. However, the electrodeposition wiring on the fine device still remains, and there is no change in separately providing a wiring structure for electrodeposition. As described above, conventionally, when an electrodeposition film is formed in a desired pattern in technologies such as LSI and MEMS, there is a problem that wiring for electrodeposition that is wasted on the apparatus is formed. It was.

  The present invention has been made to solve the above-described problems, and it is an object of the present invention to form a film by electrodeposition on a desired fine pattern while eliminating waste. .

  The pattern forming method according to the present invention includes a step of forming a seed layer made of metal on a substrate, a step of forming a resist film having an opening pattern on the seed layer, and a seed exposed to the opening pattern. Forming a metal pattern by plating on the layer and electrodeposition by applying a voltage to the seed layer to form an electrodeposition film on the surface of the metal pattern exposed at the opening where part of the metal pattern is exposed And a step of removing the resist film, and a step of selectively etching and separating the seed layer using the metal pattern as a mask.

  In the pattern formation method, the opening when forming the electrodeposition film may be an opening pattern of a resist film. Further, the opening when the electrodeposition film is formed may be a new opening pattern formed in the newly formed resist film by removing the resist film.

  In the pattern forming method, after the metal pattern is formed, a gap is formed between the side surface of the opening and the metal pattern to expose the upper surface and the side surface of the metal pattern, and on the exposed upper surface and the side surface of the metal pattern. An electrodeposition film may be formed. In this case, after the metal pattern is formed, the metal pattern is etched to form a gap between the side surface and the metal pattern to expose the upper surface and the side surface of the metal pattern. Further, after forming the metal pattern, the opening may be widened to form a gap between the side surface and the metal pattern so that the upper surface and the side surface of the metal pattern are exposed.

  In the pattern forming method, after the seed layer is selectively etched and separated, a step of etching the side surface not covered with the electrodeposition film of the metal pattern may be newly provided. The seed layer and a part of the metal pattern are formed on the sacrificial pattern formed on the substrate, and the seed layer is selectively etched and separated using the metal pattern as a mask, and then the sacrificial pattern is removed and the seed is removed. The movable structure may be formed on the substrate with a part of the layer and the metal pattern.

  In the pattern forming method, a step of forming an insulating film covering the metal pattern covered with the electrodeposition film may be newly provided. Moreover, the electrodeposition liquid used for electrodeposition should just contain the sulfonium ion as an electrodeposition component.

  As described above, according to the present invention, the electrodeposition on the surface of the metal pattern exposed at the opening where a part of the metal pattern plated on the seed layer is exposed by electrodeposition of applying a voltage to the seed layer. Since the deposited film is formed, it is possible to obtain an excellent effect that a film can be formed by electrodeposition in a desired fine pattern without waste.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

[Embodiment 1]
First, Embodiment 1 of the present invention will be described with reference to FIGS. 1A to 1I. 1A to 1I are process diagrams for explaining a pattern forming method according to Embodiment 1 of the present invention. FIGS. 1A and 1C to 1I are schematic cross-sectional views, and FIG. 1B is a plan view. FIG.

  First, as shown in FIG. 1A, a seed layer 102 is formed on a substrate 101 made of a semiconductor material such as single crystal silicon. The seed layer 102 includes a lower layer made of, for example, Ti and having a thickness of about 0.1 μm, and an upper layer made of, eg, Au, having a thickness of about 0.1 μm. These can be formed by a well-known vapor deposition method. By using the seed layer 102 made of Au as described above, a metal pattern made of Au can be formed by a plating method as will be described later. The lower layer made of titanium is provided to improve the adhesion between the upper layer made of gold and the substrate 101. For example, a silicon oxide layer (not shown) may be formed on the surface of the substrate 101, and the seed layer 102 may be formed thereon.

  Next, a 12 μm-thick resist film 103 made of, for example, a well-known positive photoresist material is formed on the seed layer 102 by a known photolithography technique. The resist film 103 includes an opening pattern 103a that reaches the seed layer 102 at a desired location. Further, as shown in the plan view of FIG. 1B, in the region of the peripheral end portion 101a of the substrate 101, the resist film 103 is not present and the substrate 101 is exposed. The exposed portion of the end portion of the substrate 101 does not need to be formed over the entire circumference of the substrate 101, and it is only necessary to provide a portion exposed to a part. In FIG. 1B, the alternate long and short dash line virtually indicates the chip region.

  Next, as shown in FIG. 1C, a metal pattern 104 and a metal pattern 105 made of Au are formed on the exposed portion of the seed layer 102. These metal patterns may be formed by depositing Au to a thickness of about 10 μm by an electrolytic plating method using the seed layer 102 as one electrode. For example, by immersing the substrate 101 in an Au plating solution and applying a necessary voltage between the counter electrode and the seed layer 102 in this, for example, on the seed layer 102 exposed in the opening pattern 103a Au can be deposited on the substrate. At this time, a necessary voltage may be applied to the seed layer 102 by connecting necessary wiring to the seed layer 102 exposed at the outer peripheral portion of the substrate 101.

  Next, by electrodeposition applying a negative voltage to the seed layer 102, as shown in FIG. 1D, on the upper surface of the metal pattern 104 and the metal pattern 105 exposed in the opening pattern 103a as the opening, for example, a film thickness of 1 μm. An electrodeposition insulating film 106 having a thickness of about 10 is formed. In forming the electrodeposition insulating film 106, first, the electrodeposition liquid 152 is accommodated in the container 151, and the surface of the substrate 101 on which the metal pattern 104 is formed is opposed to the counter electrode 153 made of platinum in the electrodeposition liquid 152. Deploy. As the electrodeposition liquid 152, for example, a liquid containing a sulfonium ion (cation) having an epoxy group as an electrodeposition component (Nippon Paint Co., Ltd .; Insuled INSULED 3020) can be used. For example, a liquid temperature of 30 ° C. may be used.

  In this state, the constant voltage source 154 applies a positive voltage to the counter electrode 153 and applies a negative voltage to the seed layer 102. Here, a negative voltage is applied to the seed layer 102 by connecting necessary wiring to the metal pattern 105. By such cationic electrodeposition, the electrodeposition component in the electrodeposition liquid 152 is deposited (deposited) on the exposed surface (upper surface) of the metal pattern 104 and the metal pattern 105, and the electrodeposition insulating film 106 is formed. The

  After the electrodeposition insulating film 106 is formed as described above, the substrate 101 is pulled up from the electrodeposition liquid 152, the substrate 101 is washed with water and dried, and then heated at 110 ° C. for 25 minutes in a nitrogen atmosphere. Then, the electrodeposition insulating film 106 is thermally cured (FIG. 1E). By the heat treatment, the electrodeposition insulating film 106 is cured, and adhesion between the electrodeposition insulating film 106 and the metal pattern 104 (metal pattern 105) is improved.

  Next, by removing the resist film 103, as shown in FIG. 1F, a metal pattern 104 and a metal pattern 105 are formed on the seed layer 102, and electrodeposition insulation is formed on the metal pattern 104 and the metal pattern 105. A state in which the film 106 is selectively formed is obtained. For example, the resist film 103 may be removed by using a stripping solution such as N-methylpyrrolidone.

  Next, by removing the seed layer 102 by etching using the metal pattern 104 and the metal pattern 105 as a mask, the seed layer 102 is formed for each of the metal pattern 104 and the metal pattern 105 on the substrate 101 as shown in FIG. 1G. Isolate (insulate). Diluted aqua regia may be used for etching the gold layer above the seed layer 102, and a hydrofluoric acid solution may be used for etching the lower titanium layer.

  Here, in the etching of the upper layer (gold layer) of the seed layer 102 using the rare aqua regia, the electrodeposition insulating film 106 is formed by increasing the processing time and using a higher concentration aqua regia. As a mask, the side of the metal pattern 104 (including the seed layer 102) may be etched to form a metal pattern 141 having a smaller dimension in the planar direction as shown in FIG. 1H. After that, as shown in FIG. 1I, if the electrodeposition insulating film 106 is removed by, for example, oxygen plasma treatment (dry etching), a state in which the metal pattern 141 is formed on the substrate 101 is obtained.

  As described above, according to the present embodiment, electrodeposition is performed on a desired metal pattern (fine pattern) without forming a dedicated wiring structure for electrodeposition and without waste. A film can be formed. Further, since a film (pattern) by electrodeposition can be formed in this way, the aspect ratio of the metal pattern formed on the thick film by plating or the like can be further increased.

  For example, when forming a metal pattern with a film thickness of about 10 μm, as described above, a photoresist pattern having an opening at the location of the formed metal pattern is formed. However, when such a thick metal pattern is formed, the photoresist is also made thick. However, due to the limitations of photolithography, the minimum dimension that can be opened increases as the film thickness increases. For this reason, it becomes difficult to reduce the width of the metal pattern to be formed, and it becomes difficult to form a metal pattern having a high aspect ratio.

  On the other hand, according to this embodiment described above, since the electrodeposition insulating film can be selectively formed on the upper surface of the metal pattern after the metal pattern is formed, the width of the metal pattern can be obtained by etching using this as a mask. Can be made smaller.

[Embodiment 2]
Next, Embodiment 2 of the present invention will be described with reference to FIGS. 2A and 2B. In the present embodiment, a sacrificial film 201a is formed on a substrate 201, and a high aspect ratio metal pattern 241 is formed on the sacrificial film 201a using the seed layer 202 and the electrodeposition insulating film 206, as described above. It is a thing. For example, the sacrificial film 201a may be formed from an organic resin. Here, an opening (groove) reaching the substrate 201 is formed in a part (not shown) of the sacrificial film 201a, and this part is connected to the metal pattern 241 by the same plating method using the seed layer 202. A metal support structure 205 to be supported is formed (FIG. 2A).

  As described above, the metal pattern 241 is formed on the sacrificial layer 201a on the substrate 201, and the sacrificial layer 205 is formed on the substrate 201 with the metal support structure 205 having a desired high aspect ratio. If the layer 201a and the electrodeposition insulating film 206 are removed, as shown in FIG. 2B, a metal pattern (movable structure) 241 that is supported by the metal support structure 205 and is movable apart from the substrate 201 is formed. Can be formed. The sacrificial layer 201a and the electrodeposition insulating film 206 may be removed by treatment with oxygen plasma, for example.

  In the above description, the resist pattern used for forming the metal pattern is used as it is, and a film is selectively formed by electrodeposition. However, the present invention is not limited to this. Then, after forming a resist pattern exposing a desired metal pattern, an electrodeposition film may be formed on the desired metal pattern by electrodeposition using the seed layer as one electrode.

[Embodiment 3]
Next, Embodiment 3 of the present invention will be described with reference to FIGS. 3A to 3D. 3A to 3D are process diagrams for explaining the pattern forming method according to the third embodiment.

  First, as shown in FIG. 3A, a seed layer 302 is formed on a substrate 301 made of a semiconductor material such as single crystal silicon. The seed layer 302 includes a lower layer made of, for example, Ti and having a thickness of about 0.1 μm, and an upper layer made of, for example, Au, having a thickness of about 0.1 μm. These can be formed by a well-known vapor deposition method. By using the seed layer 302 made of Au as described above, a metal pattern made of Au can be formed by a plating method as will be described later. Further, the lower layer made of titanium is provided to improve the adhesion between the upper layer made of gold and the substrate 301. For example, a silicon oxide layer (not shown) may be formed on the surface of the substrate 301, and the seed layer 302 may be formed thereon.

  Next, a 12 μm-thick resist film 303 made of, for example, a well-known positive photoresist material is formed on the seed layer 302 by a known photolithography technique. The resist film 303 includes an opening pattern 303a that reaches the seed layer 302 at a desired location. Although not shown, an exposed portion where the resist film 303 is not present and the substrate 301 is exposed is formed in the peripheral edge region of the substrate 301.

  Next, a metal pattern 304 made of Au is formed on the exposed portion of the seed layer 302. The metal pattern 304 may be formed by depositing Au to a thickness of about 10 μm by an electrolytic plating method using the seed layer 302 as one electrode. For example, by immersing the substrate 301 in an Au plating solution and applying a necessary voltage between the counter electrode and the seed layer 302 in this, for example, the top of the seed layer 302 exposed to the opening pattern 303a. Au can be deposited on the substrate. At this time, a necessary voltage may be applied to the seed layer 302 by connecting necessary wiring to the seed layer 302 exposed at the outer peripheral portion of the substrate 301. Moreover, a metal pattern is formed also in the area | region of the peripheral edge part of the board | substrate 301 mentioned above by this plating.

  Next, the upper and side portions of the metal pattern 304 are etched using the resist film 303 as a mask to form a metal pattern 341 having a narrower width, as shown in FIG. 3B, and the opening pattern of the metal pattern 341 and the resist film 303 is formed. A gap is formed between the inner wall of 303a. As a result, the metal pattern 341 is exposed in addition to the upper portion (upper surface).

  Next, as shown in FIG. 3C, an electrodeposition insulating film 306 having a film thickness of, for example, about 1 μm is formed on the upper and side surfaces of the metal pattern 341 exposed in the opening pattern 303a that is an opening. In the formation of the electrodeposition insulating film 306, first, in the electrodeposition liquid for electrodeposition, the surface on which the metal pattern 341 of the substrate 301 is formed is arranged to face the counter electrode made of platinum. As the electrodeposition solution, for example, a solution containing a sulfonium ion (cation) having an epoxy group as an electrodeposition component (Nippon Paint Co., Ltd .; Insuled INSULED 3020) can be used. For example, a liquid temperature of 30 ° C. may be used.

  In this state, a positive voltage is applied to the counter electrode and a negative voltage is applied to the seed layer 302 by a constant voltage source. Here, a negative voltage is applied to the seed layer 302 by connecting necessary wiring to the metal pattern formed on the seed layer at the peripheral edge of the substrate 301. By such cationic electrodeposition, the electrodeposition component in the electrodeposition liquid adheres (deposits) to the exposed surfaces (upper surface and side surfaces) of the metal pattern 341, and the electrodeposition insulating film 306 is formed.

  After the electrodeposition insulating film 306 is formed as described above, the substrate 301 is pulled up from the electrodeposition solution, the substrate 301 is washed with water and dried, and then heated at 110 ° C. for 25 minutes in a nitrogen atmosphere. The electrodeposition insulating film 306 is thermally cured. By the heat treatment, the electrodeposition insulating film 306 is cured, and adhesion between the electrodeposition insulating film 306 and the metal pattern 341 is improved.

  Next, by removing the resist film 303, the metal pattern 341 is formed on the seed layer 302, and the electrodeposition insulating film 306 is selectively formed on the upper surface and side surfaces of the metal pattern 341. . For example, the resist film 303 may be removed by using a stripping solution such as N-methylpyrrolidone.

  Thereafter, by removing the seed layer 302 by etching using the metal pattern 341 and the electrodeposition insulating film 306 as a mask, the seed layer 302 is separated for each metal pattern 341 on the substrate 301 as shown in FIG. 3D ( Isolate). Diluted aqua regia may be used for etching the gold layer above the seed layer 302, and a hydrofluoric acid solution may be used for etching the lower titanium layer. In this etching process, the metal pattern 341 is not etched because it is covered with the electrodeposition insulating film 306.

[Embodiment 4]
Next, Embodiment 4 of the present invention will be described with reference to FIGS. 4A to 4D. 4A to 4D are process diagrams for explaining the pattern forming method according to the fourth embodiment.

  First, as shown in FIG. 4A, a seed layer 402 is formed on a substrate 401 made of a semiconductor material such as single crystal silicon. The seed layer 402 includes a lower layer made of, for example, Ti and having a thickness of about 0.1 μm, and an upper layer made of, eg, Au, having a thickness of about 0.1 μm. These can be formed by a well-known vapor deposition method. By using the seed layer 402 made of Au as described above, a metal pattern made of Au can be formed by a plating method as will be described later. Further, the lower layer made of titanium is provided to improve the adhesion between the upper layer made of gold and the substrate 401. For example, a silicon oxide layer (not shown) may be formed on the surface of the substrate 401, and the seed layer 402 may be formed thereon.

  Next, a 12 μm-thick resist film 403 made of, for example, a well-known positive photoresist material is formed on the seed layer 402 by a known photolithography technique. The resist film 403 includes an opening pattern 403a that reaches the seed layer 402 at a desired location. Although not shown, an exposed portion where the resist film 403 is not present and the substrate 401 is exposed is formed in the peripheral edge region of the substrate 401.

  Next, a metal pattern 404 made of Au is formed on the exposed portion of the seed layer 402. The metal pattern 404 may be formed by depositing Au to a thickness of about 10 μm by an electrolytic plating method using the seed layer 402 as one electrode. For example, the substrate 401 is immersed in an Au plating solution, and in this, a necessary voltage is applied between the counter electrode and the seed layer 402, for example, on the seed layer 402 exposed to the opening pattern 403a. Au can be deposited on the substrate. At this time, a necessary voltage may be applied to the seed layer 402 by connecting necessary wiring to the seed layer 402 exposed at the outer peripheral portion of the substrate 401. Further, by this plating, a metal pattern is also formed in the peripheral edge region of the substrate 401 described above.

  Next, an etching process is performed on the resist film 403 to form a resist film 431 including an opening pattern 431a having a wider width, as shown in FIG. 4B, and the metal pattern 404 and the inner wall of the opening pattern 431a of the resist film 431 are formed. It is assumed that a gap is formed between them. For example, the above-described resist film 403 may be processed by wet etching using a solution obtained by diluting a stripping solution such as N-methylpyrrolidone. At this time, when processing is performed by immersing the substrate in the etching solution, ultrasonic waves may be applied to improve the permeability of the processing solution between the opening pattern 431a and the metal pattern 404. Further, the above-described resist film 403 may be processed by a process using oxygen plasma.

  Thus, in this embodiment, the side surface of the metal pattern 404 is also exposed by widening the opening in which the metal pattern 404 is formed. In the present embodiment, the metal pattern 404 does not change in size.

  Next, as shown in FIG. 4C, an electrodeposition insulating film 406 having a film thickness of, for example, about 1 μm is formed on the upper surface and side surfaces of the metal pattern 404 exposed in the opening pattern 431a that is an opening. In the formation of the electrodeposition insulating film 406, first, in the electrodeposition liquid for electrodeposition, the surface of the substrate 401 on which the metal pattern 404 is formed is disposed opposite to the counter electrode made of platinum. As the electrodeposition solution, for example, a solution containing a sulfonium ion (cation) having an epoxy group as an electrodeposition component (Nippon Paint Co., Ltd .; Insuled INSULED 3020) can be used. For example, a liquid temperature of 30 ° C. may be used.

  In this state, a positive voltage is applied to the counter electrode and a negative voltage is applied to the seed layer 402 by a constant voltage source. Here, a negative voltage is applied to the seed layer 402 by connecting necessary wiring to a metal pattern formed on the seed layer at the peripheral edge of the substrate 401. By such cationic electrodeposition, the electrodeposition component in the electrodeposition liquid adheres (deposits) to the exposed surfaces (upper surface and side surfaces) of the metal pattern 404, and the electrodeposition insulating film 406 is formed.

  After the electrodeposition insulating film 406 is formed as described above, the substrate 401 is pulled up from the electrodeposition solution, the substrate 401 is washed with water and dried, and then heated at 110 ° C. for 25 minutes in a nitrogen atmosphere. Then, the electrodeposition insulating film 406 is thermally cured. By the heat treatment, the electrodeposition insulating film 406 is cured, and adhesion between the electrodeposition insulating film 406 and the metal pattern 404 is improved.

  Next, by removing the resist film 431, a metal pattern 404 is formed on the seed layer 402, and an electrodeposition insulating film 406 is selectively formed on the upper surface and side surfaces of the metal pattern 404. . For example, the resist film 431 may be removed by using a stripping solution such as N-methylpyrrolidone.

  Thereafter, by removing the seed layer 402 by etching using the metal pattern 404 and the electrodeposition insulating film 406 as a mask, the seed layer 402 is separated for each metal pattern 404 on the substrate 401 as shown in FIG. Isolate). Diluted aqua regia is used for etching the upper gold layer of the seed layer 402, and a hydrofluoric acid solution is used for etching the lower titanium layer. In this etching process, the metal pattern 404 is not etched because it is covered with the electrodeposition insulating film 406.

  In the fourth embodiment, the resist film 403 is etched to form a resist film 431 having an opening pattern 431a having a wider width, thereby forming a gap between the metal pattern 404. It is not limited. The third embodiment described above may be combined to form a gap therebetween by etching the metal pattern in addition to etching the resist pattern.

  Moreover, by repeating the process of heating (120 ° C.) and cooling (−20 ° C.) the substrate, the opening pattern is further widened due to the difference in thermal expansion coefficient between the metal pattern and the resist film (opening pattern), for example. A gap may be formed between the side surface of the metal pattern and the opening pattern. Further, the opening pattern may be further expanded by shrinking the resist film by heating it to a temperature close to the softening point, and a gap may be formed between the side surface of the metal pattern and the opening pattern.

[Embodiment 5]
Next, Embodiment 5 of the present invention will be described with reference to FIGS. 5A to 5I. 5A to 5I are process diagrams for explaining the pattern forming method according to the fifth embodiment. In the fifth embodiment, the case where the present invention is applied to the formation of a multilayer wiring structure will be described.

  First, as shown in FIG. 5A, a seed layer 502 is formed on a substrate 501 made of a semiconductor material such as single crystal silicon. The seed layer 502 includes a lower layer made of, for example, Ti and having a thickness of about 0.1 μm, and an upper layer made of, for example, Au, having a thickness of about 0.1 μm. These can be formed by a well-known vapor deposition method. By using the seed layer 502 made of Au as described above, a metal pattern made of Au can be formed by a plating method as will be described later. Further, the lower layer made of titanium is provided for improving the adhesion between the upper layer made of gold and the substrate 501. For example, a silicon oxide layer (not shown) may be formed on the surface of the substrate 501, and the seed layer 502 may be formed thereon.

  Next, a 12 μm-thick resist film 503 made of, for example, a well-known positive photoresist material is formed on the seed layer 502 by a known photolithography technique. The resist film 503 has an opening pattern 503a reaching the seed layer 502 at a desired location. Although not shown, an exposed portion where the resist film 503 is not present and the substrate 501 is exposed is formed in the peripheral edge portion of the substrate 501.

  Next, a metal pattern 504 made of Au is formed on the exposed portion of the seed layer 502. The metal pattern 504 may be formed by depositing Au to a thickness of about 10 μm by an electrolytic plating method using the seed layer 502 as one electrode. For example, by immersing the substrate 501 in an Au plating solution and applying a necessary voltage between the counter electrode and the seed layer 502 in this, for example, on the seed layer 502 exposed to the opening pattern 503a. Au can be deposited on the substrate. At this time, a necessary voltage may be applied to the seed layer 502 by connecting necessary wiring to the seed layer 502 exposed at the outer peripheral portion of the substrate 501. Moreover, a metal pattern is formed also in the area | region of the peripheral edge part of the board | substrate 501 mentioned above by this plating.

  Next, the upper and side portions of the metal pattern 504 are etched using the resist film 503 as a mask to form a metal wiring 541 having a narrower width as shown in FIG. 5B, and an opening pattern 503a between the metal wiring 541 and the resist film 503 is formed. A gap is formed between the inner wall and the inner wall. As a result, the metal wiring 541 is exposed in addition to the upper portion (upper surface).

  In addition, an electrodeposition insulating film 506 having a thickness of, for example, about 1 μm is formed on the upper surface and side surfaces of the metal wiring 541. In the formation of the electrodeposition insulating film 506, first, in the electrodeposition liquid for electrodeposition, the surface on which the metal wiring 541 of the substrate 501 is formed is arranged to face the counter electrode made of platinum. As the electrodeposition solution, for example, a solution containing a sulfonium ion (cation) having an epoxy group as an electrodeposition component (Nippon Paint Co., Ltd .; Insuled INSULED 3020) can be used. For example, a liquid temperature of 30 ° C. may be used.

  In this state, a positive voltage is applied to the counter electrode and a negative voltage is applied to the seed layer 502 by a constant voltage source. Here, a negative voltage is applied to the seed layer 502 by connecting necessary wiring to the metal pattern formed on the seed layer at the peripheral edge of the substrate 501. By such cationic electrodeposition, the electrodeposition component in the electrodeposition liquid adheres (deposits) to the exposed surfaces (upper surface and side surfaces) of the metal wiring 541, and the electrodeposition insulating film 506 is formed.

  After the electrodeposition insulating film 506 is formed as described above, the substrate 501 is pulled up from the electrodeposition solution, the substrate 501 is washed with water and dried, and then heat-treated at 110 ° C. for 25 minutes in a nitrogen atmosphere. Then, the electrodeposition insulating film 506 is thermally cured. By the heat treatment, the electrodeposition insulating film 506 is cured, and adhesion between the electrodeposition insulating film 506 and the metal wiring 541 is improved.

  By removing the resist film turn 503, the metal wiring 541 is formed on the seed layer 502, and the electrodeposition insulating film 506 is selectively formed on the upper surface and the side surface of the metal wiring 541. For example, the resist film 503 may be removed by using a stripping solution such as N-methylpyrrolidone.

  Thereafter, a heat treatment at 190 ° C. for 25 minutes is further applied to the electrodeposited insulating film 506 to promote the cured state. Next, by removing the seed layer 502 by etching using the metal wiring 541 and the electrodeposition insulating film 506 as a mask, the seed layer 502 is separated on the substrate 501 below the metal wiring 541 as shown in FIG. 5C ( Isolate). Diluted aqua regia is used for etching the upper gold layer of the seed layer 502, and a hydrofluoric acid solution is used for etching the lower titanium layer. In this etching process, the metal wiring 541 is not etched because it is covered with the electrodeposition insulating film 506.

  In addition, an interlayer insulating film 507 is formed on the metal wiring 541 covered with the electrodeposition insulating film 506, and an opening reaching the electrodeposition insulating film 506 on the upper surface of the metal wiring 541 is formed in the interlayer insulating film 507. A portion 507a is formed. For example, by using a resin material that has photosensitivity, can be cured by heat treatment at about 200 ° C., and can form a thick film, such as VPA series acrylic polymer manufactured by Nippon Steel Chemical Co., Ltd., the interlayer insulating film 507 is formed. It can be formed.

  For example, the resin material is applied onto the substrate 501 on which the metal wiring 541 is formed to form a coating film, and the formed coating film is patterned by a known photolithography technique to form the opening 507a. By thermally curing the pattern, the interlayer insulating film 507 can be formed. Further, the resin material film may be formed by a known STP (Spin-coating Film Transfer and Hot Pressing) method.

  According to the present embodiment, the metal wiring 541 is made of Au, but since the electrodeposition insulating film 506 is interposed between the metal insulating film 507 and the interlayer insulating film 507, good adhesion is provided between them. Is obtained.

  Next, using the interlayer insulating film 507 formed as described above as a mask, the electrodeposition insulating film 506 exposed in the opening 507a is removed by etching to form an opening pattern 506a, as shown in FIG. The surface (upper surface) of the metal wiring 541 is exposed at the opening pattern 506a and the opening 507a.

  Next, as shown in FIG. 5E, a seed layer 508 is formed. The seed layer 508 includes a lower layer made of, for example, Ti and having a thickness of about 0.1 μm, and an upper layer made of, for example, Au of about 0.1 μm. These are similar to the seed layer 502 and can be formed by a well-known vapor deposition method.

  Next, a 7 μm-thick resist film 509 made of, for example, a well-known positive type photoresist material is formed on the seed layer 508 by a known photolithography technique. The resist film 509 has an opening pattern 509a reaching the seed layer 508 at a desired location. Although not shown, an exposed portion where the resist film 509 is not present and the interlayer insulating film 507 is exposed is formed on the interlayer insulating film 507 in the peripheral edge region of the substrate 501.

  Next, a metal pattern 510 made of Au is formed on the exposed portion of the seed layer 508. The metal pattern 510 may be formed by depositing Au to a thickness of about 4 μm by an electrolytic plating method using the seed layer 508 as one electrode. For example, the substrate 501 is immersed in an Au plating solution, and a necessary voltage is applied between the counter electrode and the seed layer 508, thereby, for example, on the seed layer 508 exposed to the opening pattern 509a. Au can be deposited on the substrate. At this time, a necessary voltage may be applied to the seed layer 508 by connecting necessary wiring to the seed layer 508 exposed at the outer peripheral portion of the substrate 501. Moreover, a metal pattern is formed also in the area | region of the peripheral edge part of the board | substrate 501 mentioned above by this plating.

  Next, an etching process is performed on the resist film 509 to form a resist film 591 having an opening pattern 591a having a wider width, as shown in FIG. 5F, and between the metal pattern 510 and the inner wall of the opening pattern 591a of the resist film 591. It is assumed that a gap is formed between them. As a result, the metal pattern 510 is exposed in addition to the upper portion (upper surface). In the present embodiment, the metal pattern 510 does not change in size.

  Next, an electrodeposition insulating film 511 having a film thickness of, for example, about 1 μm is formed on the upper surface and side surfaces of the metal pattern 510. Formation of the electrodeposition insulating film 511 is similar to the formation of the electrodeposition film 506 described above.

  Next, by removing the resist film 591, as shown in FIG. 5G, a metal pattern 510 is formed on the seed layer 508, and the electrodeposition insulating film 511 is selectively formed on the upper surface and side surfaces of the metal pattern 510. A formed state is obtained. For example, the resist film 591 may be removed by using a stripping solution such as N-methylpyrrolidone.

  Thereafter, the seed layer 508 is etched away using the metal pattern 510 and the electrodeposition insulating film 511 as a mask, so that the seed layer 508 is separated (insulated and separated) for each metal pattern 510 on the interlayer insulating film 507. Diluted aqua regia may be used for etching the upper gold layer of the seed layer 508 and a hydrofluoric acid solution may be used for etching the lower titanium layer. In this etching process, the metal pattern 510 is not etched because it is covered with the electrodeposition insulating film 511.

  Next, as shown in FIG. 5H, an interlayer insulating film 512 is formed on the metal pattern 510 covered with the electrodeposition insulating film 511, and electrodeposition on the upper surface of the metal pattern 510 is formed on the interlayer insulating film 512. An opening 512a that reaches the insulating film 511 is formed. The interlayer insulating film 512 may be formed in a manner similar to that of the interlayer insulating film 507. Here, according to the present embodiment, the metal pattern 510 is made of Au. However, since the electrodeposition insulating film 511 is interposed between the metal insulating layer 512 and the interlayer insulating film 512, the metal pattern 510 is good. Adhesiveness is obtained.

  Next, using the interlayer insulating film 512 as a mask, the electrodeposition insulating film 511 exposed in the opening 512a is removed by etching, and the surface (upper surface) of the metal pattern 510 is exposed at the opening 512a.

  Next, as shown in FIG. 5I, a seed layer 513 is formed, a metal wiring 514 is formed, an electrodeposition insulating film 515 covering the metal wiring 514 is formed, and a protective insulating film 516 is formed thereon. . The seed layer 513 may be formed in a manner similar to the seed layer 508. Further, the metal wiring 514 may be formed in the same manner as the metal wiring 541. Further, the electrodeposition insulating film 515 may be formed in the same manner as the electrodeposition insulating film 506.

  According to this embodiment described above, a multilayer wiring structure in which a wiring layer including a metal wiring 514 connected to the metal wiring 541 using the metal pattern 510 as a via on the wiring layer including the metal wiring 541 can be configured. . Moreover, although the metal wirings 541 and 514 and the metal pattern 510 are made of Au, since these are covered with an electrodeposited insulating film having good adhesion, the peeling of the interlayer insulating film is suppressed. Can do.

  In the above description, cation electrodeposition using cations as electrodeposition components has been described as an example. However, the present invention is not limited to this. For example, the electrodeposition film may be formed by anion electrodeposition using a polyimide-based organic component and a carboxyl ion (anion) as an electrodeposition component (see Non-Patent Document 1). In this case, for example, an electrodeposition film can be selectively formed on a metal pattern made of Cu formed by plating.

  In the above description, Au is used as the metal material. However, the present invention is not limited to this, and Cu or another metal material may be used. A material such as an electrodeposition liquid used for electrodeposition may be appropriately selected in accordance with the metal material to be used. Further, although the Au / Ti laminated film is used as the seed layer, the present invention is not limited to this. When Au is used as the metal material, an Au / Cr seed layer may be used. Further, Cu / Cr, Cu / Ti, or a metal such as SUS or Fe may be used.

It is process drawing for demonstrating the pattern formation method in Embodiment 1 of this invention. It is process drawing for demonstrating the pattern formation method in Embodiment 1 of this invention. It is process drawing for demonstrating the pattern formation method in Embodiment 1 of this invention. It is process drawing for demonstrating the pattern formation method in Embodiment 1 of this invention. It is process drawing for demonstrating the pattern formation method in Embodiment 1 of this invention. It is process drawing for demonstrating the pattern formation method in Embodiment 1 of this invention. It is process drawing for demonstrating the pattern formation method in Embodiment 1 of this invention. It is process drawing for demonstrating the pattern formation method in Embodiment 1 of this invention. It is process drawing for demonstrating the pattern formation method in Embodiment 1 of this invention. It is process drawing for demonstrating the pattern formation method in Embodiment 2 of this invention. It is process drawing for demonstrating the pattern formation method in Embodiment 2 of this invention. It is process drawing for demonstrating the pattern formation method in Embodiment 3 of this invention. It is process drawing for demonstrating the pattern formation method in Embodiment 3 of this invention. It is process drawing for demonstrating the pattern formation method in Embodiment 3 of this invention. It is process drawing for demonstrating the pattern formation method in Embodiment 3 of this invention. It is process drawing for demonstrating the pattern formation method in Embodiment 4 of this invention. It is process drawing for demonstrating the pattern formation method in Embodiment 4 of this invention. It is process drawing for demonstrating the pattern formation method in Embodiment 4 of this invention. It is process drawing for demonstrating the pattern formation method in Embodiment 4 of this invention. It is process drawing for demonstrating the pattern formation method in Embodiment 5 of this invention. It is process drawing for demonstrating the pattern formation method in Embodiment 5 of this invention. It is process drawing for demonstrating the pattern formation method in Embodiment 5 of this invention. It is process drawing for demonstrating the pattern formation method in Embodiment 5 of this invention. It is process drawing for demonstrating the pattern formation method in Embodiment 5 of this invention. It is process drawing for demonstrating the pattern formation method in Embodiment 5 of this invention. It is process drawing for demonstrating the pattern formation method in Embodiment 5 of this invention. It is process drawing for demonstrating the pattern formation method in Embodiment 5 of this invention. It is process drawing for demonstrating the pattern formation method in Embodiment 5 of this invention.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 101 ... Substrate, 101a ... Peripheral edge, 102 ... Seed layer, 103 ... Resist film, 103a ... Opening pattern, 104 ... Metal pattern, 105 ... Metal pattern, 106 ... Electrodeposition insulating film, 141 ... Metal pattern, 151 ... Container 152 ... Electrodeposition liquid, 153 ... Counter electrode, 154 ... Constant voltage source.

Claims (10)

Forming a seed layer made of metal on a substrate;
Forming a resist film having an opening pattern on the seed layer;
Forming a metal pattern by plating on the seed layer exposed to the opening pattern;
Forming an electrodeposition film on the surface of the metal pattern exposed in an opening where a part of the metal pattern is exposed by electrodeposition applying a voltage to the seed layer;
Removing the resist film;
And a step of selectively etching and separating the seed layer using the metal pattern as a mask. In the pattern formation method of Claim 1,
The pattern forming method, wherein the opening when forming the electrodeposition film is the opening pattern of the resist film. In the pattern formation method of Claim 1,
The pattern forming method, wherein the opening when forming the electrodeposition film is a new opening pattern formed in a resist film newly formed by removing the resist film. In the pattern formation method of any one of Claims 1-3,
After forming the metal pattern, a gap is formed between the side surface of the opening and the metal pattern to expose the upper surface and the side surface of the metal pattern,
The pattern forming method, wherein the electrodeposition film is formed on the exposed upper surface and side surfaces of the metal pattern. In the pattern formation method of Claim 4,
After the metal pattern is formed, the metal pattern is etched to form a gap between the side surface of the opening and the metal pattern to expose the upper surface and the side surface of the metal pattern. Pattern forming method. In the pattern formation method of Claim 4,
After the metal pattern is formed, the opening is widened to form a gap between the side surface of the opening and the metal pattern to expose the upper surface and the side surface of the metal pattern. Forming method. In the pattern formation method of any one of Claims 1-3,
After the seed layer is selectively etched and separated, the pattern forming method further includes a step of etching a side surface of the metal pattern not covered with the electrodeposition film. In the pattern formation method of Claim 7,
A part of the seed layer and the metal pattern is formed on a sacrificial pattern formed on the substrate;
The seed layer is selectively etched and separated using the metal pattern as a mask, the sacrificial pattern is removed, and a movable structure is formed on the substrate with the seed layer and a part of the metal pattern. A pattern forming method characterized by the above. In the pattern formation method of any one of Claims 4-6,
The pattern formation method characterized by newly providing the process of forming the insulating film which covers the said metal pattern covered with the said electrodeposition film. In the pattern formation method of any one of Claims 1-9,
The electrodeposition liquid used for the said electrodeposition contains sulfonium ion as an electrodeposition component. The pattern formation method characterized by the above-mentioned.

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