JP2000227608A - Liquid crystal display - Google Patents

Abstract

(57) [Object] To provide a liquid crystal display device with good display quality even if power consumption is reduced in the liquid crystal display device. A pixel portion is provided with a dynamic memory circuit using a TFT and a liquid crystal drive circuit for controlling display in accordance with the contents of the memory. Each time the display content is changed, the display data of one line including the pixel is updated, and the liquid crystal display device is driven by a drive circuit that controls the line counter to periodically rewrite the display content of all lines.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly to a liquid crystal display device with a built-in peripheral circuit in which a driving section is formed on the same substrate as a display section.

[0002]

2. Description of the Related Art As a driving method of a small, high-definition liquid crystal display panel, a method of forming a matrix peripheral circuit on a glass substrate using a thin film transistor has been conventionally used. For example, it is reported on pages 879 to 881 of the 1998 SID International Symposium Digest of Technical Papers. The details of the active matrix driving method and the liquid crystal display module are described in detail in Liquid Crystal Display Technology (Sangyo Tosho), edited by Shoichi Matsumoto. Hereinafter, a configuration of a conventional display device shown in FIG. 2 and a schematic configuration of a liquid crystal display device according to the present invention shown in FIG. 1 will be described in order to clarify a difference from the present invention.

[0003] In the configuration of FIG.
A pixel 202 having a plurality of TFTs and a capacitor composed of a liquid crystal capacitor is arranged, and the gate wiring 20 is driven to drive the pixel 202.
3, a gate side drive circuit 205 including a gate line drive circuit and a shift register circuit for applying a scan pulse, and a signal side drive circuit 206 for applying a gradation voltage for driving liquid crystal to the signal wiring 204. It comprises a register circuit, a digital sampling circuit, and a DA converter. The signals required for driving the panel include a vertical clock signal for driving a shift register and a frame start signal for starting a scanning pulse in order to drive a scanning side driving circuit. Signals necessary for driving the signal side driving circuit include a dot clock for driving the shift register, display data, and a horizontal start signal for capturing display data. With these signals, display data of all the pixels is input every frame time, and the signal side drive circuit converts the AC voltage necessary for driving the liquid crystal to the pixel repeatedly, thereby driving the liquid crystal of the pixel.

When driving a TFT active matrix liquid crystal display, a line-sequential scanning method is adopted.
A scanning pulse is applied to each scanning electrode once every one frame time. A frame time of about 1/60 second is often used, and this pulse is usually applied while shifting the timing sequentially from the upper side to the lower side of the panel. Accordingly, in a 640 × 480 dot color panel, one pixel is composed of dots, and the total number of dots is 1920 × 480 dots, and 480 gate lines are scanned in one frame. The time width of the pulse is about 37 μs.

On the other hand, a liquid crystal drive voltage applied to the liquid crystal of one row of pixels to which the scanning pulse is applied is simultaneously applied to the signal electrode in synchronization with the scanning pulse. In the selected pixel to which the gate pulse is applied, the gate electrode pressure of the TFT connected to the scanning electrode increases, and the TFT is turned on. At this time, the liquid crystal driving voltage is applied to the display electrode via the source and the drain of the TFT, and the liquid crystal capacitance formed between the display electrode and the counter electrode formed on the counter substrate, and the liquid crystal driving voltage is applied to the pixel. The pixel capacity is charged together with the set load capacity. By repeating this operation, the liquid crystal application voltage is repeatedly applied to the pixel capacitors on the entire panel every frame time.

Further, since an AC voltage is necessary to drive the liquid crystal, a voltage whose polarity is inverted is applied to the signal electrode every frame time. Therefore, the liquid crystal drive frequency is 30 Hz, which is a half of the frame frequency of 60 Hz, and a flicker called flicker is seen, making display difficult. In order to make the flicker invisible, the polarity of the liquid crystal drive voltage is alternately inverted for each of the vertically and horizontally adjacent pixels, thereby obtaining a good display using a drive method in which the flicker is inconspicuous.

As a result, much of the power for driving the panel is reduced by the capacitance at the intersection of the scanning and signal wirings,
The capacity of the liquid crystal between the counter electrode formed on the entire surface of the counter substrate and the counter electrode is consumed to repeat charge and discharge for each gate selection time.

Further, from the viewpoint of application to portable information equipment, a great reduction in power consumption is required, and there is a display device using a reflection type liquid crystal. For example, Society for Information Display International Symposium Digest of Technical Paper No. 18 (1
(997) Pages 1015 to 1018 describe a reflection type liquid crystal display device using a guest-host type liquid crystal, and it is reported that a backlight which is indispensable for the display device is not required. However, this panel is driven by the conventional driving method described above, and the power for driving the display unit without the backlight is the same as that of the related art.

In the display device of the present invention shown in FIG.
01, a voltage memory 103 for holding gradation data for each pixel unit 102 and a liquid crystal drive for converting a voltage of a liquid crystal drive power supply applied from the outside to a liquid crystal drive voltage corresponding to the contents of the memory are controlled. A mechanism is added, and the display content can be changed by rewriting the gradation data. Further, since the image memory is provided in the display device, even if the operation of the signal side drive circuit and the display line drive circuit is stopped and the display is fixed for a long time, the display is not lost. When the liquid crystal drive power supply is operating, the display can be maintained, and the power consumption for displaying a still image can be significantly reduced. For an input signal to a device required for display, an image memory with a line buffer is built in the display device, and a pixel address signal of a portion for changing display contents and display data may be input.
Since a display control signal in an information device such as a computer is a combination of a drawing address and data in a bitmap format, the display control signal has good consistency and is easily connected to the display device of the present invention.

[0010]

In the above prior art, the contents of all the pixels must be rewritten every frame time in order to drive the display section without flicker satisfactorily, and it is difficult to reduce the power consumption. The power consumption of the display unit in this prior art is generated by charging and discharging the capacitance of the wiring of the display unit, and is proportional to the frame frequency. When the frame frequency is reduced to reduce power consumption, flicker occurs in the display, and the display quality is significantly reduced.

Japanese Patent Application Laid-Open No. 9-258168 discloses a known example of a panel structure having a memory and a switch inside a pixel as in the present invention. Not stated.

[0012]

The object of the present invention is to provide a pixel unit memory for holding display contents for each pixel and a display control circuit for controlling a liquid crystal drive voltage according to the contents of the memory.
To drive the display unit, a display line selection circuit that selects pixels in columns, a line counter circuit that drives the display lines, a display rewrite line signal buffer that stores display rewrite line signals, and transfer of display data to the display unit Buffer, a PS conversion circuit, an SP conversion circuit, an image memory for holding display data, a memory line selection circuit for driving the memory, a column selection circuit,
A memory control circuit for controlling writing to the memory,
It is solved by combining. In particular, for a display line signal indicating a line of the image memory and the display unit, a display line signal switching circuit for switching between driving from an external address signal and input from a line counter competing with each other causes an external signal in the memory unit. The above problem is solved by reducing the power consumption and obtaining a good display by inputting the address signal from the display unit and the signal from the line counter to the memory and the display unit with priority.

An externally input address signal and display data of a pixel for changing the display are stored at a specific address in the image memory, stored in a rewrite line buffer, and input to a display line selection circuit of the display unit. . When the rewriting is completed, the image memory transfers one line of data including the pixels rewritten by the memory line selection circuit to the line buffer. The transferred data is taken into the pixel memory inside the selected line of the display unit, and the liquid crystal is driven by the liquid crystal driving power supply to perform the display operation. Also, a signal for sequentially selecting a line is generated from a line counter at regular intervals, and the contents of the pixel memory are reproduced and updated to maintain the display by rewriting all lines in synchronization with the image memory and the display unit. Can be. At this time, if the display change operation by the external input is performed by the line counter and the memory is reproduced, the line counter stops the operation and the display change operation is executed with priority, so that the display is rewritten without disturbing the display. Is performed.

[0014]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described in detail with reference to embodiments.

FIG. 3 is a block diagram of the liquid crystal display device according to the first embodiment. The image memory has a bitmap configuration in which memory cells inside the memory are arranged in a matrix and has the same address space as the pixels of the display unit. In the image memory, line lines are connected to each other so that data is simultaneously read out for each line of the display unit. The bit map address designated by the address signal is converted by a memory control circuit into a column line (not shown) for selecting an arbitrary memory cell in the matrix and a memory line selection signal 301 for selecting a line line, and is converted to a predetermined signal. The display data is written into the memory cells of the above. After the data is written in this way, a memory line selection signal for selecting an arbitrary line and a predetermined signal for reading are input to the selected memory line selection circuit, so that one line of data including the pixel to be selected becomes 1 Output to the line buffer for the line. The line buffer is connected to the signal wiring of the display unit. The address signal is input to an address line conversion circuit composed of a logic circuit, and a display line selection signal 302 for selecting an arbitrary line of the display unit including a bitmap address of a pixel.
Generate

In the display section, an arbitrary line is selected by a display line selection signal, and a selection voltage is applied to a line selection wiring (not shown). In the pixels on the selected line, the display content is changed by holding a voltage in a sampling circuit inside the pixel with a signal on a signal wiring (not shown). FIG. 4 shows a circuit configuration of the pixel portion. Line selection wiring 4
01, the sampling TFT 4 at the intersection of the data wiring 402
The gate and drain terminals of 05 are connected, and the sampling terminal 406 is connected to the source terminal.
The other terminal of the sampling capacitor is connected to the common wiring 404 and is externally connected to a reference potential. Display control TFT407 is connected to the source terminal of the sampling capacitor.
The source and the drain are connected to the display electrode 408 and the liquid crystal reference wiring 403, respectively. A compensation capacitor 409 is connected between the source and drain terminals. The display electrode is electrically connected to a common electrode on the opposite substrate through a liquid crystal capacitor (not shown) by capacitive coupling, and is connected to a liquid crystal driving power supply. In the pixel circuit, when the sampling TFT applies a voltage to the line selection wiring and sets it to the selected state, the sampling capacitor is turned on, and the voltage of the signal wiring is charged to the sampling capacitor. The conducting and non-conducting state of the liquid crystal driving TFT changes according to the voltage of the sampling capacitor.
Since the resistance between the source and the drain changes, the compensation capacitor is short-circuited in the common state. Since the liquid crystal driving voltage supplied from the liquid crystal driving power supply is divided by the ratio of the compensation capacitor and the liquid crystal capacitance, all the liquid crystal driving voltages are applied to the liquid crystal when the liquid crystal driving TFT is on, and in the normally open mode, Black is displayed. When the liquid crystal driving TFT is turned off, most of the liquid crystal driving voltage is applied to the compensation capacitor, so that the voltage applied to the liquid crystal decreases, and the display becomes white. It is displayed in this way. The capacitance of the compensation capacitor and the liquid crystal applied voltage have the following relationship.

VLC = VDRV × CCPS ÷ (CCPS + CLC) At this time, VLC: liquid crystal applied voltage, VDRV: liquid crystal driving voltage, CCPS: compensation capacitor, CLC: liquid crystal capacitance. Since the voltage is equal to or lower than the threshold voltage of the liquid crystal, VLC <Vth Vth:
Since the threshold voltage of the liquid crystal is used, CCPS <Vth × CLC ÷ (VDRV−Vth) The compensation capacitor is the line selection wiring 40 having the pixel configuration of FIG.
1, it can be formed by the wiring interlayer capacitance of the data wiring 402. Further, if the configuration is made using the capacitance between the gate layer and the active layer of the TFT, the compensation capacitor can be formed more compact.

FIG. 5 shows another embodiment having a different pixel structure. Since the liquid crystal is driven by using the analog switch 504 as a TFT for driving the liquid crystal, the liquid crystal can be driven with low impedance regardless of the polarity of the liquid crystal driving voltage. pchTFT and nchT
In order to drive an analog switch composed of an FT, sampling capacitors 503 and 507 and a sampling TFT 5
02, 506 are provided in two systems, and data having different polarities are supplied using two data lines 501, 505, connected to a common line selection line 401, and simultaneously sampled to perform a display operation. . Instead of providing two memory circuits, data having different polarities for driving the analog switches may be generated by an inverter circuit provided inside the pixel. A memory circuit used for a semiconductor as a memory circuit is a TFT.
It is obvious that the display can be performed even if the display is constituted by using. In this case, the data is not lost during the period when the power is supplied, and the display can be maintained for a long time.

FIG. 6 is an external view of the liquid crystal display device of this embodiment. On the TFT circuit board 601, a display section 603, data wiring 402, line selection wiring 401, display line selection circuit 604, line buffer 605, image memory circuit 6
A control circuit 607 including an image memory and an address line conversion circuit is formed using TFTs. These TFTs are polysilicon TFs that can form CMOS TFTs.
It can be formed by a T process. It is also possible to form all or a part of these circuits on a wafer using an LSI process furnace. In this case, anisotropic materials such as Hitachi Chemical's Anisorm are used for connection with data wiring and line selection wiring. It can be configured by interconnecting via a conductive film. A counter substrate 602 is attached to the display portion, and a gap between the substrates is filled with liquid crystal. Although not shown in the figure, in the case of a transmissive display device using a TN type liquid crystal, a polarizing film is attached to the outside of the TFT substrate and the opposite substrate, and a backlight is provided outside these. Are located. In the case of the reflective display mode, a backlight is unnecessary, and a metal foil film of Al or the like is formed and used as a display electrode of a pixel.

Next, the operation of the display device will be described with reference to FIG. A display address and display data of a pixel whose display is to be rewritten are input as input signals. In the image memory, the contents of the memory cell at the corresponding address are rewritten. Next, display data for one line including the rewritten address is simultaneously read out to the line buffer. In the display unit, the display address is converted to a display line by an address line conversion circuit, a specific line of the display unit is selected, and the voltage of the sampling capacitor is rewritten through data wiring to display one line. rewrite. The example shown in the figure is a case where the upper left corner, the lower right corner, and the center pixel of the display are sequentially rewritten. It can be seen that the address of each pixel is written in the image memory, the corresponding one-line address is selected, and the memory contents are rewritten by selecting the line of the display unit.

The liquid crystal used in the present display device is PCGH, PDLC, guest host liquid crystal, etc., which can be used in the reflective display mode, and the display can be performed by using a scattering-reflective metal thin film and a polarizing film as the pixel electrodes. It is. In this case, since no backlight is required, the power consumption of the device can be significantly reduced.

Next, a second embodiment shown in FIG. 8 will be described. In this embodiment, a line counter, a display line signal switching circuit, and a line buffer are added to the input of the display line selection circuit in addition to the address line conversion circuit. Further, a memory line signal switching circuit is added to the input of the memory line selection circuit.

These newly added circuits can maintain a good display when the display contents are fixed and a long time has elapsed. Pixels on lines that have not been rewritten for a long time
If the charging voltage of the sampling capacitor in the pixel leaks through the off-resistance of the sampling transistor and changes beyond the threshold voltage of the sampling transistor, data is lost and the display changes. The capacity of the sampling capacitor is 10 pF, the leakage current of the sampling TFT is 1 pA, and the charging voltage of the capacitor is 15 V
In the case of (1), the charging voltage of the sampling capacitor decreases by 0.5 V per second. 7.5V after 15 seconds
, And exceeds 50% of the power supply voltage which is the threshold voltage of the CMOS logic circuit, and the information changes from “1” to “0”. Therefore, the display changes from white to black, and the display content changes. Therefore, the display can be maintained for a long time by writing the display information again before the charging voltage of the sampling capacitor exceeds the threshold and changes. The power consumption generated by rewriting about once every 10 seconds is 1/600 of that in the case of rewriting 60 times per second as in the conventional example, and the power consumption can be extremely low.

In order to do this, each display line of the display section is sequentially selected by a line counter, a corresponding memory line is selected in synchronization therewith, and one line of display data is transferred via a line buffer and data wiring. And writing to the sampling capacitor. At this time,
When an external write signal is input, the line counter is temporarily stopped by the control circuit, and during that period, the image memory is rewritten by the address signal, a memory line is selected, and display data of the corresponding line is taken out. The display line and the memory line are displayed by the output of the conversion circuit, and then the rewriting operation is performed by the line counter, whereby both the immediate change of the display and the maintenance of the display content for a long time can be compatible. At this time, the memory line signal switching circuit 802 and the display line switching circuit 801 can be configured by a two-input to one-output selection switch using an analog switch circuit. Also,
When a large number of external display rewriting instructions are input continuously more frequently than the display rewriting time for each line, only the image memory is sequentially rewritten at a high speed, and the display unit is rewritten by a line address conversion circuit and a display line. By providing a FIFO type line buffer between the switching circuits 801, the display content can be changed correctly. Also, the minimum configuration on the TFT circuit board 601 is T
When formed by the FT circuit, a large number of wirings are required for the display data for the lines output from the image memory. Therefore, a parallel-serial conversion circuit is arranged as a PS conversion circuit in the figure disposed after the line buffer. By using, TF
The number of connection points between the T image memory and the TFT circuit board can be greatly reduced. It can be driven by forming a serial-to-parallel conversion circuit, shown as an SP conversion circuit in the figure, on a TFT substrate and developing it into one line of data wiring necessary for driving the display unit.

The operation of the circuit of this embodiment will be described with reference to FIG. When changing the display content, the operation of the line counter is stopped, and the display is changed by an external input signal as in the first embodiment. Thereafter, when there is no external input, the line counter is sequentially incremented, and the display of the line number corresponding to the counter output is repeatedly written from the image memory, so that the display for a long time is maintained.

In this embodiment, as the display density increases, the connection pitch between the display section, the display line selection circuit, and the line buffer becomes smaller.
By forming them collectively on the FT substrate, it is easy to manufacture even if the definition is high. However, the circuit scale of a circuit portion such as an image memory increases significantly as the display capacity increases. For this reason, it is difficult to form the circuit on a TFT substrate. Rather, the circuit is formed using an LSI and connected to the TFT substrate to form a display device. The number of wires between the wires and the image memory increases, and connection becomes difficult. Therefore, a PS conversion circuit and a S-S conversion circuit in which a plurality of relay wirings are provided between the line buffer and the display data buffer, and a changeover switch is provided between the line buffer and the relay wiring, and between the relay wiring and the data wiring in synchronization with each other. By transferring data between the data wiring and the image memory by transferring the data in a time-division switching method by the P conversion circuit, the number of connections between the two can be reduced, so that high definition can be handled.

FIG. 10 is an external view of the liquid crystal display device of the second embodiment. Display unit 603 and display line selection circuit 60
4. A line buffer 605 is formed on the TFT circuit board 601, and peripheral circuits such as an image memory
It is mounted on a peripheral circuit board 1002 as I1001 and is connected to the TFT substrate by a relay wiring 803. The relay wiring may be formed using a flexible printed board, and may be connected to the TFT substrate and the peripheral circuit board by an anisole.

[0028]

The liquid crystal display device according to the present invention is characterized in that power consumption can be significantly reduced. In addition, the display is effective not only for the notebook PC described in the present embodiment but also for the miniaturization and weight reduction of other portable information processing devices and the improvement of battery life.

[Brief description of the drawings]

FIG. 1 is a schematic configuration diagram of the present invention.

FIG. 2 is a configuration diagram of a conventional liquid crystal display device.

FIG. 3 is a block diagram of a display device according to the first embodiment.

FIG. 4 shows a pixel circuit TFT circuit configuration.

FIG. 5 shows a pixel circuit TFT circuit configuration.

FIG. 6 is an external view of a display device.

FIG. 7 is an explanatory diagram of a circuit operation.

FIG. 8 is a block diagram of a display device according to a second embodiment.

FIG. 9 is an explanatory diagram of a circuit operation.

FIG. 10 is an external view of a display device.

[Explanation of symbols]

101, 201, 603: display unit, 102: pixel unit, 1
03: voltage memory, 202: pixel, 203: gate wiring, 204, 402: signal wiring, 205: gate side driving circuit, 206: signal side driving circuit, 301: selection signal, 3
02: display line selection signal, 401: line selection wiring,
403: liquid crystal reference wiring, 404: common wiring, 405: sampling TFT, 406, 503, 507: sampling capacitor, 407: display control TFT, 408: display electrode, 409: compensation capacitor, 501, 505: data wiring, 502, 506 memory circuit, 504 analog switch, 601 TFT circuit board, 602 counter substrate, 604 display line selection circuit, 605 line buffer, 606 image memory circuit, 607 control circuit,
801: display line switching circuit, 802: memory line switching circuit, 803: relay wiring, 1001: image memory LSI, 1002: peripheral circuit board.

 ──────────────────────────────────────────────────続 き Continued on front page F-term (reference) 2H092 GA49 GA51 GA59 JA24 JB13 JB43 KA04 KA07 NA01 NA25 NA26 PA06 QA07 2H093 NA16 NA20 NA21 NA42 NC13 NC15 NC16 NC22 NC23 NC25 NC26 NC28 NC34 NC90 ND10 ND15 ND39 ND58 NE006 AF05 BB16 BB28 BC20 BF02 BF05 BF11 BF22 BF24 BF37 EC08 FA42 FA47

Claims (8)

[Claims] 1. A liquid crystal display device comprising: a pair of substrates at least one of which is transparent; and a liquid crystal layer sandwiched between the pair of substrates, wherein one of the pair of substrates has a plurality of scanning electrodes; A plurality of signal electrodes intersecting in a matrix with the plurality of scan electrodes, and a scan electrode corresponding to each pixel region of the one substrate surrounded by the plurality of scan electrodes and the plurality of signal electrodes; A display data holding circuit that is connected to the signal electrode and captures and holds display data from the signal electrode in response to a scanning signal; and a switching element that is connected to the display data holding circuit and whose switching is controlled by the circuit. A capacitor in parallel with the switching element;
A display electrode connected to the switching element, the display content of the pixel area is held in a storage area assigned to each pixel, and writable for each pixel, and in an arbitrary column, the pixel column direction An image memory configured to take out one column of data to a line buffer in units; an output of the line buffer is connected to the signal electrode; and a pixel address indicating a coordinate of a pixel to be written to the image memory is stored in the memory. An address line conversion circuit having a function of converting to a line coordinate of a display unit including a pixel, and a display line selection circuit for selectively driving the scan electrode specified by the output of the address line conversion circuit. After writing the display data to the image memory,
Transferring one line of display data including the written pixels to a display unit, selecting a line indicated by the address line conversion circuit of the display line, and rewriting the display of one line. Characteristic liquid crystal display device. 2. A signal line according to claim 1, comprising two wirings for transmitting signals of positive and negative polarities which are inverted from each other. In the pixel region, a corresponding scanning electrode and two signals are provided. Two sets of display data holding circuits that are connected to the electrodes and capture and hold the display data from the positive and negative signal electrodes in response to the scanning signals, and are connected to the display data holding circuits, and the switching is controlled by the circuits. A liquid crystal display device comprising: a switching element; and a display electrode having a capacitor in parallel with the switching element and connected to the switching element. 3. A liquid crystal display device according to claim 2, wherein an analog switch combining pch and nch TFTs is used as said switching element. 4. A liquid crystal display device comprising: a pair of substrates, at least one of which is transparent; and a liquid crystal layer sandwiched between said pair of substrates, wherein one of said pair of substrates has a plurality of scanning electrodes; A plurality of signal electrodes intersecting in a matrix with the plurality of scan electrodes, and a scan electrode corresponding to each pixel region of the one substrate surrounded by the plurality of scan electrodes and the plurality of signal electrodes; A display data holding circuit that is connected to the signal electrode and captures and holds display data from the signal electrode in response to a scanning signal; and a switching element that is connected to the display data holding circuit and whose switching is controlled by the circuit. A capacitor in parallel with the switching element;
A display electrode connected to the switching element, the display content of the pixel area is held in a storage area assigned to each pixel, and writable for each pixel, and in an arbitrary column, the pixel column direction An image memory configured to take out one column of data to a line buffer in units; an output of the line buffer is connected to the signal electrode; and a pixel address indicating a coordinate of a pixel to be written to the image memory is stored in the memory. An address line conversion circuit having a function of converting to a line coordinate of a display unit including a pixel, and a display line selection circuit for selectively driving the scan electrode specified by an output of the address line conversion circuit. A line counter for generating a line selection signal to be selected, a line counter selection signal, and an address line selection circuit A display line switching circuit for selecting one of the outputs and connecting to the display line selection circuit; and selecting one of the selection output of the line counter and a line selection signal from the memory control circuit for connection to the memory line selection circuit. And a display line switching circuit. When a signal for rewriting display data of an arbitrary pixel is input, the signal is written to an image memory, and then display data for one line including the written pixel is transferred to a display unit. Selecting a line indicated by the address line conversion circuit of the display line and controlling the display of one line to be rewritten; and selecting and outputting the line counter when a signal for rewriting display data of an arbitrary pixel is not inputted. Transfers the display data for one line specified by to the display unit and rewrites the display for one line on the display unit A liquid crystal display device characterized by being controlled as follows. 5. A first-in first-out buffer according to claim 4, wherein a plurality of designated line numbers are sequentially held and accumulated between said address line conversion circuit and said display line switching circuit, and are sequentially output in the order of accumulation. A liquid crystal display device, wherein a memory is connected, and the operation of the line counter is controlled to be stopped while a line number is commanded in the buffer. 6. A liquid crystal display device having a pair of substrates, at least one of which is transparent, and a liquid crystal layer sandwiched between said pair of substrates, wherein one of said pair of substrates has a plurality of scanning electrodes, A plurality of signal electrodes intersecting in a matrix with the plurality of scan electrodes, and a scan electrode corresponding to each pixel region of the one substrate surrounded by the plurality of scan electrodes and the plurality of signal electrodes; A display data holding circuit that is connected to the signal electrode and captures and holds display data from the signal electrode in response to a scanning signal; and a switching element that is connected to the display data holding circuit and whose switching is controlled by the circuit. A capacitor in parallel with the switching element;
A display electrode connected to the switching element, the display content of the pixel area is held in a storage area assigned to each pixel, and writable for each pixel, and in an arbitrary column, the pixel column direction An image memory configured to take out one column of data to a line buffer in units, wherein an output of the line buffer and the signal electrode are connected via a plurality of relay wirings, and the line is output by a time division method. An address line converter having a circuit for controlling transfer of display data on a buffer to the signal electrode, and having a function of converting a pixel address indicating a coordinate of a pixel to be written into the image memory into a line coordinate of a display unit including the pixel A display line selection circuit for selectively driving the scan electrode specified by the output of the address line conversion circuit. After writing the pixel display data to the image memory,
Transferring one line of display data including the written pixels to a display unit, selecting a line indicated by the address line conversion circuit of the display line, and rewriting the display of one line. Characteristic liquid crystal display device. 7. The liquid crystal display device according to claim 6, wherein
The output of the line buffer and the signal electrode are connected via a plurality of relay wirings, and a switch element is connected between the line buffer and the relay wiring and between the relay wiring and the signal wiring to synchronize them. A liquid crystal display device comprising a transfer control circuit for controlling connection by selective connection. 8. The liquid crystal display device according to claim 7, wherein said pixel, a display line selection circuit, and a transfer control circuit for selectively connecting between said relay wiring and said signal wiring are formed on said substrate. Liquid crystal display device.