EP3903349A4 - MEMORY DEVICE WITH SHARED READ/WRITE DATA LINE FOR 2-TRANSISTOR VERTICAL MEMORY CELL - Google Patents

MEMORY DEVICE WITH SHARED READ/WRITE DATA LINE FOR 2-TRANSISTOR VERTICAL MEMORY CELL Download PDF

Info

Publication number
EP3903349A4
EP3903349A4 EP19903057.8A EP19903057A EP3903349A4 EP 3903349 A4 EP3903349 A4 EP 3903349A4 EP 19903057 A EP19903057 A EP 19903057A EP 3903349 A4 EP3903349 A4 EP 3903349A4
Authority
EP
European Patent Office
Prior art keywords
data line
write data
memory cell
memory device
shared read
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP19903057.8A
Other languages
German (de)
French (fr)
Other versions
EP3903349A1 (en
Inventor
Kamal M. Karda
Haitao Liu
Karthik Sarpatwari
Durai Vishak Nirmal Ramaswamy
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Micron Technology Inc
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Publication of EP3903349A1 publication Critical patent/EP3903349A1/en
Publication of EP3903349A4 publication Critical patent/EP3903349A4/en
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/20—DRAM devices comprising floating-body transistors, e.g. floating-body cells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/68—Floating-gate IGFETs
    • H10D30/689—Vertical floating-gate IGFETs
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4074—Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4096—Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches 
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4097—Bit-line organisation, e.g. bit-line layout, folded bit lines
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
    • G11C5/063—Voltage and signal distribution in integrated semi-conductor memory access lines, e.g. word-line, bit-line, cross-over resistance, propagation delay
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/50—Peripheral circuit region structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/20—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional [3D] arrangements, e.g. with cells on different height levels
    • H10B43/23—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional [3D] arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
    • H10B43/27—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional [3D] arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Databases & Information Systems (AREA)
  • Semiconductor Memories (AREA)
  • Dram (AREA)
EP19903057.8A 2018-12-26 2019-12-23 MEMORY DEVICE WITH SHARED READ/WRITE DATA LINE FOR 2-TRANSISTOR VERTICAL MEMORY CELL Withdrawn EP3903349A4 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US201862785142P 2018-12-26 2018-12-26
PCT/US2019/068387 WO2020139847A1 (en) 2018-12-26 2019-12-23 Memory device having shared read/write data line for 2-transistor vertical memory cell

Publications (2)

Publication Number Publication Date
EP3903349A1 EP3903349A1 (en) 2021-11-03
EP3903349A4 true EP3903349A4 (en) 2023-02-01

Family

ID=71123203

Family Applications (1)

Application Number Title Priority Date Filing Date
EP19903057.8A Withdrawn EP3903349A4 (en) 2018-12-26 2019-12-23 MEMORY DEVICE WITH SHARED READ/WRITE DATA LINE FOR 2-TRANSISTOR VERTICAL MEMORY CELL

Country Status (5)

Country Link
US (2) US12361977B2 (en)
EP (1) EP3903349A4 (en)
KR (1) KR20210096678A (en)
CN (1) CN113728433B (en)
WO (1) WO2020139847A1 (en)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3903349A4 (en) 2018-12-26 2023-02-01 Micron Technology, Inc. MEMORY DEVICE WITH SHARED READ/WRITE DATA LINE FOR 2-TRANSISTOR VERTICAL MEMORY CELL
US12256541B2 (en) * 2021-10-29 2025-03-18 Micron Technology, Inc. Apparatus and method including memory device having 2-transistor vertical memory cell
US11616073B1 (en) 2021-10-29 2023-03-28 Micron Technology, Inc. Memory device having 2-transistor vertical memory cell and wrapped data line structure
US12213321B2 (en) * 2021-10-29 2025-01-28 Micron Technology, Inc. Memory device having 2-transistor vertical memory cell and conductive shield structure
CN120323093A (en) * 2022-12-02 2025-07-15 美光科技公司 Memory device having a hierarchy of 2-transistor memory cells
KR102755896B1 (en) 2023-04-14 2025-01-21 서울대학교산학협력단 Random access memory and method of fabricating the same
KR102730001B1 (en) 2023-04-14 2024-11-15 서울대학교산학협력단 Random access memory and method of fabricating the same
KR20260012132A (en) 2024-07-17 2026-01-26 서울대학교산학협력단 Random access memory including hybrid channel material and method for manufacturing the same

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05110016A (en) * 1991-06-14 1993-04-30 Hitachi Ltd Semiconductor memory storage and manufacture thereof
US5357464A (en) * 1992-03-02 1994-10-18 Hitachi, Ltd. Semiconductor memory having writing and reading transistors, method of fabrication thereof, and method of use thereof
WO2001026158A2 (en) * 1999-10-05 2001-04-12 Infineon Technologies North America Corp. Center storage node for dram trench capacitors
US6504755B1 (en) * 1999-05-14 2003-01-07 Hitachi, Ltd. Semiconductor memory device
US20130077397A1 (en) * 2011-09-26 2013-03-28 Kabushiki Kaisha Toshiba Semiconductor device
US20130228839A1 (en) * 2012-03-05 2013-09-05 Semiconductor Energy Laboratory Co., Ltd. Semiconductor memory device
US20130256774A1 (en) * 2012-03-28 2013-10-03 Namho Jeon Semiconductor memory devices
US20180269210A1 (en) * 2017-03-16 2018-09-20 Toshiba Memory Corporation Semiconductor memory

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6625057B2 (en) 2000-11-17 2003-09-23 Kabushiki Kaisha Toshiba Magnetoresistive memory device
US6396745B1 (en) 2001-02-15 2002-05-28 United Microelectronics Corp. Vertical two-transistor flash memory
KR101752518B1 (en) * 2009-10-30 2017-06-29 가부시키가이샤 한도오따이 에네루기 켄큐쇼 Semiconductor device
US8759895B2 (en) * 2011-02-25 2014-06-24 Micron Technology, Inc. Semiconductor charge storage apparatus and methods
KR20140106239A (en) 2013-02-26 2014-09-03 삼성전자주식회사 Semiconductor device
US9698202B2 (en) * 2015-03-02 2017-07-04 Sandisk Technologies Llc Parallel bit line three-dimensional resistive random access memory
KR102134532B1 (en) 2016-08-31 2020-07-20 마이크론 테크놀로지, 인크 Memory cells and memory arrays
EP3903349A4 (en) 2018-12-26 2023-02-01 Micron Technology, Inc. MEMORY DEVICE WITH SHARED READ/WRITE DATA LINE FOR 2-TRANSISTOR VERTICAL MEMORY CELL
WO2020139710A1 (en) * 2018-12-26 2020-07-02 Micron Technology, Inc. Vertical 2-transistor memory cell
CN113330565B (en) * 2018-12-26 2025-01-07 美光科技公司 Memory device with two-transistor vertical memory cell
US11476252B2 (en) * 2019-08-28 2022-10-18 Micron Technology, Inc. Memory device having 2-transistor vertical memory cell and shared channel region

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05110016A (en) * 1991-06-14 1993-04-30 Hitachi Ltd Semiconductor memory storage and manufacture thereof
US5357464A (en) * 1992-03-02 1994-10-18 Hitachi, Ltd. Semiconductor memory having writing and reading transistors, method of fabrication thereof, and method of use thereof
US6504755B1 (en) * 1999-05-14 2003-01-07 Hitachi, Ltd. Semiconductor memory device
WO2001026158A2 (en) * 1999-10-05 2001-04-12 Infineon Technologies North America Corp. Center storage node for dram trench capacitors
US20130077397A1 (en) * 2011-09-26 2013-03-28 Kabushiki Kaisha Toshiba Semiconductor device
US20130228839A1 (en) * 2012-03-05 2013-09-05 Semiconductor Energy Laboratory Co., Ltd. Semiconductor memory device
US20130256774A1 (en) * 2012-03-28 2013-10-03 Namho Jeon Semiconductor memory devices
US20180269210A1 (en) * 2017-03-16 2018-09-20 Toshiba Memory Corporation Semiconductor memory

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of WO2020139847A1 *

Also Published As

Publication number Publication date
CN113728433B (en) 2025-01-07
KR20210096678A (en) 2021-08-05
US20250342865A1 (en) 2025-11-06
EP3903349A1 (en) 2021-11-03
WO2020139847A1 (en) 2020-07-02
CN113728433A (en) 2021-11-30
US12361977B2 (en) 2025-07-15
US20200211602A1 (en) 2020-07-02

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