EP2803077A4 - CIRCUITS WITH LINEAR FINFET STRUCTURES - Google Patents
CIRCUITS WITH LINEAR FINFET STRUCTURESInfo
- Publication number
- EP2803077A4 EP2803077A4 EP13735704.2A EP13735704A EP2803077A4 EP 2803077 A4 EP2803077 A4 EP 2803077A4 EP 13735704 A EP13735704 A EP 13735704A EP 2803077 A4 EP2803077 A4 EP 2803077A4
- Authority
- EP
- European Patent Office
- Prior art keywords
- circuits
- finfet structures
- linear
- linear finfet
- structures
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/62—Fin field-effect transistors [FinFET]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/024—Manufacture or treatment of FETs having insulated gates [IGFET] of fin field-effect transistors [FinFET]
- H10D30/0243—Manufacture or treatment of FETs having insulated gates [IGFET] of fin field-effect transistors [FinFET] using dummy structures having essentially the same shapes as the semiconductor bodies, e.g. to provide stability
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
- H10D30/66—Vertical DMOS [VDMOS] FETs
- H10D30/663—Vertical DMOS [VDMOS] FETs having both source contacts and drain contacts on the same surface, i.e. up-drain VDMOS
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
- H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
- H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
- H10D64/01304—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H10D64/01326—Aspects related to lithography, isolation or planarisation of the conductor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions
- H10D64/23—Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes
- H10D64/251—Source or drain electrodes for field-effect devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
- H10D84/0193—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices the components including FinFETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
- H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
- H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
- H10D84/85—Complementary IGFETs, e.g. CMOS
- H10D84/853—Complementary IGFETs, e.g. CMOS comprising FinFETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/90—Masterslice integrated circuits
- H10D84/903—Masterslice integrated circuits comprising field effect technology
- H10D84/907—CMOS gate arrays
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
- H10D89/10—Integrated device layouts
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201261586387P | 2012-01-13 | 2012-01-13 | |
| US201261589224P | 2012-01-20 | 2012-01-20 | |
| PCT/US2013/021345 WO2013106799A1 (en) | 2012-01-13 | 2013-01-13 | Circuits with linear finfet structures |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| EP2803077A1 EP2803077A1 (en) | 2014-11-19 |
| EP2803077A4 true EP2803077A4 (en) | 2015-11-04 |
Family
ID=48781972
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| EP13735704.2A Withdrawn EP2803077A4 (en) | 2012-01-13 | 2013-01-13 | CIRCUITS WITH LINEAR FINFET STRUCTURES |
Country Status (8)
| Country | Link |
|---|---|
| EP (1) | EP2803077A4 (en) |
| JP (3) | JP2015506589A (en) |
| KR (1) | KR101913457B1 (en) |
| CN (2) | CN104303263B (en) |
| AU (4) | AU2013207719B2 (en) |
| SG (2) | SG10201605564WA (en) |
| TW (4) | TWI608593B (en) |
| WO (1) | WO2013106799A1 (en) |
Families Citing this family (32)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP6281570B2 (en) | 2013-08-23 | 2018-02-21 | 株式会社ソシオネクスト | Semiconductor integrated circuit device |
| CN105531813B (en) | 2013-09-04 | 2018-10-12 | 株式会社索思未来 | Semiconductor device |
| JP6640965B2 (en) * | 2014-08-18 | 2020-02-05 | ルネサスエレクトロニクス株式会社 | Semiconductor device |
| JP6449082B2 (en) | 2014-08-18 | 2019-01-09 | ルネサスエレクトロニクス株式会社 | Semiconductor device |
| US9478541B2 (en) * | 2014-09-08 | 2016-10-25 | Qualcomm Incorporated | Half node scaling for vertical structures |
| US9607988B2 (en) | 2015-01-30 | 2017-03-28 | Qualcomm Incorporated | Off-center gate cut |
| US9640480B2 (en) * | 2015-05-27 | 2017-05-02 | Qualcomm Incorporated | Cross-couple in multi-height sequential cells for uni-directional M1 |
| US10177127B2 (en) * | 2015-09-04 | 2019-01-08 | Hong Kong Beida Jade Bird Display Limited | Semiconductor apparatus and method of manufacturing the same |
| US10541243B2 (en) | 2015-11-19 | 2020-01-21 | Samsung Electronics Co., Ltd. | Semiconductor device including a gate electrode and a conductive structure |
| US9748389B1 (en) | 2016-03-25 | 2017-08-29 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method for semiconductor device fabrication with improved source drain epitaxy |
| US10262981B2 (en) * | 2016-04-29 | 2019-04-16 | Taiwan Semiconductor Manufacturing Company, Ltd. | Integrated circuit, system for and method of forming an integrated circuit |
| US10366196B2 (en) * | 2016-06-22 | 2019-07-30 | Qualcomm Incorporated | Standard cell architecture for diffusion based on fin count |
| US9972571B1 (en) * | 2016-12-15 | 2018-05-15 | Taiwan Semiconductor Manufacturing Co., Ltd. | Logic cell structure and method |
| US10186510B2 (en) * | 2017-05-01 | 2019-01-22 | Advanced Micro Devices, Inc. | Vertical gate all around library architecture |
| KR102336784B1 (en) | 2017-06-09 | 2021-12-07 | 삼성전자주식회사 | Semiconductor device |
| JP7054013B2 (en) * | 2017-06-27 | 2022-04-13 | 株式会社ソシオネクスト | Semiconductor integrated circuit equipment |
| US10503863B2 (en) | 2017-08-30 | 2019-12-10 | Taiwan Semiconductor Manufacturing Company, Ltd. | Integrated circuit and method of manufacturing same |
| WO2019059907A1 (en) | 2017-09-20 | 2019-03-28 | Intel Corporation | Multi version library cell handling and integrated circuit structures fabricated therefrom |
| US10468428B1 (en) * | 2018-04-19 | 2019-11-05 | Silicon Storage Technology, Inc. | Split gate non-volatile memory cells and logic devices with FinFET structure, and method of making same |
| US10818762B2 (en) * | 2018-05-25 | 2020-10-27 | Advanced Micro Devices, Inc. | Gate contact over active region in cell |
| US11017146B2 (en) | 2018-07-16 | 2021-05-25 | Taiwan Semiconductor Manufacturing Company, Ltd. | Integrated circuit and method of forming the same |
| US10878165B2 (en) * | 2018-07-16 | 2020-12-29 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method for generating layout diagram including protruding pin cell regions and semiconductor device based on same |
| CN112585752B (en) * | 2018-09-05 | 2023-09-19 | 东京毅力科创株式会社 | Power distribution network for 3D logic and memory |
| US11030372B2 (en) | 2018-10-31 | 2021-06-08 | Taiwan Semiconductor Manufacturing Company Ltd. | Method for generating layout diagram including cell having pin patterns and semiconductor device based on same |
| US11093684B2 (en) | 2018-10-31 | 2021-08-17 | Taiwan Semiconductor Manufacturing Company, Ltd. | Power rail with non-linear edge |
| US10796061B1 (en) * | 2019-08-29 | 2020-10-06 | Advanced Micro Devices, Inc. | Standard cell and power grid architectures with EUV lithography |
| KR102849284B1 (en) * | 2019-10-08 | 2025-08-25 | 삼성전자주식회사 | Semiconductor device and manufacturing method of the same |
| US11735525B2 (en) | 2019-10-21 | 2023-08-22 | Tokyo Electron Limited | Power delivery network for CFET with buried power rails |
| US11600707B2 (en) | 2020-05-12 | 2023-03-07 | Micron Technology, Inc. | Methods of forming conductive pipes between neighboring features, and integrated assemblies having conductive pipes between neighboring features |
| US11862620B2 (en) | 2020-09-15 | 2024-01-02 | Taiwan Semiconductor Manufacturing Company, Ltd. | Power gating cell structure |
| US20230299069A1 (en) * | 2021-09-27 | 2023-09-21 | Invention And Collaboration Laboratory Pte. Ltd. | Standard cell structure |
| EP4434092A4 (en) * | 2021-11-16 | 2025-10-08 | Hsu Fu Chang | ADVANCED STRUCTURES WITH MOSFET TRANSISTORS AND METAL LAYERS |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2006090445A1 (en) * | 2005-02-23 | 2006-08-31 | Fujitsu Limited | Semiconductor circuit device, and method for manufacturing the semiconductor circuit device |
| US20080001176A1 (en) * | 2006-06-29 | 2008-01-03 | Kailash Gopalakrishnan | Multi-bit high-density memory device and architecture and method of fabricating multi-bit high-density memory devices |
| US20080308880A1 (en) * | 2007-06-15 | 2008-12-18 | Kabushiki Kaisha Toshiba | Semiconductor device |
| US20100287518A1 (en) * | 2009-05-06 | 2010-11-11 | Tela Innovations, Inc. | Cell Circuit and Layout with Linear Finfet Structures |
| US20100301482A1 (en) * | 2009-06-01 | 2010-12-02 | Globalfoundries Inc. | Sram bit cell with self-aligned bidirectional local interconnects |
| US20110317477A1 (en) * | 2010-06-25 | 2011-12-29 | Taiwan Semiconductor Manufacturing Company, Ltd. | Cell structure for dual-port sram |
Family Cites Families (29)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2720783B2 (en) * | 1993-12-29 | 1998-03-04 | 日本電気株式会社 | Semiconductor integrated circuit |
| JP4437565B2 (en) * | 1998-11-26 | 2010-03-24 | 富士通マイクロエレクトロニクス株式会社 | Semiconductor integrated circuit device, semiconductor integrated circuit device design method, and recording medium |
| JP2001306641A (en) * | 2000-04-27 | 2001-11-02 | Victor Co Of Japan Ltd | Automatic arranging and wiring method for semiconductor integrated circuit |
| US6662350B2 (en) * | 2002-01-28 | 2003-12-09 | International Business Machines Corporation | FinFET layout generation |
| US6842048B2 (en) * | 2002-11-22 | 2005-01-11 | Advanced Micro Devices, Inc. | Two transistor NOR device |
| US6921982B2 (en) * | 2003-07-21 | 2005-07-26 | International Business Machines Corporation | FET channel having a strained lattice structure along multiple surfaces |
| US6924560B2 (en) * | 2003-08-08 | 2005-08-02 | Taiwan Semiconductor Manufacturing Co., Ltd. | Compact SRAM cell with FinFET |
| JP2005116969A (en) * | 2003-10-10 | 2005-04-28 | Toshiba Corp | Semiconductor device and manufacturing method thereof |
| KR100702552B1 (en) * | 2003-12-22 | 2007-04-04 | 인터내셔널 비지네스 머신즈 코포레이션 | Automated Layer Creation Method and Device for Double Gate FFT Design |
| JP4997969B2 (en) * | 2004-06-04 | 2012-08-15 | 日本電気株式会社 | Semiconductor device and manufacturing method thereof |
| JP2007018588A (en) * | 2005-07-06 | 2007-01-25 | Toshiba Corp | Semiconductor memory device and driving method of semiconductor memory device |
| DE102006027178A1 (en) * | 2005-11-21 | 2007-07-05 | Infineon Technologies Ag | A multi-fin device array and method of fabricating a multi-fin device array |
| US8124976B2 (en) * | 2005-12-02 | 2012-02-28 | Nec Corporation | Semiconductor device and method of manufacturing the same |
| US8148052B2 (en) * | 2006-11-14 | 2012-04-03 | Nxp B.V. | Double patterning for lithography to increase feature spatial density |
| US7723786B2 (en) * | 2007-04-11 | 2010-05-25 | Ronald Kakoschke | Apparatus of memory array using FinFETs |
| US7453125B1 (en) * | 2007-04-24 | 2008-11-18 | Infineon Technologies Ag | Double mesh finfet |
| JP4461154B2 (en) * | 2007-05-15 | 2010-05-12 | 株式会社東芝 | Semiconductor device |
| US7625790B2 (en) * | 2007-07-26 | 2009-12-01 | International Business Machines Corporation | FinFET with sublithographic fin width |
| US20090057780A1 (en) * | 2007-08-27 | 2009-03-05 | International Business Machines Corporation | Finfet structure including multiple semiconductor fin channel heights |
| US8866254B2 (en) * | 2008-02-19 | 2014-10-21 | Micron Technology, Inc. | Devices including fin transistors robust to gate shorts and methods of making the same |
| JP5638760B2 (en) * | 2008-08-19 | 2014-12-10 | ルネサスエレクトロニクス株式会社 | Semiconductor device |
| JP2010141047A (en) * | 2008-12-10 | 2010-06-24 | Renesas Technology Corp | Semiconductor integrated circuit device and method of manufacturing the same |
| US8116121B2 (en) * | 2009-03-06 | 2012-02-14 | Kabushiki Kaisha Toshiba | Semiconductor device and manufacturing methods with using non-planar type of transistors |
| JP2010225768A (en) * | 2009-03-23 | 2010-10-07 | Toshiba Corp | Semiconductor device |
| US8053299B2 (en) * | 2009-04-17 | 2011-11-08 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of fabrication of a FinFET element |
| JP4751463B2 (en) * | 2009-05-25 | 2011-08-17 | 本田技研工業株式会社 | Fuel cell system |
| US8637135B2 (en) * | 2009-11-18 | 2014-01-28 | Taiwan Semiconductor Manufacturing Company, Ltd. | Non-uniform semiconductor device active area pattern formation |
| CN102074582B (en) * | 2009-11-20 | 2013-06-12 | 台湾积体电路制造股份有限公司 | Integrated circuit structure and method of forming the same |
| US8860107B2 (en) * | 2010-06-03 | 2014-10-14 | International Business Machines Corporation | FinFET-compatible metal-insulator-metal capacitor |
-
2013
- 2013-01-13 EP EP13735704.2A patent/EP2803077A4/en not_active Withdrawn
- 2013-01-13 KR KR1020147022592A patent/KR101913457B1/en not_active Expired - Fee Related
- 2013-01-13 CN CN201380013824.6A patent/CN104303263B/en not_active Expired - Fee Related
- 2013-01-13 WO PCT/US2013/021345 patent/WO2013106799A1/en not_active Ceased
- 2013-01-13 AU AU2013207719A patent/AU2013207719B2/en not_active Ceased
- 2013-01-13 JP JP2014552360A patent/JP2015506589A/en active Pending
- 2013-01-13 SG SG10201605564WA patent/SG10201605564WA/en unknown
- 2013-01-13 SG SG11201404024YA patent/SG11201404024YA/en unknown
- 2013-01-13 CN CN201611023356.2A patent/CN107424999A/en active Pending
- 2013-01-14 TW TW106104453A patent/TWI608593B/en not_active IP Right Cessation
- 2013-01-14 TW TW106134477A patent/TW201803084A/en unknown
- 2013-01-14 TW TW102101384A patent/TWI552307B/en not_active IP Right Cessation
- 2013-01-14 TW TW105125226A patent/TWI581403B/en not_active IP Right Cessation
-
2016
- 2016-04-11 AU AU2016202229A patent/AU2016202229B2/en not_active Ceased
-
2017
- 2017-09-13 JP JP2017176032A patent/JP6467476B2/en not_active Expired - Fee Related
-
2018
- 2018-01-23 AU AU2018200549A patent/AU2018200549B2/en not_active Ceased
-
2019
- 2019-01-11 JP JP2019003098A patent/JP2019054297A/en active Pending
-
2020
- 2020-03-02 AU AU2020201521A patent/AU2020201521A1/en not_active Abandoned
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2006090445A1 (en) * | 2005-02-23 | 2006-08-31 | Fujitsu Limited | Semiconductor circuit device, and method for manufacturing the semiconductor circuit device |
| US20080001176A1 (en) * | 2006-06-29 | 2008-01-03 | Kailash Gopalakrishnan | Multi-bit high-density memory device and architecture and method of fabricating multi-bit high-density memory devices |
| US20080308880A1 (en) * | 2007-06-15 | 2008-12-18 | Kabushiki Kaisha Toshiba | Semiconductor device |
| US20100287518A1 (en) * | 2009-05-06 | 2010-11-11 | Tela Innovations, Inc. | Cell Circuit and Layout with Linear Finfet Structures |
| US20100301482A1 (en) * | 2009-06-01 | 2010-12-02 | Globalfoundries Inc. | Sram bit cell with self-aligned bidirectional local interconnects |
| US20110317477A1 (en) * | 2010-06-25 | 2011-12-29 | Taiwan Semiconductor Manufacturing Company, Ltd. | Cell structure for dual-port sram |
Non-Patent Citations (2)
| Title |
|---|
| KAWASAKI H ET AL: "Challenges and solutions of FinFET integration in an SRAM cell and a logic circuit for 22 nm node and beyond", ELECTRON DEVICES MEETING (IEDM), 2009 IEEE INTERNATIONAL, IEEE, PISCATAWAY, NJ, USA, 7 December 2009 (2009-12-07), pages 1 - 4, XP031644548, ISBN: 978-1-4244-5639-0 * |
| See also references of WO2013106799A1 * |
Also Published As
| Publication number | Publication date |
|---|---|
| AU2020201521A1 (en) | 2020-03-19 |
| SG11201404024YA (en) | 2014-08-28 |
| JP6467476B2 (en) | 2019-02-13 |
| JP2015506589A (en) | 2015-03-02 |
| AU2016202229A1 (en) | 2016-05-05 |
| TWI608593B (en) | 2017-12-11 |
| AU2016202229B2 (en) | 2018-02-15 |
| CN104303263A (en) | 2015-01-21 |
| AU2013207719B2 (en) | 2016-02-25 |
| TW201349451A (en) | 2013-12-01 |
| CN104303263B (en) | 2016-12-14 |
| TW201717355A (en) | 2017-05-16 |
| TW201642440A (en) | 2016-12-01 |
| EP2803077A1 (en) | 2014-11-19 |
| AU2018200549B2 (en) | 2019-12-05 |
| KR20140114424A (en) | 2014-09-26 |
| WO2013106799A1 (en) | 2013-07-18 |
| CN107424999A (en) | 2017-12-01 |
| SG10201605564WA (en) | 2016-09-29 |
| TW201803084A (en) | 2018-01-16 |
| JP2017224858A (en) | 2017-12-21 |
| TWI581403B (en) | 2017-05-01 |
| AU2018200549A1 (en) | 2018-02-15 |
| JP2019054297A (en) | 2019-04-04 |
| KR101913457B1 (en) | 2018-10-30 |
| AU2013207719A1 (en) | 2014-07-31 |
| TWI552307B (en) | 2016-10-01 |
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