DE102007002156A1 - Semiconductor arrangement, comprises heat sink body, which is provided for dissipating heat from semiconductor component, where heat sink has electric conductive body with recess for receiving semiconductor component - Google Patents

Abstract

The The invention relates to a semiconductor device with a heat sink for dissipating heat from a semiconductor device (1), wherein the heat sink is an electrically conductive Body (23) having a recess (3) for receiving the Semiconductor device (1).

Description

The The present invention relates to a semiconductor device with heat sink and in particular to a power semiconductor device with improved heat dissipation.

In Semiconductor technology and in particular in the power semiconductor technology are becoming increasingly thinner semiconductor devices or chips produced with layer thicknesses less than 200 microns. Further There is an increasing need for both sides processed semiconductor devices to realize the realization of semiconductor devices that are extend through the entire device substrate.

The Heat dissipation of such ever thinner Semiconductor devices are increasingly coming to the fore here of development activities. On the one hand, this one must Thermal conductivity of the semiconductor device to a Heat sink or improved to a heat sink become. On the other hand, due to a thermal Stress arising mechanical stresses between semiconductor device and heat sink are minimized, for example, a to avoid unwanted delamination. Furthermore, it applies the simplify last processing steps, especially at very thin semiconductor devices or semiconductor wafers in front of Separating and soldering the blocks to the heat sink or the heat sink-containing substrates such as for example, lead frames. Furthermore, the electrical connection options of such a semiconductor device be improved for mounting on a circuit board.

1 shows a simplified sectional view of a conventional semiconductor device, as for example from the EP 0 488 783 A2 is known. According to 1 is a semiconductor device 1 on a carrier plate 30 a lead wire frame soldered, wherein the semiconductor device 1 over bonding wires 40 with connecting wires 50 connected is. A heat sink WS in the form of a heat sink is in this case via an electrically insulating but heat-conductive compound layer 60 at the front of the semiconductor device 1 attached, thereby removing heat from the semiconductor device 1 can be realized. The thus connected to the heat sink WS semiconductor device 1 is also in a housing 70 housed, with only the outer sections of the leads 50 and a cooling surface or cooling ribs (shown in dashed lines) of the heat sink WS protrude outward.

Especially for both sides processed semiconductor devices is a such semiconductor device insufficient. It is also strong thermal stress to observe increased delamination and sometimes only insufficient heat dissipation can be realized become.

Further is a processing of very thin wafers because of them Bending due to thermally stressing layers strong difficult. For this reason, the thickness of front side metallizations and passivations limits, otherwise the wafer bending can escalate to a cylindrical curl. Further, at ever-increasing current densities especially for Power semiconductor devices more and more bonding wires necessary being an application to the so-called flip-chip technology in particular due to the two-sided connections on the semiconductor device are not possible.

It There is therefore a need for a semiconductor device Heat sink to create what improved properties with regard to heat dissipation, delamination and a processability of very thin semiconductor device substrates allows.

According to the invention a semiconductor device with heat sink for discharging created by heat from a semiconductor device, wherein the heat sink an electrically conductive body having a recess for receiving the semiconductor device.

following Be embodiments of the invention with reference described in detail on the drawing.

It demonstrate:

1 a simplified sectional view of a conventional semiconductor device with heat sink;

2 a simplified sectional view of a heat sink output body with associated semiconductor devices;

3 a simplified sectional view of a semiconductor device with heat sink according to a first embodiment;

4 a simplified sectional view of a semiconductor device with a heat sink according to a second embodiment; and

5 a simplified sectional view of a semiconductor device with a heat sink according to a third embodiment.

According to the present invention, the heat sink may consist of an electrically conductive body having a recess for receiving the Semiconductor devices has. In particular, when processing very thin semiconductor devices, a passivation is possible only after the introduction into the heat sink body, resulting in improved Wärmeleitfähigkeiten. Furthermore, this enables the realization of flip-chip components.

The Shape of the recess is, for example, to the shape of the semiconductor device adjusted, resulting in a further improved heat dissipation and gives a further reduced delamination.

For example can be at least between the side walls of the recess and the sidewalls of the semiconductor device a first Insulating be formed, resulting in a more extensive mechanical stabilization and often necessary sidewall passivation of semiconductor devices can be effectively realized. Farther This is a delamination even at very high thermal stresses greatly reduced.

For example may be a front of the semiconductor device around a height from 20 to 100 microns across a front of the heat sink body protrude, resulting in particular in a galvanic training of terminal solder bales or terminal boxes a suitable Height compensation between the solder balls or fields on the semiconductor device and the corresponding solder balls and fields on the heat sink body.

For example The heat sink body consists of Cu or out a composite with carbon particles and Cu, whereby one a good adaptation to the thermal expansion coefficient of the semiconductor substrate, in particular in the case of silicon substrates.

For example can be a connecting solder ball on a front of the Semiconductor devices and at least one additional connection pads on a front side of the heat sink body be educated. There is neither the need for use a wire bonding still a molding compound to realize a Housing, which significantly reduces costs to let. Furthermore, it is also possible for semiconductor components realized with very small dimensions flip chip-compatible components become.

For example the first insulating layer may further at least on a portion the front of the heat sink body, on top a device connection layer for connecting the semiconductor device and then another connecting soldering ball or another Connection field on the front of the heat sink body be formed next to the recess, which is not only a simple Front and back contact, but above it In addition, more complex contacting possibilities of the semiconductor device can be effectively solved.

in the Below, embodiments of the invention are based on represented by figures, which serve only for illustration and not limit the scope of the invention.

2 shows a simplified sectional view illustrating an output heat sink body 2 for receiving respective semiconductor devices 1 a variety of recesses 3 at its front. For example, the heat sink body 2 have the shape of a wafer with approximately the same dimensions as an associated semiconductor wafer from which the semiconductor components 1 to be isolated.

For example, the heat sink body 2 consist of a composite of carbon particles and Cu. Such a composite material may, for. Example, be sintered from copper-carbon fibers at about 1000 degrees Celsius and a few tens of atmospheric pressure as a wafer. At its front here are beads or recesses 3 designed to accommodate the semiconductor devices 1 are suitable. Furthermore, (not shown) may be formed on its back, also by the negative shape of the pressing tool, cooling fins. Basically, the heat sink body can 2 even just a metal such. B. Cu have.

According to 2 can then the isolated semiconductor devices 1 in the recesses 3 be soldered. Here, as a solder deposit at least in the bottom area of the recess 3 Solder plates made of gold / tin can be used.

Furthermore, not only excellent electrical conductivity and thermal conductivity can be realized, but also because of the recess a very stable mechanical connection to a (not shown) passivation of photoimide be created, which is thus insensitive to delamination due to thermal stress. When using silicon for the substrate of semiconductor devices 1 and the composite of carbon particles and Cu also has the advantage that the thermal expansion coefficient of heat sink body 2 and semiconductor device 1 optimally adapted, ie very similar, and thereby a mechanical stress, in particular the solder layer is further reduced. Further, a respective solder pad (not shown) may be substantially thinner than conventional semiconductor devices for mounting corresponding heat sinks ken, which is why a thermal conductivity greatly improved.

According to 2 can after the introduction of the semiconductor devices 1 in the recesses 3 the heat sink body 2 First, a first insulating layer at least between the side walls of the recess 3 and the sidewalls of the semiconductor device 1 be formed. For example, have the semiconductor devices 1 At this time only thin insulation and metallization layers, which is why a bending is reduced even with ultrathin semiconductor devices.

In order to are already given the prerequisites, self-aligning galvanic Create connecting solder bales or connection fields without resorting to seed layers and photolithography to have to.

As an alternative to the above-described sintered heat sink body or wafer, it can also be produced galvanically. In this case, for example, the already isolated or still unparalleled semiconductor devices 1 Positioned on a support substrate and applied thereto a plurality of electrically conductive material particles such as carbon fibers. In the same way, it is of course also possible to apply electrically conductive grains or balls to the carrier substrate with the semiconductor components lying thereon. The entire assembly is then placed in a plating bath and galvanizing performed. For example, the plating bath has copper ions Cu ⁺ , thereby forming a copper layer on the surface of the material particles or carbon fibers for bonding the plurality of fibers, and on the surface of the support substrate and the semiconductor devices, a galvanically generated heat sink body 2 with sufficient thickness (> 100 microns) is formed.

Ultimately, this also creates the same heat sink body 2 as he in 2 is shown, but wherein the semiconductor devices 1 need not be soldered, but already electrically conductive due to the performed galvanization with the body 2 connected and completely in the recesses 3 are embedded.

While at the sintered heat sink body 2 the shape of the recesses 3 by a suitable pressing tool, for example, to the shape of the semiconductor devices 1 can be adapted (eg rectangular), this adjustment results automatically in the galvanic production of the heat sink body.

3 shows a simplified sectional view of a semiconductor device with heat sink according to a first embodiment.

According to 3 can the semiconductor device 1 include a power semiconductor device, which requires increased heat dissipation. The semiconductor device 1 can therefore be an n-doped monocrystalline Si substrate 4 in which a so-called p-body or a p-doped region 5 for the realization of the illustrated pn diode D is formed on the front side. Furthermore, at the front of the semiconductor device 1 or on the surface of the p-doped region 5 thick field oxide layers 6 and a thin gate dielectric 7 be formed, which consist for example of SiO ₂ .

Furthermore, to realize a source contact, a thin metallization layer 8A directly on the surface of the semiconductor substrate or the p-region 5 and as a gate a control layer 8B on the surface of the gate oxide or gate dielectric 7 be formed.

As already described above, such a very thin semiconductor device 1 in the bead or recess 3 are deposited and over the solder layer 9 with the heat sink body 2 be connected electrically, mechanically and thermally conductive. The solder layer 9 For example, it can be galvanically applied to the composite heat sink body 2 be applied, in which case they would have to be drawn over the entire surface.

In the same way, however, can also very thin Lötplättchen for the realization of the illustrated solder layer 9 only in the recesses 3 the heat sink body 2 be filed. The solder depot consists z. B. gold / tin, whereby a possible proton annealing at 400 degrees Celsius is possible. Basically, so-called diffusion soldering for attaching the isolated semiconductor devices 1 in the recesses 3 the heat sink body 2 possible.

For example, a front side of the semiconductor device 1 or its level by a height H of 20 to 100 microns on a front side of the heat sink body 2 protrude, creating a leveling when growing terminal solder balls 11 . 12 can be automatically compensated by galvanization.

Subsequently, with conventional wafer equipment, a first insulating layer or passivation 10 at least between the side walls of the recess 3 and the sidewalls of the semiconductor device 1 be formed. This first insulating layer 10 represents a passivation layer and consists for example of photoimide. Although the first insulating layer or the photoimide 10 at For example, can be formed over the entire surface, it can also only in the edge regions of the semiconductor device 1 and the recess 3 be introduced between the respective side walls, wherein it is formed T-shaped with respect to its cross section.

In this way one not only obtains excellent sidewall passivation for the semiconductor device 1 but also an improved mechanical attachment of the passivation within the recess 3 , Before that, the metallization layer can still be used for the source connection region 8A and for the gate 8B be structured. After a suitable structuring of the insulating layer 10 can now, for example, by a self-aligned electroplating both at the source terminal region 8A of the semiconductor device 1 and at exposed areas of the heat sink body adjacent the recess 3 the connecting solder balls 11 and 12 be formed. The first insulating layer 10 serves as Galvanisierungsmaske and thus allows the self-aligned growth of the source terminal solder balls 11 above the semiconductor module and the drain connection solder bale 12 over the heat sink body.

With regard to a gate terminal solder bump not shown above the control layer 8B or the gate dielectric 7 It should be noted that by suitable guidance of this control layer to an electrical connection point (eg in an edge region of the semiconductor component), a corresponding gate connection solder bale can also be galvanically formed, but subsequently the corresponding electrical connection point has to be removed again. In this way, connection solder bales required for flip-chip mounting can be produced very simply without the use of seed layers or lithography, it also being possible to connect structural components structured on both sides very simply.

A commonly observed (due to the pn diode D) uneven growth rate for the source terminal solder balls 11 and the drain connection solder balls 12 can in addition to the above-described height adjustment between the front of the semiconductor device 1 and front of the heat sink body 2 be compensated by a suitable pulse electroplating.

Although in 3 at the back of the heat sink body 2 no cooling fins are shown, of course, such cooling structures may be formed in particular the back.

Before the semiconductor devices 1 with their z. B. power semiconductor devices together with the heat sink body 2 and the solder balls 11 and 12 separated with a suitable wafer saw and mounted by means of flip-chip technology on a (not shown) PCB, can still be performed at the wafer level, a re-test for this arrangement.

at the alternative embodiment, not shown, in which the Semiconductor wafer for the production of power semiconductor devices already before or after thinning with separating trenches is equipped and on the wafer with the dividers then a composite filling electroplating with, for example Copper and carbon particles can be applied directly the spaces between the semiconductor devices and the heat sink composite galvanically, with suitable Metals such as nickel and copper subsequently be filled. This alternative variant results the advantage that throughout the production process at no time a thinned and thus vulnerable to breakage Wafer is present.

On in this way, one obtains a semiconductor device having a greatly improved heat dissipation to a heat sink body having. Furthermore, there is also the possibility of both sides process processed semiconductor devices using flip-chip technology, Furthermore, the risk of delamination greatly reduced and the mechanical properties are greatly improved. The processing of ultra-thin semiconductor devices is going this way economically possible.

4 shows a simplified sectional view of a semiconductor device with a heat sink according to a second embodiment, wherein like reference numerals designate like or corresponding elements as in 3 , which is why a repeated description is omitted below.

According to 4 For example, the semiconductor device can be used not only for flip-chip mounting but also in a usual lead frame, as it is known in, for example, US Pat 1 is shown. According to 4 This will turn a semiconductor device 1 with, for example, a power semiconductor component in a recess 3 a heat sink body 2 Soldered, but this time on the surface of the entire heat sink body a solder layer 9 can be formed from Au / Sn. This soldering process is carried out for example by means of diffusion soldering. Again, the semiconductor device 1 a first metallization layer for realizing a source connection layer 8A and a tax layer 8B on, with already insulation layers 6 and 7 to realize a field oxide and a gate dielectric on the front side of the semiconductor device 1 are formed. Again arise As a result, even with very thin semiconductor devices only low bending forces, which allows a relatively simple processing of ultra-thin semiconductor devices.

The heat sink body 2 In turn, for example, may consist of a carbon-copper composite material, but in principle, completely made of copper existing body can be used. Subsequently, in turn, a first insulating layer 10 , which consists for example of photoimide, spin-coated, whereby also between the side walls of the semiconductor device 1 and the side walls of the recess 3 a sufficient passivation is formed.

According to 4 are the side walls of the recess 3 for example beveled, whereby accidental edge breakage can be reliably avoided. A height difference H between the front of the semiconductor device 1 and with the solder layer 9 coated heat sink body 2 in turn may be between 20 to 100 microns, to compensate for a subsequent height difference of the finished semiconductor device with solder pads SP and DP.

According to 4 Now, a further structuring of the first insulating layer 10 for exposing at least the source terminal layer 8A be carried out, wherein a subsequently formed module connection layer 15 over z. B. the source terminal layer 8A and further over the first insulating layer 10 is formed so that it the source contact next to the recess 3 at the front of the heat sink body 2 out leads. Finally, a second insulating layer 16 which, for example, in turn consists of photoimide, as a galvanization mask on the surface of the component connection layer 15 , the first insulating layer 10 and the solder layer 9 or in the absence of this layer, directly on the heat sink body 2 be formed such that in a final manufacturing step, a source pad SP and a drain pad DP can be formed self-aligning as solder pads pads.

By leading semiconductor device contacts, such as the source contact, to a larger and thus bondable surface next to the semiconductor device 1 or the recess 3 , result in semiconductor devices, which now also, as in 1 is shown, can be installed in a conventional manner in lead frame.

After sawing or separating the heat sink body 2 can the heat sink body according to 4 on a carrier plate 30 the lead wire frame by means of another solder layer 14 For example, be diffusion soldered. Further, the solder pad pads SP and DP may be formed by, for example, copper bonding wires 40 connected to (not shown) connecting wires in the usual way. The copper bonding wires 40 Due to the relaxed geometry of the solder connection pads and connection solder pads SP and DP, they can have a diameter of up to 350 μm, which allows extremely high current densities to be transported. Again, one obtains a sufficient for power semiconductor devices in particular heat dissipation, low Delaminationsneigung and mechanical strength, especially for ultra-thin semiconductor devices at sufficiently high current densities.

5 shows a simplified sectional view of a semiconductor device with heat sink according to a third embodiment, wherein like reference numerals the same or corresponding elements as in 3 and 4 denote, which is why a repeated description is omitted below.

According to 5 are at the back of the heat sink body cooling fins 2A for delivering the semiconductor device 1 absorbed heat to an environment (eg., Air, gas or liquid) shown. The heat sink body 2 with its cooling fins 2A In this case, it can again be produced as a sintered or galvanically produced composite material or from a single electrically conductive material, such as copper.

In contrast to 4 is the semiconductor device according to 5 again designed as a flip-chip module suitable, for example, when realizing a power semiconductor device with a source, drain, and gate in the semiconductor device 1 , a source connection solder ball 11 , a drain connection solder ball 12 and a gate terminal solder ball 13 at the front of the heat sink body 2 or of the semiconductor component 1 can be trained.

More specifically, similarly to the above-mentioned embodiments, after soldering the semiconductor device 1 inside the recess 3 the heat sink body 2 an insulating layer 10 from, for example, photoimide at least between the side walls of the recess 3 and the semiconductor device 1 be formed.

According to 5 is the solder layer 9 only in the bottom area of the recess 3 , However, it can equally well on the entire front surface of the heat sink body 2 be educated. The insulating layer 10 is also so out formed, that they at least a part of the upper surface of the heat sink body 2 for the drain connection solder bale 12 while leaving another section at the front of the heat sink body 2 next to the recess 3 for the realization of a gate connection solder bumper 13 completely covered.

Further, a first metallization layer serving on the surface of the first insulating layer 10 , the surface of the heat sink body 2 and the surface of the semiconductor device 1 is formed, after a corresponding structuring as the respective first component connection layer 17A for connecting the source terminal solder bale 11 , as a second building block connection layer 17B for connecting the drain terminal solder bale 12 and as a third device connection layer 17C for connecting the gate terminal solder bale. This metallization layer can in turn be at the wafer level of the heat sink body 2 be formed and by a second insulating layer 18 , which in turn may consist of photoimide, be structured in a simple way photolithographically.

Due to a suitable structuring of the first insulating layer 10 For example, the first metallization layer may have a contact portion 17D having an electrically conductive contact with the heat sink body 2 in the sawing area SB (shown in dashed lines). Due to this electrical contact can then by means of the above-described z. B. galvanic process the solder balls 11 to 13 be made self-adjusting. At the final separation of the heat sink body 2 in the sawing area SB (shown in dashed lines), this contact section 17D be removed again, creating a short circuit for the gate terminal solder balls 13 can be reliably prevented. For safety's sake, the corresponding metallization layer can also be removed lithographically or with a laser in an edge region RB, as in FIG 5 is shown.

In this way, in turn, one obtains a semiconductor device with a heat sink, which provides a directly usable for a flip-chip technology module without additional wire bonding or an additional molding compound for a housing. This module with the solder balls 11 to 13 can then on a circuit board 19 with trained thereon interconnects 20 be soldered. The interconnects 20 can hereby z. B. be printed with thick-film silver paste. Thus, one obtains a flip-chip-capable semiconductor device which can be produced without the use of plastic molding compound and, moreover, has improved delamination properties and thermal conductivities.

According to 5 may be the composition of the composite material for the heat sink body 2 , ie the proportion of carbon particles, not only to the semiconductor device 1 but also to the circuit board 19 adapted to optimally match the thermal expansion coefficients of the different materials. Thermal stress is thereby further reduced.

For example, according to 3 or 5 the connecting solder balls 11 . 12 or 13 a diameter d that is less than 100 microns.

The invention has been described above on the basis of a power semiconductor component with galvanically formed solder bumps or pads. However, it is not limited to this and in the same way also includes alternative semiconductor components with alternatively implemented solder bumps or pads. Furthermore, the invention has been described in that the soldering of the semiconductor components as well as the galvanic forming of the solder pads and the production of a final passivation on wafer level is performed. However, the invention is not limited thereto and can in the same way even for already isolated semiconductor construction stones on already isolated heat sink bodies 2 or for respective groups of semiconductor devices and heat sink bodies 2 be applied. Furthermore, as an alternative to the silicon semiconductor materials used and the photoimide, alternative materials may also be used as the first insulating layer.

1

Semiconductor device

2

Heat sink body

3

recess

4

n-substrate

5

p-body

6

Field insulating layer

7

gate dielectric

8A

Source terminal layer

8B

Gate layer

9

solder layer

10

first insulating

11

Source Connection Lötballen

12

Drain-Lötballen

13

Gate-Lötballen

14

Further solder layer

15 17A, 17B, 17C

Block connection layers

16 18

second insulating

17D

contact layer

19

circuit board

20

meridians

30

support plate

40

Bond wires

50

leads

60

insulating link layer

70

casing

WS

heat sink

SP

Source pad

DP

Drain pad

SB

cutting area

RB

border area

D

diode

QUOTES INCLUDE IN THE DESCRIPTION

This list The documents listed by the applicant have been automated generated and is solely for better information recorded by the reader. The list is not part of the German Patent or utility model application. The DPMA takes over no liability for any errors or omissions.

Cited patent literature

• EP 0488783 A2 [0004]

Claims (22)

Heat sink semiconductor device for dissipating heat from a semiconductor device ( 1 ), characterized in that the heat sink is an electrically conductive body ( 2 ) with a recess ( 3 ) for receiving the semiconductor device ( 1 ) having. Semiconductor arrangement according to Patent Claim 1, characterized in that the shape of the recess ( 3 ) to the shape of the semiconductor device ( 1 ) is adjusted. Semiconductor arrangement according to claim 1 or 2, characterized in that at least between the side walls of the recess and the side walls of the semiconductor device ( 1 ) a first insulating layer ( 10 ) is trained. Semiconductor arrangement according to one of the claims 1 to 3, characterized in that a solder layer ( 9 ) at least in the bottom region of the recess ( 3 ) for electrically and mechanically connecting a back side of the semiconductor device ( 1 ) with the heat sink body ( 2 ) is trained. Semiconductor arrangement according to one of the claims 1 to 4, characterized in that a front side of the semiconductor device ( 1 ) by a height (H) of 20 to 100 microns over a front side of the heat sink body ( 2 protrudes). Semiconductor arrangement according to one of the claims 1 to 5, characterized in that the heat sink body ( 2 ) has Cu with respect to its material. Semiconductor arrangement according to one of the claims 1 to 6, characterized in that the heat sink body ( 2 ) has a composite of carbon particles and Cu with respect to its material. Semiconductor arrangement according to one of the claims 1 to 7, characterized in that the heat sink body ( 2 ) in terms of its shape cooling fins ( 2A ) for discharging the absorbed heat to an environment. Semiconductor arrangement according to one of the claims 1 to 8, characterized in that a terminal solder bale ( 11 ) on a front side of the semiconductor device ( 1 ) and at least one additional soldering pad ( 12 ) on a front side of the heat sink body ( 2 ) is trained. Semiconductor arrangement according to claim 3 with 9, characterized in that the first insulating layer ( 10 ) at least on a portion of the front of the heat sink body ( 2 ) is trained; a block connection layer ( 17C ) for connecting the semiconductor device ( 1 ) on the first insulating layer ( 10 ) is trained; and another connecting soldering ball ( 13 ) next to the recess ( 3 ) on the block connection layer ( 17C ) at the front of the heat sink body ( 2 ) is trained. Semiconductor arrangement according to claim 9 or 10, characterized in that the terminal solder bales ( 11 . 12 . 13 ) have a diameter (d) less than 100 microns. Semiconductor arrangement according to one of the claims 4 to 8, characterized in that the first insulating layer ( 10 ) at least on a portion of the front of the heat sink body ( 2 ) is trained; a building block connection layer ( 15 ) for connecting the semiconductor device ( 1 ) on the first insulating layer ( 10 ) is trained; a connection field (SP) next to the recess ( 3 ) on the block connection layer ( 15 ) at the front of the heat sink body ( 2 ) is trained; and another connection field (DP) next to the recess ( 3 ) on the solder layer ( 9 ) at the front of the heat sink body ( 2 ) is trained. Semiconductor arrangement according to Patent Claim 12, characterized in that the heat sink body ( 2 ) on a carrier plate ( 30 ) is arranged a lead wire frame; and on the connection fields (SP, DP) bonding wires ( 40 ) are attached, which the semiconductor device ( 1 ) with connecting wires. Semiconductor arrangement according to one of the claims 1 to 13, characterized in that the semiconductor component ( 1 ) represents a power semiconductor device with back contact. Semiconductor arrangement with a heat sink for dissipating heat from a semiconductor device ( 1 ), characterized in that the heat sink (WS) an electrically conductive body ( 2 ) with a recess ( 3 ) for receiving the semiconductor device ( 1 ) having; a solder layer ( 9 ) in the bottom area of the recess ( 3 ) is trained; between the side walls and the edges of the recess ( 3 ) and the semiconductor substrate ( 1 ) a first insulating layer ( 10 ) in terms of their cross is cut T-shaped; at the front of the semiconductor device ( 1 ) a first terminal solder bale ( 11 ); and at the front of the heat sink body ( 2 ) next to the recess ( 3 ) at least a second terminal solder ball ( 12 ) is trained. Semiconductor arrangement with a heat sink for dissipating heat from a semiconductor device ( 1 ), characterized in that the heat sink (WS) an electrically conductive body ( 2 ) with a recess ( 3 ) for receiving the semiconductor substrate ( 1 ) having; a solder layer ( 9 ) at the front of the heat sink body ( 2 ) is trained; between the side walls of the coated recess ( 3 ) and the semiconductor device ( 1 ) and at least on a portion of the front of the coated heat sink body ( 2 ) a first insulating layer ( 10 ) is trained; at least on a section of the first insulating layer ( 10 ) a block connection layer ( 15 ) is trained; on the block connection layer ( 15 ) next to the recess ( 3 ) a first connection field (SP) is formed; and on an exposed portion of the solder layer ( 9 ) next to the recess ( 3 ) at least a second connection field (DP) is formed. Semiconductor arrangement with a heat sink for dissipating heat from a semiconductor device ( 1 ), characterized in that the heat sink (WS) an electrically conductive body ( 2 ) with a recess ( 3 ) for receiving the semiconductor device ( 1 ) having; a solder layer ( 9 ) at least in the bonding region of the recess ( 3 ) is trained; between the side walls of the coated recess ( 3 ) and the semiconductor device ( 1 ) and at least on a portion of the front of the heat sink body ( 2 ) a first insulating layer ( 10 ) is trained; on an exposed front side of the semiconductor device ( 1 ) and the heat sink body ( 2 ) and at least on a partial section of the first insulating layer ( 10 ) a first, second and third building block connection layer ( 17A . 17B . 17C ) is trained; and on the first, second and third building block connection layer ( 17A . 17B . 17C ) a first, second and third terminal solder bales ( 11 . 12 . 13 ) is trained. Semiconductor arrangement according to one of the claims 15 to 17, characterized in that the shape of the recess ( 3 ) to the shape of the semiconductor device ( 1 ) is adjusted. Semiconductor arrangement according to one of the claims 15 or 17, characterized in that a front side of the semiconductor device ( 1 ) by a height (H) of 20 to 100 microns over a front side of the heat sink body ( 2 protrudes). Semiconductor arrangement according to one of the claims 15 to 17, characterized in that the heat sink body ( 2 ) has Cu with respect to its material. Semiconductor arrangement according to one of the claims 15 to 17, characterized in that the heat sink body ( 2 ) has a composite of carbon particles and Cu with respect to its material. Semiconductor arrangement according to one of the claims 15 to 17, characterized in that the heat sink body ( 2 ) in terms of its shape cooling fins ( 2A ) for discharging the absorbed heat to an environment.