CN2631038Y - Integrated Circuit Package Assembly in Bare Die Form - Google Patents

Abstract

A bare die type integrated circuit package assembly. The utility model provides an integrated circuit package assembly with good surface bonding alignment effect, vertical high-density stacking and thin thickness, which comprises a chip, a metal lead frame and an insulating package colloid; the wafer is provided with a front surface and a corresponding back surface, wherein a plurality of electrode ends are formed on the front surface; the metal lead frame comprises a plurality of bent pins, and each bent pin forms an extension end; the insulating packaging colloid is combined with the chip and the bent pin; the packaging colloid is provided with a first surface and a second surface; the back surface of the chip is exposed on one of the first and second surfaces of the encapsulant to be in a bare die shape; the periphery of one of the first and second surfaces of the packaging colloid forms a plurality of spacing gap slots for accommodating and limiting the extending end of the bent pin.

Description

Integrated Circuit Package Assembly in Bare Die Form

technical field

The utility model belongs to an integrated circuit packaging assembly, in particular to an integrated circuit packaging assembly in the form of a bare crystal.

Background technique

In traditional integrated circuit packaging components, it is common to use lead frames as the electrical connection medium for chips in package components. The use of lead frames to complete integrated circuit packaging components should meet the requirements of unidirectional surface bonding. In the state or condition of increasing the bonding area on the surface of the external printed circuit board, it is necessary to be able to vertically stack the bonding (stack mounting) in a specific occasion.

As shown in FIG. 1 , a conventional integrated circuit package assembly 1 that uses a lead frame as a conductive medium and can be vertically stacked and combined includes a chip 10 with a front surface 11 forming an electrode terminal 12 and a plurality of pins forming an internal terminal 21. 20 lead frame, several metal bonding wires 40 and encapsulation compound 30 .

The inner terminal 21 of the lead frame pin 20 is glued to the front surface 11 of the chip 10; the metal bonding wire 40 is electrically connected to the electrode terminal 12 of the chip 10 and the inner terminal 21 of the lead frame pin 20, and is pressed Molding forms the encapsulant 30 to seal the internal terminal 21 of the chip 10 and the lead frame pin 20, and makes the internal terminal 21 of the pin 20 exposed to the first surface 31 of the encapsulant 30 as a first surface contact The exposed surface 23 of the point, the extension end 22 of the pin 20 is extended from the side of the first surface 31 of the encapsulant 30 and bent into a J-shaped foot, and the extension end 22 is formed on the second surface 32 of the encapsulant 30, so as to as the second point of contact with the surface. Therefore, several IC package assemblies 1 can be stacked vertically. However, the extension ends 22 of several pins 20 of the lead frame are protruding in the air from the encapsulant 30 , after forming, any collision may make the extension ends 22 of the pins 20 skewed, resulting in poor surface bonding, so the pins 20 The thickness should be thick enough to reduce the degree of skewing. In this way, the thickness of the integrated circuit package assembly 1 is relatively large, which is not suitable for high-density stacking.

Another conventional integrated circuit packaging component, such as US Patent No. 5,894,108, discloses a design in which the back of the chip is exposed to reduce the thickness of the overall package component. The chip is exposed outside the packaging compound, but the stability of the pins The pins are not as stable as the aforementioned traditional structures, are easy to fall off, and can only be used for one-way surface bonding, which cannot be stacked and used, and the application field is limited.

Contents of the invention

The purpose of the utility model is to provide an integrated circuit packaging assembly in the shape of bare crystal with good surface bonding alignment effect, vertically high-density stacking, and thin thickness.

The utility model includes a chip, a metal lead frame and an insulating encapsulation colloid; the chip has a front surface and a corresponding back surface forming several electrode terminals; the metal lead frame includes several bent legs, each of which forms an extension end; the insulating encapsulation colloid is combined with the chip and bent feet; the encapsulation compound has a first surface and a second surface; the back of the chip is exposed on one of the first and second surfaces of the encapsulation compound and is in the form of a bare crystal; the encapsulation compound is one of the first and second surfaces A plurality of position-limiting notch slots are formed around the surface to accommodate and limit the extension ends of the curved legs.

in:

The thickness of the encapsulant from the first surface to the second surface is not greater than 0.6 cm.

The thickness of the encapsulant from the first surface to the second surface is not greater than 0.4cm.

The depth of the limiting notch groove is not greater than the thickness of the extension end of the corresponding bent leg.

The limiting notch groove is in the shape of an opening with an obliquely enlarged side wall.

Each bent leg has an inner end corresponding to the extension end, and the inner end has an exposed surface exposed on the first surface of the encapsulant.

The inner connection end of the bent pin has an end portion for electrical conduction with the electrode end of the chip; the end portion is formed on a plane different from the exposed surface of the inner connection end, and is completely covered by encapsulation glue.

The end of the inner terminal of the bent leg is attached to the built-in patch.

The end of the inner terminal of the bent leg is connected with the electrode terminal of the chip by several metal welding wires.

The electrode end of the chip is provided with a conductive bump to electrically connect the electrode end of the chip and the bent pin.

Because the utility model includes a chip, a metal lead frame and an insulating packaging colloid; the chip has a front surface and a corresponding back surface forming several electrode terminals; the metal lead frame includes several bent legs, each of which forms an extension; the insulating packaging colloid combines Chip and bent pin; the encapsulation compound has a first surface and a second surface; the back side of the chip is exposed on one of the first and second surfaces of the encapsulation compound and is in the form of a bare crystal; one of the first and second surfaces of the encapsulation compound A plurality of position-limiting notch grooves are formed around the surface of the surface to accommodate and limit the extension ends of the bent legs. With the exposure of the back of the chip and the limiting notch of the encapsulant, the extension end of the bent leg can be accommodated and limited to the limit notch of the encapsulant, which can be vertically stacked and the overall shape is ultra-thin, at the same height High-density vertical stacking of more bare-chip integrated circuit package components is possible; not only the surface bonding and alignment effect is good, but also vertical high-density stacking and thin thickness are possible, thereby achieving the purpose of the utility model.

Description of drawings

FIG. 1 is a schematic cross-sectional view of the structure of a conventional integrated circuit package assembly.

Fig. 2 is a schematic cross-sectional view of the structure of Embodiment 1 of the present utility model.

Fig. 3 is a schematic top view of the first embodiment of the utility model.

Fig. 4 is a schematic bottom view of the first embodiment of the utility model.

Fig. 5 is a partially enlarged view of part A in Fig. 2 (showing the notch groove).

Fig. 6 is a schematic diagram of several embodiments of the present utility model-stacking and jointing use state.

Fig. 7 is a schematic diagram of the encapsulation process of Embodiment 1 of the present utility model.

Fig. 8 is a schematic cross-sectional view of the second embodiment of the utility model.

Detailed ways

As shown in FIG. 2 , FIG. 3 , and FIG. 4 , the integrated circuit packaging assembly 100 in the form of a bare die of the present invention includes a chip 110 , a metal lead frame and an insulating packaging compound 130 .

The chip 110 is selected from microprocessors, microcontrollers, various memories, application-specific integrated circuits, or image processing chips. The chip 110 has a front side 111 forming an integrated circuit layout and a corresponding back side 113 . The front surface 111 of the chip 110 forms a plurality of electrodes 112 , such as flat pads or bumps, and the electrodes 112 of the chip 110 are electrically connected to the lead frame.

The lead frame is a metal with proper ductility such as copper, iron or alloy, and it includes several bent legs 120. The bent legs 120 are U-shaped, and each bent leg 120 is divided into an internal terminal 121 located inside and outside the encapsulating body 130. and the extension end 122 , the inner connection end 121 has an exposed surface 123 exposed on the first surface 131 of the encapsulant 130 , and the inner connection end 121 is electrically connected to the electrode end 112 of the chip 110 through its end 124 . As shown in Fig. 2 and Fig. 3, it is preferable to use several metal bonding wires 140 such as gold wires or aluminum wires to connect between the end 124 of the inner connection end 121 of the bent leg 120 and the electrode end 112 of the chip 110, and the end portion 124 is formed on a different plane from the exposed surface 123 of the inner terminal 121, so that the end 124 can be completely covered by the encapsulant 130 and has better stability. The exposed surface 123 of the inner terminal 121 is exposed to the encapsulant. The first surface 131 of 130 is available for bonding to the first surface; as shown in FIG. 2 and FIG. The periphery of the two surfaces 132 is used for bonding the second facing surface.

The encapsulant 130 is formed by thermosetting insulating resin by molding technology, and the encapsulant 130 has a first surface 131 and a second surface 132 . As shown in FIGS. 2 and 3 , the back surface 113 of the chip 110 is exposed on the first surface 131 of the encapsulant 130 and is in the form of a bare die. The exposed surface 123 of the inner terminal 121 of the bent leg 120 is formed around the first surface 131 of the encapsulant 130 , and the extension end 122 of the bent leg 120 is bent to the periphery of the second surface 132 of the encapsulant 130 .

As shown in FIGS. 5 and 7 , several limiting notch grooves 133 are formed around the second surface 132 of the encapsulant 130 during molding. To achieve the effect that the bent pin 120 can accurately align the surface bonding, and to achieve the application of vertical high-density stacking. Therefore, the structural strength required for the bent pin 120 can be reduced, so that the thickness of the lead frame can be reduced to about 0.127cm. While the thickness of the conventional J-shaped leg is required to be 0.2 cm, the depth of the limiting notch 133 is preferably not greater than the thickness of the extension end 120 of the corresponding curved leg 120 . As shown in FIG. 5 , the limiting notch groove 133 is in the shape of an opening with an oblique enlarged side wall, so as to facilitate the alignment of the extended end 122 of the bent leg 120 when the surface is engaged, that is to say, even if the bent leg 120 The extension end 122 is slightly deflected. During surface mounting, the extension end 122 of the bent foot 120 can be correctly guided and corrected to the limit notch 133 by the inclined side wall. Under the design of the dense arrangement of the bent feet 120, The width of the extension end 122 of the bent leg 120 should be slightly narrower than the width of the inner end 121 of the bent leg 120 .

The integrated circuit package assembly 1 in the form of bare crystal of the present invention can be vertically stacked and has an overall ultra-thin shape by virtue of the exposed back surface 113 of the chip 110 and the design of the U-shaped bent legs 120 .

The thickness of the encapsulant 130 from the first surface 131 to the second surface 132 is not greater than 0.6 cm, and can even be not greater than 0.4 cm. In this way, as shown in FIG. 6 , more IC package assemblies 100 in the form of bare die can be vertically stacked with high density at the same height. In addition, since the chip 110 is not carried by the lead frame, after packaging, the chip 110 is fixed on the encapsulant 130 like a "jelly", so that the lead frame and the chip 110 have no direct bonding relationship, but the chip 110 is bonded by the encapsulant 130 And the lead frame can reduce the impact of thermal stress on the chip 110 .

As shown in Figure 7, in the manufacturing process of the present invention, the back side 113 of the chip 110 and the lead frame are attached to an external tape (external tape) 150, and after the chip 110 and the lead frame are electrically connected, together with the external tape 150 is put into the compression mold together, and the limit gap groove 133 is formed when the encapsulation compound 130 is formed. After tearing off the external adhesive tape 150, the extension end 122 of the lead frame bending leg 120 can be bent to the encapsulation compound 130 It is preferable to make the extension end 122 of the bent leg 120 contact the second surface 132 of the encapsulant 130 .

Embodiment two

In addition to being formed on the second surface 132 of the encapsulant 130 , the limiting notch 133 can also be formed on the first surface 231 of the encapsulant 230 so as to be on the same surface as the exposed back surface 213 of the chip 210 .

As shown in FIG. 8 , the integrated circuit packaging assembly 200 in the form of a bare die of the present invention includes a chip 210 , a metal lead frame and an insulating packaging compound 230 .

The chip 210 is selected from microprocessors, microcontrollers, various memories, application-specific integrated circuits, or image processing chips. The chip 210 has a front side 211 forming an integrated circuit layout and a corresponding back side 213 . Several electrode terminals (electrode) 212 are formed on the front surface 211 of the chip 210 .

The encapsulant 230 is formed by thermosetting insulating resin by molding technology, and the encapsulant 230 has a first surface 231 and a second surface 232 .

The lead frame is a metal with proper ductility, such as copper, iron or alloy, which includes several bent legs 220, which are U-shaped, and each bent leg 220 is divided into an internal terminal 221 located inside and outside the encapsulation compound 230 And the extension end 222. Preferably, the inner end 221 of the bent foot 220 is attached with a built-in patch (internal tape) 242, and the inner end 221 of the bent foot 220 has an exposed surface 223 that exposes the second surface 232 of the encapsulant 230; the extension of the bent foot 220 The end 222 is extended from the side of the encapsulant 230 and bent to the limiting notch 233 around the first surface 231 of the encapsulant 230 .

The back side 213 of the chip 210 is exposed on the first surface 231 of the encapsulant 230 and is in the form of a bare crystal; the exposed surface 223 of the inner terminal 221 of the bent leg 220 is formed on the periphery of the second surface 232 of the encapsulant 230, and the extension of the bent leg 220 The end 222 is bent to the periphery of the first surface 231 of the encapsulant 230 . The end 224 of the inner terminal 221 of the bent leg 220 is formed on a plane different from the exposed surface 223 of the inner terminal 221; the electrode terminal 212 of the chip 210 utilizes flip chip or inner lead bonding technology The end portion 224 of the inner terminal 221 of the lead frame leg 220 is electrically connected with a conductive bump 241 .

Claims (10)

1, a kind of integrated circuit package assembling of naked crystalline form attitude, it comprises wafer, metal lead wire frame and insulation-encapsulated colloid; Wafer has the positive and corresponding back side that forms several electrode tips; Metal lead wire frame comprises several clubfoots, and each clubfoot forms elongated end; The insulation-encapsulated colloid is in conjunction with wafer and clubfoot; Packing colloid has first surface and second surface; The surface that the back side system that it is characterized in that described wafer one of is revealed in first and second surface of packing colloid and be naked crystalline form attitude; Surface perimeter one of in first and second surface of packing colloid forms the spacing gap slot that several were installed with and limited the clubfoot elongated end.

2, the integrated circuit package assembling of naked crystalline form attitude according to claim 1 is characterized in that described packing colloid is not more than 0.6cm by first surface to the thickness of second surface system.

3, the integrated circuit package assembling of naked crystalline form attitude according to claim 1 is characterized in that described packing colloid is not more than 0.4cm by first surface to the thickness of second surface system.

4, the integrated circuit package assembling of naked crystalline form attitude according to claim 1 is characterized in that the degree of depth of described spacing gap slot is not more than the thickness of corresponding clubfoot elongated end.

5, the integrated circuit package assembling of naked crystalline form attitude according to claim 1 is characterized in that described spacing gap slot is the opening expansion shape with oblique amplification sidewall.

6, the integrated circuit package assembling of naked crystalline form attitude according to claim 1, it is characterized in that described each clubfoot have corresponding elongated end in connect end, in connect the end have be revealed in the packing colloid first surface appear the surface.

7, the integrated circuit package assembling of naked crystalline form attitude according to claim 6 is characterized in that connecing in the described clubfoot end and has end so as to electrically conducting with the chip electrode end; End system be formed at in connect that end appears plane inequality, surface and complete packed colloid coats.

8, the integrated circuit package assembling of naked crystalline form attitude according to claim 7 is characterized in that the end that connects end in the described clubfoot is attached at built-in paster.

9,, be connected with several metal bonding wires between the end that it is characterized in that connecing in the described clubfoot end and the electrode tip of wafer according to the integrated circuit package assembling of claim 1 or 7 described naked crystalline form attitudes.

10, the integrated circuit package assembling of naked crystalline form attitude according to claim 1 is characterized in that described chip electrode end is provided with conductive projection to electrically connect chip electrode end and clubfoot.

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