CN208489798U - The synchronous rectifying controller of adaptive adjustment driving voltage and the circuit for using it - Google Patents
The synchronous rectifying controller of adaptive adjustment driving voltage and the circuit for using it Download PDFInfo
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- CN208489798U CN208489798U CN201820742802.3U CN201820742802U CN208489798U CN 208489798 U CN208489798 U CN 208489798U CN 201820742802 U CN201820742802 U CN 201820742802U CN 208489798 U CN208489798 U CN 208489798U
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- 230000001360 synchronised effect Effects 0.000 title claims abstract description 31
- 230000003044 adaptive effect Effects 0.000 title claims abstract description 15
- 238000004804 winding Methods 0.000 claims abstract description 25
- 238000005070 sampling Methods 0.000 claims description 38
- 239000003990 capacitor Substances 0.000 claims description 32
- 230000003111 delayed effect Effects 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 10
- 239000004065 semiconductor Substances 0.000 description 8
- 230000003071 parasitic effect Effects 0.000 description 3
- 230000003247 decreasing effect Effects 0.000 description 2
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- 230000001419 dependent effect Effects 0.000 description 1
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- 238000005516 engineering process Methods 0.000 description 1
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Abstract
The utility model discloses a kind of synchronous rectifying controller of adaptive adjustment driving voltage and use its circuit, when the internal resistance of the electric current Isec of transformer secondary output winding Ns and power MOS pipe variation, this circuit can sample Vdet voltage and form Vadj signal, adaptive adjustment gate signal, so as to adjust the driving voltage of power MOS pipe, the shutdown of power MOS pipe is avoided to be delayed.
Description
Technical field
The utility model relates to synchronous rectifier and using its circuit, more particularly to adaptive adjustment driving voltage
Synchronous rectifying controller and the circuit for using it.
Background technique
Many flyback converters generate DC output voltage using diode rectifier.The conduction loss of diode rectifier
There is significant impact to total-power loss, it is particularly evident in low-voltage, high current converter application.In order to improve efficiency, more
Carry out more metal-oxide-semiconductors using low conducting internal resistance, to substitute diode, as rectifier, this mode is referred to as synchronous rectification
Device, as shown in Figure 1.Include: input terminal Vin, PWM controller 106, power MOS pipe 101, transformer 102, power MOS pipe 103,
Output capacitance C1, synchronous rectifying controller 105.Wherein transformer 102 includes armature winding Np, secondary windings Ns, prime power
Metal-oxide-semiconductor 101 further comprises parasitic diode D1 in addition to including power tube M1；Power MOS pipe 103 is in addition to including power tube M2, also
It include parasitic diode D2.
In Fig. 1, synchronous rectifying controller 105 completes secondary windings by the turn-on and turn-off of control power MOS pipe 103
The work of the current rectification of Ns.Its working principle be briefly described for, when the drain terminal voltage Vds of power MOS pipe 103 be lower than Von when,
Synchronous rectifier 105 exports higher voltage by gate, and at this moment power MOS pipe 103 is connected, with the electric current of secondary windings Ns
Isec is gradually decreased, and the drain terminal voltage Vds=Ids*Rds of secondary power metal-oxide-semiconductor 103 is gradually lowered, when Vds voltage is close
When threshold voltage Vaj, the output voltage gate of synchronous rectifying controller 105 starts to reduce, until Vds=Vaj.Due to primary
The unexpected conducting of power MOS pipe 101 suddenly become 0 when the electric current Isec of secondary windings Ns is at time t2.So Vds=
Ids*Rds is also begun to fly up, and as Vds=Voff, 105 output signal g ate of synchronous rectifying controller becomes 0, power
Metal-oxide-semiconductor 103 turns off.Simplified timing diagram when Fig. 2 is circuit work in Fig. 1.
It in the prior art, is when Vds=V2 starts, driving voltage starts to reduce, and Vds=Vaj is maintained, due to Vds=
Ids*Rds.That is the time of synchronous rectifier adjustment driving voltage, dependent on the product match condition of Ids*Rds, defeated
Load variation is excessive out causes Isec larger, or when periphery MOS internal resistance is excessive, synchronous rectifier is before shutdown, not
It is adjusted the movement of driving voltage gate, it may appear that due to the delay of synchronous rectifying controller shutdown metal-oxide-semiconductor, bring transformer
Primary secondary straight-through phenomenon.Therefore, it is necessary to study the delay for how avoiding shutdown metal-oxide-semiconductor.
Utility model content
Purpose of utility model: the purpose of the utility model is to provide a kind of the adaptive of delay that can be avoided shutdown metal-oxide-semiconductor
The synchronous rectifying controller of driving voltage and the circuit using it should be adjusted.
Technical solution: the synchronous rectifying controller of adaptive adjustment driving voltage described in the utility model, including compare
The non-inverting input terminal of device, comparator inputs fixed threshold voltage Von, and the inverting input terminal of comparator is separately connected the same of comparator
Phase input terminal, one end of switch and operational amplifier inverting input terminal, comparator inverting input terminal input fixed threshold electricity
Voff, the first input end of the output end connection blanking module of comparator are pressed, the second input terminal of blanking module is separately connected ratio
Compared with the output end of device and the reset terminal of rest-set flip-flop, the set end of the output end connection rest-set flip-flop of blanking module, rest-set flip-flop
Output end be separately connected the first input end of drive module and the first input end of sampling module, the output end of comparator also connects
Connect the second input terminal of sampling module, the output end of comparator is also connected with the third input terminal of sampling module, sampling module it is defeated
The control terminal of outlet connection switch, the other end of switch are separately connected one end of sampling capacitance and the homophase input of operational amplifier
End, the other end ground connection of sampling capacitance, the second input terminal of the output end connection drive module of operational amplifier.
Further, the sampling module includes current source, and the input terminal of current source inputs fixed voltage Vreg, current source
One end of output end connection switch, first input end of the control terminal of switch as drive module, the other end of switch connect respectively
Connect one end of switch and one end of capacitor, the output end of the control terminal connection monostable module of switch, the input of monostable module
The second input terminal as sampling module is held, the other end of switch and the other end of capacitor are grounded, and one end of capacitor is also distinguished
Connect buffer input terminal and switch one end, switch control terminal connection time delay module output end, time delay module it is defeated
Enter end and be separately connected the output end of monostable module and the control terminal of switch, the input terminal of monostable module is as sampling module
Third input terminal, the other end of switch are separately connected the input terminal of one end of capacitor, one end of switch and buffer, capacitor it is another
The other end of one end and switch is grounded, the inverting input terminal of the output end connection comparator of buffer, the output end of buffer
Connect the non-inverting input terminal of comparator, the input terminal of the output end connection monostable module of comparator, the output of monostable module
Hold the output end as sampling module.
Using it is described in the utility model it is adaptive adjustment driving voltage synchronous rectifying controller circuit of synchronous rectification,
Including input power Vin, the non-same polarity of armature winding Np in the anode connection transformer of input power Vin, in transformer just
The drain electrode of the Same Name of Ends connection power MOS pipe of grade winding Np, the source electrode ground connection of power MOS pipe, the grid connection of power MOS pipe
PWM controller, one end of the Same Name of Ends connection output capacitance of secondary windings Ns in transformer, the other end ground connection of output capacitance,
The other end of output capacitance is also connected with the source electrode of power MOS pipe, secondary windings Ns in the drain electrode connection transformer of power MOS pipe
Non-same polarity, in transformer the non-same polarity of secondary windings Ns be also respectively connected with the inverting input terminal of comparator, comparator it is same
Phase input terminal, one end of switch and operational amplifier inverting input terminal, power MOS pipe grid connection drive module output
End.
The utility model has the advantages that the utility model discloses a kind of synchronous rectifying controller of adaptive adjustment driving voltage and uses
Its circuit, when the internal resistance of the electric current Isec of transformer secondary output winding Ns and power MOS pipe variation, this circuit can sample Vdet
Voltage forms Vadj signal, and adaptive adjustment gate signal avoids power MOS pipe so as to adjust the driving voltage of power MOS pipe
Shutdown delay.
Detailed description of the invention
Fig. 1 is the circuit diagram of circuit of synchronous rectification in the prior art；
Simplified timing diagram when Fig. 2 is circuit work in Fig. 1；
Fig. 3 is the circuit diagram of circuit of synchronous rectification in specific embodiment of the present invention；
Simplified timing diagram when Fig. 4 is circuit work in Fig. 3；
Fig. 5 is the circuit diagram of sampling module in Fig. 3；
Simplified timing diagram when Fig. 6 is sampling module work in Fig. 3.
Specific embodiment
Fig. 1 is the circuit diagram of circuit of synchronous rectification in the prior art.In synchronous rectifying controller 105 and the utility model
Specific embodiment is the same, also contains two comparators, blanking module, rest-set flip-flop and drive module, their connection is closed
System does not just provide its physical circuit figure as specific embodiment of the present invention.As it can be seen that the utility model is specific
The innovation of embodiment compared with the existing technology essentially consists in sampling module 315, switch 318, sampling capacitance 317 and operation amplifier
Device 316.
Specific embodiment of the present invention discloses a kind of synchronous rectifying controller of adaptive adjustment driving voltage
305, as shown in figure 3, including comparator 310, the non-inverting input terminal of comparator 310 inputs fixed threshold voltage Von, comparator
310 inverting input terminal is separately connected the anti-of the non-inverting input terminal of comparator 314, one end of switch 318 and operational amplifier 316
Phase input terminal, the inverting input terminal of comparator 314 input fixed threshold voltage Voff, and the output end of comparator 310 connects blanking
The first input end of module 311, the second input terminal of blanking module 311 are separately connected output end and the RS triggering of comparator 314
The reset terminal of device 312, the set end of the output end connection rest-set flip-flop 312 of blanking module 311, the output end of rest-set flip-flop 312
It is separately connected the first input end of drive module 313 and the first input end of sampling module 315, the output end of comparator 310 is also
The second input terminal of sampling module 315 is connected, the output end of comparator 314 is also connected with the third input terminal of sampling module 315, adopts
The control terminal of the output end connection switch 318 of egf block 315, the other end of switch 318 are separately connected one end of sampling capacitance 317
It is grounded with the other end of the non-inverting input terminal of operational amplifier 316, sampling capacitance 317, the output end connection of operational amplifier 316
Second input terminal of drive module 313.The signal that comparator 310 is output to blanking module 311 is on signal, and comparator 314 is defeated
The signal for arriving blanking module 311 out is off signal.Sampling module 315 is output to the signal of 318 control terminal of switch as pulse letter
Number, the signal that rest-set flip-flop 312 is output to sampling module 315 is drv signal.The input of 316 non-inverting input terminal of operational amplifier
Signal is Vadj signal.
As shown in figure 5, sampling module 315 includes current source 501, the input terminal of current source 501 inputs fixed voltage Vreg,
One end of the output end connection switch 502 of current source 501, first input of the control terminal of switch 502 as drive module 313
End, the other end of switch 502 are separately connected one end of switch 504 and one end of capacitor 505, and the control terminal of switch 504 connects single
The output end of steady-state module 503, second input terminal of the input terminal of monostable module 503 as sampling module 315, switch 504
The other end and the other end of capacitor 505 be grounded, one end of capacitor 505 is also respectively connected with the input terminal of buffer 511 and opens
508 one end, the output end of the control terminal connection time delay module 507 of switch 508 are closed, the input terminal of time delay module 507 connects respectively
The output end of order steady-state module 506 and the control terminal of switch 510, the input terminal of monostable module 506 is as sampling module 315
Third input terminal, the other end of switch 508 is separately connected one end of capacitor 509, one end of switch 510 and buffer 512
Input terminal, the other end of capacitor 509 and the other end of switch 510 are grounded, and the output end of buffer 512 connects comparator 513
Inverting input terminal, buffer 511 output end connection comparator 513 non-inverting input terminal, comparator 513 output end connection
The input terminal of monostable module 514, output end of the output end of monostable module 514 as sampling module 315.Monostable module
503 signals for being output to 504 control terminal of switch are on_short signal, and monostable module 506 is output to the input of time delay module 507
The signal at end is off_short signal, and the signal that time delay module 507 is output to 508 control terminal of switch is off_delay signal.
Present embodiment is also disclosed using the above-mentioned adaptive synchronous rectifying controller 305 for adjusting driving voltage
Circuit of synchronous rectification, as shown in figure 3, include input power Vin, input power Vin anode connection transformer 302 in primary around
The non-same polarity of Np is organized, the drain electrode of the Same Name of Ends connection power MOS pipe 301 of armature winding Np, power MOS pipe in transformer 302
301 source electrode ground connection, the grid of power MOS pipe 301 connect PWM controller 306, and secondary windings Ns's is of the same name in transformer 302
One end of end connection output capacitance 304, the other end ground connection of output capacitance 304, the other end of output capacitance 304 are also connected with power
The source electrode of metal-oxide-semiconductor 303, the drain electrode of power MOS pipe 303 connect the non-same polarity of secondary windings Ns in transformer 302, transformer
The non-same polarity of secondary windings Ns is also respectively connected with the homophase input of the inverting input terminal of comparator 310, comparator 314 in 302
The grid of the inverting input terminal at end, one end of switch 318 and operational amplifier 316, power MOS pipe 303 connects drive module 313
Output end.The signal that drive module 313 is output to 303 grid of power MOS pipe is gate signal.In transformer 302 secondary around
Group Ns non-same polarity be output to the inverting input terminal of comparator 310, the non-inverting input terminal of comparator 314, switch 318 one end and
The signal of the inverting input terminal of operational amplifier 316 is Vdet signal.
Simplified timing diagram when circuit of synchronous rectification works in present embodiment is as shown in Figure 4.Work as PWM controller
After 306 control power MOS pipes 301 turn off, that is, since the T1 moment, transformer 302 starts to demagnetize, and transformer 302 times
The electric current Isec of grade winding Ns is begun setting up, and has just begun through the parasitic diode D2 flowing of power MOS pipe 303, at this moment Vdet
Signal is lower than fixed threshold voltage Von, and the output signal on of comparator 310 is high level, and signal on high level passes through blanking mould
After block 311, in T2 moment set rest-set flip-flop 312, signal drv becomes high level, and 313 output signal g ate of drive module starts
Become high voltage, power MOS pipe 303 is begun to turn on, and enters linear zone；At the T3 moment, 315 output signal of sampling module
Pulse is the small-pulse effect of a high level, model Vdet on the voltage sample to sampling capacitance 317 at T3 moment, voltage
For Vadj.After the T3 moment, with the reduction of 302 secondary windings Ns electric current Isec of transformer, signal Vdet is gradually risen.
Since the namely anti-phase input end signal Vdet of operational amplifier 316 move closer to homophase input end signal being less than Vadj
Vadj, the output signal of operational amplifier 316 enters in drive module 313 at this time, so that the output signal of drive module 313
Gate starts to reduce, and the linear zone internal resistance of power MOS pipe 303 starts to increase, and until maintaining Vdet=Isec*Rds constant, starts
Form a negative feedback loop.So with the lasting reduction of Isec, gate signal is gradually decreased, power MOS pipe 303 start by
Gradually from linear zone toward saturation region transition.When PWM controller 306 is opened, that is, the T4 moment, 302 secondary windings Ns of transformer
Electric current Isec reduce suddenly, Vdet is increased suddenly, when Vdet be greater than fixed threshold voltage Voff when, comparator 314 export
Signal off becomes high level, so that the output signal drv of rest-set flip-flop 312 is low level, then drive module 313
Output signal g ate is no-voltage, so that power MOS pipe 303 turns off.Above-mentioned T3 moment, 315 output signal pulse of sampling module
For small-pulse effect.Pulse is generated at the T3 moment, the time from T1 to T3, with time of drv signal high level at certain ratio,
Actually namely time of T1 to T4.Present embodiment is set as (T3-T1)/(T4-T1)=1/2
When the internal resistance of the electric current Isec of 302 secondary windings Ns of transformer and power MOS pipe 303 variation, this circuit can be adopted
Sample Vdet voltage forms Vadj signal, and the adaptive gate signal that adjusts avoids so as to adjust the driving voltage of power MOS pipe 303
The shutdown of power MOS pipe 303 is delayed.
In sampling module 315, the timing diagram of the signal 521 of 509 one end of signal 520 and capacitor of 505 one end of capacitor is such as
Shown in Fig. 6.Capacitor 505 is identical with the capacitance of capacitor 509.As seen in figures 3-6, on signal rising edge passes through monostable module
503 generate the high level pulse of on_short signal, are discharged by control switch 504 capacitor 505.The height of drv signal later
Level control switch 502 is connected, so that current source 501 charges to capacitor 505, this when, 520 linear rises of signal were straight
Low level control switch 502 to drv signal ends；And off signal is got higher by low so that drv signal is lower by height, off letter
The pulse that the high level of off_short number is generated by monostable module 506, thus the conducting of control switch 510, to capacitor
509 discharge；The pulse of the high level of signal off_short is after time delay module 507, the signal off_delay of generation
High level pulse by the conducting of control switch 508, the charge that capacitor 505 and capacitor 509 store is balanced distribution,
Because capacitor 505 is identical with the capacitance of capacitor 509, then the voltage of capacitor 505 and capacitor 509 after equilibrium assignmen is equal to
The half of voltage before distributing, that is, in Fig. 6, V2=V3=0.5*V1.So work as next cycle, capacitor 505 recharges
When, when signal 520 is equal to the namely voltage V2 or V3 of signal 521, comparator 513 is overturn, then monostable module 514 is defeated
The pulse signal of a high level out.Because current source 501 charges to capacitor 505, then according to the related formula of capacitorBecause being constant current source charging, and there is Q=I*T, soSo the charging voltage duration of capacitor 505 is
The half of maximum voltage duration namely mentioned-above T3-T1.
Claims (3)
1. the adaptively synchronous rectifying controller of adjustment driving voltage, it is characterised in that: including first comparator (310), first
The non-inverting input terminal of comparator (310) inputs fixed threshold voltage Von, and the inverting input terminal of first comparator (310) connects respectively
Connect the anti-phase input of the non-inverting input terminal of the second comparator (314), one end of first switch (318) and operational amplifier (316)
End, the inverting input terminal of the second comparator (314) input fixed threshold voltage Voff, and the output end of first comparator (310) connects
The first input end of blanking module (311) is connect, the second input terminal of blanking module (311) is separately connected the second comparator (314)
Output end and rest-set flip-flop (312) reset terminal, blanking module (311) output end connection rest-set flip-flop (312) set
End, the output end of rest-set flip-flop (312) be separately connected drive module (313) first input end and sampling module (315) the
One input terminal, the output end of first comparator (310) are also connected with the second input terminal of sampling module (315), the second comparator
(314) output end is also connected with the third input terminal of sampling module (315), and the output end connection first of sampling module (315) is opened
The control terminal of (318) is closed, the other end of first switch (318) is separately connected one end and the operational amplifier of sampling capacitance (317)
(316) non-inverting input terminal, the other end ground connection of sampling capacitance (317), the output end connection driving mould of operational amplifier (316)
Second input terminal of block (313).
2. the synchronous rectifying controller of adaptive adjustment driving voltage according to claim 1, it is characterised in that: described to adopt
Egf block (315) includes current source (501), and the input terminal of current source (501) inputs fixed voltage Vreg, current source (501)
Output end connects the one end of second switch (502), and the control terminal of second switch (502) is first defeated as drive module (313)
Entering end, the other end of second switch (502) is separately connected one end of third switch (504) and one end of first capacitor (505), the
The control terminal of three switches (504) connects the output end of the first monostable module (503), the input of the first monostable module (503)
The second input terminal as sampling module (315) is held, third switchs the other end of (504) and the other end of first capacitor (505)
It is grounded, one end of first capacitor (505) is also respectively connected with the input terminal of the first buffer (511) and the 4th and switchs (508)
One end, the output end of control terminal connection time delay module (507) of the 4th switch (508), the input terminal difference of time delay module (507)
The output end of the second monostable module (506) and the control terminal of the 5th switch (510) are connected, the second monostable module (506)
The other end of third input terminal of the input terminal as sampling module (315), the 4th switch (508) is separately connected the second capacitor
(509) input terminal of one end, one end of the 5th switch (510) and the second buffer (512), the second capacitor (509) it is another
The other end of end and the 5th switch (510) is grounded, output end connection third comparator (513) of the second buffer (512)
Inverting input terminal, the non-inverting input terminal of output end connection third comparator (513) of the first buffer (511), third comparator
(513) input terminal of output end connection third monostable module (514), the output end conduct of third monostable module (514)
The output end of sampling module (315).
3. the circuit of synchronous rectification of the synchronous rectifying controller using adaptive adjustment driving voltage described in claim 1,
Be characterized in that: including input power Vin, armature winding Np's is non-of the same name in anode connection transformer (302) of input power Vin
It holds, the drain electrode of the Same Name of Ends connection the first power MOS pipe (301) of armature winding Np, the first power MOS pipe in transformer (302)
(301) source electrode ground connection, the grid of the first power MOS pipe (301) connects PWM controller (306), secondary in transformer (302)
One end of Same Name of Ends connection output capacitance (304) of winding Ns, the other end ground connection of output capacitance (304), output capacitance (304)
The other end be also connected with the source electrodes of the second power MOS pipe (303), the drain electrode of the second power MOS pipe (303) connects transformer
(302) non-same polarity of secondary windings Ns in, the non-same polarity of secondary windings Ns is also respectively connected with the first ratio in transformer (302)
It is put compared with the inverting input terminal of device (310), the non-inverting input terminal of the second comparator (314), one end of first switch (318) and operation
The inverting input terminal of big device (316), the output end of grid connection drive module (313) of the second power MOS pipe (303).
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| Application Number | Priority Date | Filing Date | Title |
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| CN201820742802.3U CN208489798U (en) | 2018-05-18 | 2018-05-18 | The synchronous rectifying controller of adaptive adjustment driving voltage and the circuit for using it |
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| CN201820742802.3U CN208489798U (en) | 2018-05-18 | 2018-05-18 | The synchronous rectifying controller of adaptive adjustment driving voltage and the circuit for using it |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108429468A (en) * | 2018-05-18 | 2018-08-21 | 陈畅 | It adaptively adjusts the synchronous rectifying controller of driving voltage and uses its circuit |
| CN113162390A (en) * | 2020-12-17 | 2021-07-23 | 上海晶丰明源半导体股份有限公司 | Control circuit of isolated power supply, isolated power supply and control method thereof |
| CN115184666A (en) * | 2022-07-25 | 2022-10-14 | 成都启臣微电子股份有限公司 | Slope detection circuit with programmable blanking function and switching power supply system |
-
2018
- 2018-05-18 CN CN201820742802.3U patent/CN208489798U/en active Active
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108429468A (en) * | 2018-05-18 | 2018-08-21 | 陈畅 | It adaptively adjusts the synchronous rectifying controller of driving voltage and uses its circuit |
| CN108429468B (en) * | 2018-05-18 | 2024-01-05 | 南京志行聚能科技有限责任公司 | Synchronous rectification controller that adaptively adjusts drive voltage and circuit using same |
| CN113162390A (en) * | 2020-12-17 | 2021-07-23 | 上海晶丰明源半导体股份有限公司 | Control circuit of isolated power supply, isolated power supply and control method thereof |
| US11929684B2 (en) | 2020-12-17 | 2024-03-12 | Shanghai Bright Power Semiconductor Co., Ltd. | Isolated power supply control circuits, isolated power supply and control method thereof |
| US12155316B2 (en) | 2020-12-17 | 2024-11-26 | Shanghai Bright Power Semiconductor Co., Ltd. | Control circuit for an isolated power supply |
| CN115184666A (en) * | 2022-07-25 | 2022-10-14 | 成都启臣微电子股份有限公司 | Slope detection circuit with programmable blanking function and switching power supply system |
| CN115184666B (en) * | 2022-07-25 | 2026-01-27 | 成都启臣微电子股份有限公司 | Slope detection circuit with programmable blanking function and switching power supply system |
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| TR01 | Transfer of patent right |
Effective date of registration: 20200601 Address after: 211800 building 20, No.1, Amber Road, Yongning Park, economic development zone, Pukou District, Nanjing City, Jiangsu Province Patentee after: Nanjing Zhixing Juneng Technology Co.,Ltd. Address before: 210019 1 Tongjiang Road, Jianye District, Nanjing, Jiangsu, 12 home 604 Patentee before: Chen Chang |
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| PE01 | Entry into force of the registration of the contract for pledge of patent right | ||
| PE01 | Entry into force of the registration of the contract for pledge of patent right |
Denomination of utility model: A synchronous rectification controller with adaptive adjustment of driving voltage and its circuit for use Granted publication date: 20190212 Pledgee: Zijin Branch of Nanjing Bank Co.,Ltd. Pledgor: Nanjing Zhixing Juneng Technology Co.,Ltd. Registration number: Y2024980011536 |