CN204558442U - Semiconductor device and semiconductor device shell - Google Patents
Semiconductor device and semiconductor device shell Download PDFInfo
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- CN204558442U CN204558442U CN201520138599.5U CN201520138599U CN204558442U CN 204558442 U CN204558442 U CN 204558442U CN 201520138599 U CN201520138599 U CN 201520138599U CN 204558442 U CN204558442 U CN 204558442U
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/531—Shapes of wire connectors
- H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/874—On different surfaces
- H10W72/884—Die-attach connectors and bond wires
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink
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Abstract
一种半导体装置以及半导体装置用外壳。提供如下一种半导体装置:即使在注入密封材料直到外壳的上表面附近的情况下,也不会引起外观不良、与盖的粘接性降低。半导体装置(1)具备绝缘基板(2)、搭载在绝缘基板(2)上的半导体元件(3)、包围绝缘基板(2)的周缘来收容半导体元件(3)的中空的外壳(6)以及被填充到外壳(6)内来将外壳内密封的密封材料(10)。外壳(6)具有从外壳(6)的上表面(6c)局部突出的突起部(6f)。
A semiconductor device and a case for the semiconductor device. Provided is a semiconductor device that does not cause poor appearance or lower adhesion to a cover even when a sealing material is injected up to the vicinity of the upper surface of a case. A semiconductor device (1) includes an insulating substrate (2), a semiconductor element (3) mounted on the insulating substrate (2), a hollow case (6) surrounding the periphery of the insulating substrate (2) to accommodate the semiconductor element (3), and A sealing material (10) that is filled into the casing (6) to seal the inside of the casing. The housing (6) has a protrusion (6f) partially protruding from an upper surface (6c) of the housing (6).
Description
技术领域technical field
本实用新型涉及一种半导体装置以及半导体装置用外壳。The utility model relates to a semiconductor device and a casing for the semiconductor device.
背景技术Background technique
作为半导体装置,已知如下一种功率半导体组件:将一个或者两个以上的功率半导体元件(半导体贴片)内置于外壳内,用密封材料将外壳内密封。为了将搭载在绝缘基板上的半导体贴片与形成于该绝缘基板的电路、端子进行电连接,这些功率半导体元件使用了铝制的接合线等。As a semiconductor device, there is known a power semiconductor module in which one or more power semiconductor elements (semiconductor chips) are housed in a case, and the inside of the case is sealed with a sealing material. These power semiconductor elements use aluminum bonding wires or the like to electrically connect semiconductor chips mounted on an insulating substrate to circuits and terminals formed on the insulating substrate.
外壳内的密封材料由环氧树脂等构成,用于对收容在外壳内的半导体贴片、接合线等进行保护并进行绝缘。因而,在功率半导体组件中,密封材料以足够覆盖外壳内的接合线并进行绝缘的高度填充到外壳内。另一方面,功率半导体组件要求小型化、薄型化,对于外壳的高度,也期望在无障碍的情况下降低。在通过利用这种密封材料兼顾外壳内的绝缘性和小型化、薄型化而向外壳内注入液状的密封材料时,注入该密封材料直到外壳的上表面附近。The sealing material inside the case is made of epoxy resin, etc., and is used to protect and insulate semiconductor chips and bonding wires housed in the case. Therefore, in the power semiconductor module, the sealing material is filled into the case to a height sufficient to cover and insulate the bonding wires inside the case. On the other hand, power semiconductor components are required to be miniaturized and thinned, and the height of the case is also expected to be reduced without hindrance. When injecting a liquid sealing material into the housing by using such a sealing material to achieve both insulation in the housing and miniaturization and thinning, the sealing material is injected up to the vicinity of the upper surface of the housing.
密封材料被注入直到外壳的上缘附近,因此在注入时密封材料有时漫到外壳的上表面。另外,当在注入后直到将密封材料固化为止的期间进行输送时,密封材料有时漫到外壳的上表面。Since the sealing material is injected up to the vicinity of the upper edge of the case, the sealing material sometimes overflows to the upper surface of the case during injection. In addition, when the sealing material is transported after injection until the sealing material is cured, the sealing material may spread to the upper surface of the case.
这种密封材料漫到外壳的上表面引起功率半导体组件的外观不良,另外在用盖覆盖外壳并进行粘接固定的情况下,由于作为外壳的粘接面的上表面不平坦,因此有时导致粘接性降低。This kind of sealing material spreads to the upper surface of the case and causes poor appearance of the power semiconductor module. In addition, when the case is covered with a cover and fixed by adhesive, the upper surface as the bonding surface of the case is not flat, which may cause sticking. reduced contact.
为了防止密封材料漫到外壳的上表面,提出了在外壳的内表面设置凸缘(专利文献1)、在外壳的内表面设置台阶部(专利文献2)的技术。In order to prevent the sealing material from spreading to the upper surface of the case, a technique has been proposed in which a flange is provided on the inner surface of the case (Patent Document 1) and a step is provided on the inner surface of the case (Patent Document 2).
专利文献1:日本特开平8-130291号公报Patent Document 1: Japanese Patent Application Laid-Open No. 8-130291
专利文献2:日本特开平4-354354号公报Patent Document 2: Japanese Patent Application Laid-Open No. 4-354354
实用新型内容Utility model content
实用新型要解决的问题Problems to be solved by the utility model
但是,设置在外壳内表面的凸缘、台阶部朝向外壳的内侧形成,因此虽然事先防止密封材料到达外壳的上表面,但密封材料的注入量被限制在形成有该凸缘、台阶部的高度。因而,没有充分地满足尽量注入密封材料直到外壳的上表面附近来提高绝缘性这一要求。另外,假设在注入密封材料直到外壳的上表面附近的情况下,难以防止密封材料漫到外壳上表面。However, since the flange and the stepped portion provided on the inner surface of the casing are formed toward the inside of the casing, the sealing material is prevented from reaching the upper surface of the casing in advance, but the injection amount of the sealing material is limited to the height at which the flange and the stepped portion are formed. . Therefore, the requirement to improve insulation by injecting the sealing material as far as possible up to the vicinity of the upper surface of the case is not sufficiently satisfied. In addition, it is assumed that in the case where the sealing material is injected up to the vicinity of the upper surface of the housing, it is difficult to prevent the sealing material from overflowing to the upper surface of the housing.
本实用新型有利于解决上述以往的半导体装置的问题,其目的在于提供如下一种即使在注入密封材料直到外壳的上表面附近的情况下也不会引起外观不良、与盖的粘接性降低的半导体装置以及半导体装置用外壳。The present invention is advantageous in solving the above-mentioned problems of the conventional semiconductor device, and its object is to provide the following, even when the sealing material is injected up to the vicinity of the upper surface of the case, it will not cause poor appearance and reduce the adhesion with the cover. A semiconductor device and a case for a semiconductor device.
用于解决问题的方案solutions to problems
为了实现上述目的,提供了如下的半导体装置以及半导体装置用外壳。In order to achieve the above object, the following semiconductor device and a semiconductor device case are provided.
本实用新型的第一方面的半导体装置具备绝缘基板、搭载在该绝缘基板上的半导体元件、包围该绝缘基板的周缘来收容该半导体元件的中空的外壳以及被填充到该外壳内来将该外壳内密封的密封材料。并且,本实用新型的半导体装置的该外壳具有从该外壳的上表面局部突出的突起部。A semiconductor device according to a first aspect of the present invention includes an insulating substrate, a semiconductor element mounted on the insulating substrate, a hollow case that surrounds the periphery of the insulating substrate to accommodate the semiconductor element, and a hollow case that is filled into the case to form the case. Inner seal sealing material. In addition, the case of the semiconductor device of the present invention has a protrusion partially protruding from the upper surface of the case.
本实用新型的第二方面的半导体装置为在第一方面的半导体装置中,上述外壳具有箱型形状,上述突起部形成在该外壳的上表面的角部附近。A semiconductor device according to a second aspect of the present invention is the semiconductor device according to the first aspect, wherein the case has a box shape, and the protrusion is formed near a corner of an upper surface of the case.
本实用新型的第三方面的半导体装置为在第一方面或第二方面的半导体装置中,上述突起部具有分割上述外壳的上表面的厚度而得到的厚度。A semiconductor device according to a third aspect of the present invention is the semiconductor device according to the first aspect or the second aspect, wherein the protrusion has a thickness obtained by dividing the thickness of the upper surface of the case.
本实用新型的第四方面的半导体装置为在第一方面至第三方面中的任一方面的半导体装置中,形成在上述外壳的长边方向端部附近的上述突起部与形成在上述外壳的长边方向中央部附近的上述突起部相比,从上述上表面起的高度更高。A semiconductor device according to a fourth aspect of the present invention is the semiconductor device according to any one of the first to third aspects, wherein the protrusion formed near the longitudinal end of the case and the protrusion formed on the case The height from the above-mentioned upper surface is higher than the above-mentioned protruding portion in the vicinity of the central portion in the longitudinal direction.
本实用新型的第五方面的半导体装置为在第一方面至第四方面中的任一方面的半导体装置中,在上述外壳的内表面具备该外壳的厚度大的台阶部,在该台阶部设置有从外壳内向外部延伸的导电部件的一端部。A semiconductor device according to a fifth aspect of the present invention is the semiconductor device according to any one of the first to fourth aspects, wherein a stepped portion having a large thickness of the casing is provided on the inner surface of the casing, and a step is provided on the stepped portion. There is an end portion of the conductive member extending from the inside of the housing to the outside.
本实用新型的第六方面的半导体装置为在第五方面的半导体装置中,上述导电部件是由铜板构成的引线,该半导体装置还具备与该引线连接的接合线。A sixth aspect of the present invention is the semiconductor device according to the fifth aspect, wherein the conductive member is a lead made of a copper plate, and the semiconductor device further includes a bonding wire connected to the lead.
本实用新型的第七方面的半导体装置为在第一方面至第六方面中的任一方面的半导体装置中,还具备覆盖上述外壳的盖。A semiconductor device according to a seventh aspect of the present invention is the semiconductor device according to any one of the first to sixth aspects, further comprising a cover covering the case.
本实用新型的第八方面的半导体装置为在第一方面至第六方面中的任一方面的半导体装置中,还具备载置在上述外壳上的平板。A semiconductor device according to an eighth aspect of the present invention is the semiconductor device according to any one of the first to sixth aspects, further comprising a flat plate placed on the case.
本实用新型的第九方面的半导体装置用外壳是包围绝缘基板的周缘来收容半导体元件并被填充密封材料的中空的外壳,具有从该外壳的上表面局部突出的突起部。The semiconductor device case according to the ninth aspect of the present invention is a hollow case that surrounds the periphery of the insulating substrate to accommodate the semiconductor element and is filled with a sealing material, and has a protrusion that partially protrudes from the upper surface of the case.
本实用新型的第十方面的半导体装置用外壳为在第九方面的半导体装置用外壳中,具有箱型形状,上述突起部形成在上述外壳的上表面的角部附近。A tenth aspect of the present invention is the case for a semiconductor device according to the ninth aspect, which has a box shape, and the protrusion is formed near a corner of the upper surface of the case.
本实用新型的第十一方面的半导体装置用外壳为在第九方面或第十方面的半导体装置用外壳中,上述突起部具有分割上述外壳的上表面的厚度而得到的厚度。In the semiconductor device case of the eleventh aspect of the present invention, in the semiconductor device case of the ninth or tenth aspect, the protrusion has a thickness obtained by dividing the thickness of the upper surface of the case.
实用新型的效果The effect of utility model
本实用新型的半导体装置在外壳的上表面局部形成突起,即使密封材料漫到该外壳的上表面也不会漫到突起部上。因而能够防止外观不良。另外,能够维持外壳上表面的平坦性,从而能够充分地确保对外壳上表面与盖进行粘接时的粘接性。In the semiconductor device of the present invention, protrusions are partially formed on the upper surface of the housing, and even if the sealing material spreads to the upper surface of the housing, it will not spread onto the protrusions. Therefore, appearance defects can be prevented. In addition, the flatness of the upper surface of the case can be maintained, thereby ensuring sufficient adhesiveness when bonding the upper surface of the case and the cover.
附图说明Description of drawings
图1是本实用新型的实施方式的功率半导体组件的截面图。FIG. 1 is a cross-sectional view of a power semiconductor module according to an embodiment of the present invention.
图2是图1的功率半导体组件的俯视图。FIG. 2 is a top view of the power semiconductor assembly of FIG. 1 .
图3是图1的功率半导体组件的截面图。FIG. 3 is a cross-sectional view of the power semiconductor assembly of FIG. 1 .
图4是图1的功率半导体组件的局部放大俯视图。FIG. 4 is a partially enlarged top view of the power semiconductor assembly of FIG. 1 .
图5是具备盖的功率半导体组件的截面图。5 is a cross-sectional view of a power semiconductor module provided with a cover.
图6是本实用新型的实施方式的功率半导体组件的变形例的俯视图。6 is a plan view of a modified example of the power semiconductor module according to the embodiment of the present invention.
图7是本实用新型的实施方式的功率半导体组件的变形例的俯视图。7 is a plan view of a modified example of the power semiconductor module according to the embodiment of the present invention.
图8是图6的功率半导体组件的局部放大俯视图。FIG. 8 is a partially enlarged top view of the power semiconductor assembly of FIG. 6 .
图9是图7的功率半导体组件的局部放大俯视图。FIG. 9 is a partially enlarged top view of the power semiconductor assembly of FIG. 7 .
图10是参考例的功率半导体组件的俯视图。Fig. 10 is a plan view of a power semiconductor module of a reference example.
图11是以往的功率半导体组件的截面图。FIG. 11 is a cross-sectional view of a conventional power semiconductor module.
图12是图11的功率半导体组件的截面图。FIG. 12 is a cross-sectional view of the power semiconductor assembly of FIG. 11 .
图13是图11的功率半导体组件的局部放大俯视图。FIG. 13 is a partially enlarged top view of the power semiconductor assembly of FIG. 11 .
附图标记说明Explanation of reference signs
1:功率半导体组件;2:绝缘基板;3:半导体贴片;4:焊料;5:贴片电容器;6:外壳;6c:上表面;6f:突起部;6g:突起部;6h:突起部;7:绝缘性粘接剂;8:引线;9:接合线;10:密封材料;11:盖。1: power semiconductor component; 2: insulating substrate; 3: semiconductor patch; 4: solder; 5: chip capacitor; 6: shell; 6c: upper surface; 6f: protrusion; 6g: protrusion; 6h: protrusion ; 7: insulating adhesive; 8: lead wire; 9: bonding wire; 10: sealing material; 11: cover.
具体实施方式Detailed ways
使用附图来具体地说明本实用新型的实施方式所涉及的半导体装置以及半导体装置用外壳。The semiconductor device and the case for semiconductor devices which concerns on embodiment of this invention are demonstrated concretely using drawing.
在图1中示出作为本实用新型的实施方式的半导体装置的功率半导体组件的截面图。图1示出的功率半导体组件1在绝缘基板2上搭载有半导体贴片3。绝缘基板2具备金属基板2a、设置在该金属基板2a上的绝缘板2b以及设置在绝缘板2b上的金属箔2c。绝缘板2b由氮化硅、氧化铝、氮化铝等陶瓷材料、环氧树脂等有机绝缘材料构成。金属箔2c具体地是指例如铜箔。在绝缘板2b上选择性地形成金属箔2c,由此形成了与形成于半导体贴片3的下表面的电极、后述引线相连接的电路图案。FIG. 1 shows a cross-sectional view of a power semiconductor module as a semiconductor device according to an embodiment of the present invention. The power semiconductor module 1 shown in FIG. 1 has a semiconductor chip 3 mounted on an insulating substrate 2 . The insulating substrate 2 includes a metal substrate 2a, an insulating plate 2b provided on the metal substrate 2a, and a metal foil 2c provided on the insulating plate 2b. The insulating plate 2b is made of a ceramic material such as silicon nitride, alumina, or aluminum nitride, or an organic insulating material such as epoxy resin. The metal foil 2c specifically refers to copper foil, for example. Metal foil 2c is selectively formed on insulating plate 2b, thereby forming a circuit pattern connected to electrodes formed on the lower surface of semiconductor chip 3 and leads described later.
半导体贴片3通过作为接合材料的例如焊料4被接合到由金属箔2c构成的布线图案上而与其电接合。半导体贴片3例如是贴片二极管、贴片晶体管,作为贴片晶体管,能够使用IGBT贴片、MOSFET贴片等,对半导体贴片3的种类不特别地进行限定。另外,作为半导体贴片3的衬底,除了能够使用单晶硅以外,还能够使用碳化硅(SiC)、氮化镓(GaN)。在图1中,说明半导体贴片3是贴片二极管的例子。此外,在图1中,图示了在一个绝缘基板2的金属箔2c上搭载有一个半导体贴片3的情况,但也可以在一个绝缘基板2的金属箔2c上搭载两个以上的半导体贴片3。The semiconductor chip 3 is electrically bonded to the wiring pattern constituted by the metal foil 2 c by bonding, for example, solder 4 as a bonding material. The semiconductor chip 3 is, for example, a chip diode or a chip transistor. As the chip transistor, an IGBT chip, a MOSFET chip, or the like can be used, and the type of the semiconductor chip 3 is not particularly limited. In addition, as the substrate of the semiconductor chip 3 , silicon carbide (SiC) and gallium nitride (GaN) can be used in addition to single crystal silicon. In FIG. 1 , an example in which the semiconductor chip 3 is a chip diode will be described. In addition, in FIG. 1, the case where one semiconductor chip 3 is mounted on the metal foil 2c of one insulating substrate 2 is illustrated, but two or more semiconductor chips 3 may be mounted on the metal foil 2c of one insulating substrate 2. slice 3.
另外,在图1中,在由金属箔2c构成的布线图案上连接有贴片电容器5。In addition, in FIG. 1, the chip capacitor 5 is connected to the wiring pattern comprised by the metal foil 2c.
在搭载有半导体贴片3的绝缘基板2的周缘安装有外壳6。具体地说,外壳6是由PPS树脂等绝缘性树脂构成的中空(框形状)的大致长方体形状,上端部6a成为开口,能够从上端部6a向外壳6内的中空空间注入密封材料10。外壳6的下端部6b通过绝缘性粘接剂7与绝缘基板2的金属基板2a和绝缘板2b相接合。通过利用绝缘性粘接剂7进行接合来确保绝缘基板2与外壳6之间的绝缘性,并且消除绝缘基板2与外壳6之间的间隙,从而防止密封材料10从间隙漏出到外部。A case 6 is attached to the periphery of the insulating substrate 2 on which the semiconductor chip 3 is mounted. Specifically, the case 6 is a hollow (frame-shaped) substantially rectangular parallelepiped made of insulating resin such as PPS resin, and the upper end 6a is opened, and the sealing material 10 can be injected into the hollow space in the case 6 from the upper end 6a. The lower end portion 6 b of the case 6 is bonded to the metal substrate 2 a and the insulating plate 2 b of the insulating substrate 2 with an insulating adhesive 7 . Bonding with the insulating adhesive 7 ensures insulation between the insulating substrate 2 and the case 6 and eliminates a gap between the insulating substrate 2 and the case 6 to prevent the sealing material 10 from leaking out through the gap.
外壳6在内表面6d的高度方向的途中具有向内侧突出的台阶部6da。由于具有台阶部6da,使该台阶部6da处的该外壳6的厚度比外壳6的上端部6a处的该外壳6的厚度、即外壳6的内表面6d与外表面6e之间的距离厚。由铜板构成的引线8的一端部露出并安装于该台阶部6da。在外壳6的内表面6d的台阶部6da露出的引线8的一端通过接合线9与绝缘基板2的金属箔2c或者半导体贴片3的电极电连接。The casing 6 has a step portion 6da protruding inward in the middle of the height direction of the inner surface 6d. Due to the stepped portion 6da, the thickness of the casing 6 at the stepped portion 6da is thicker than the thickness of the casing 6 at the upper end portion 6a of the casing 6, that is, the distance between the inner surface 6d and the outer surface 6e of the casing 6. One end portion of the lead wire 8 made of a copper plate is exposed and attached to the stepped portion 6da. One end of the lead wire 8 exposed on the stepped portion 6 da of the inner surface 6 d of the case 6 is electrically connected to the metal foil 2 c of the insulating substrate 2 or the electrode of the semiconductor chip 3 through the bonding wire 9 .
引线8和外壳6通过嵌入成型而一体成形。引线8在外壳6的厚度方向上延伸,另一端部暴露在外壳6的外表面6e的外部。The leads 8 and the case 6 are integrally formed by insert molding. The lead wire 8 extends in the thickness direction of the case 6 , and the other end portion is exposed outside the outer surface 6 e of the case 6 .
在外壳6的内部空间填充有用于密封半导体贴片3等部件的密封材料10。在密封材料10的例子中存在以硅为主要成分的凝胶状的密封材料、由环氧树脂等热固性树脂构成的密封材料。在这些密封材料10的例子中,由热固性树脂构成的密封材料的绝缘性高,耐热性高,因此是优选的,在本实施方式中,对于密封材料10,使用热固性树脂,更为具体地说使用环氧树脂。但是,这并非是要排除凝胶状的密封材料。关于密封材料10,从外壳6的上端部6a的开口向内部空间注入固化前的液状的密封材料10,通过加热来进行固化,由此对半导体贴片3、接合线9等进行密封。The inner space of the housing 6 is filled with a sealing material 10 for sealing components such as the semiconductor chip 3 . Examples of the sealing material 10 include a gel-like sealing material mainly composed of silicon and a sealing material made of a thermosetting resin such as epoxy resin. Among these examples of the sealing material 10, a sealing material made of a thermosetting resin is preferable because of its high insulation and high heat resistance. In this embodiment, a thermosetting resin is used for the sealing material 10, more specifically Said to use epoxy. However, this is not to exclude gel-like sealing materials. As for the sealing material 10 , a liquid sealing material 10 before curing is poured into the internal space from the opening of the upper end portion 6 a of the case 6 , and is cured by heating to seal the semiconductor chip 3 , the bonding wire 9 , and the like.
关于密封材料10的注入量,为了确保接合线9的绝缘性,注入密封材料10以使密封材料10成为能够充分覆盖接合线9那样的高度、具体地说成为至少将接合线9覆盖1mm那样的高度。另一方面,为了实现小型化、薄型化,外壳6在不妨碍绝缘性的范围内具有尽可能薄的高度。因此,以使密封材料10在外壳6内的高度达到外壳6的上表面6c附近那样的规定量注入密封材料10。With regard to the injection amount of the sealing material 10, in order to ensure the insulation of the bonding wire 9, the sealing material 10 is injected so that the sealing material 10 can sufficiently cover the bonding wire 9, specifically so that the bonding wire 9 is covered by at least 1mm. high. On the other hand, in order to achieve miniaturization and thinning, the case 6 has a height as thin as possible within a range that does not interfere with insulation. Therefore, the sealing material 10 is injected in such a predetermined amount that the height of the sealing material 10 in the casing 6 reaches the vicinity of the upper surface 6 c of the casing 6 .
本实施方式的功率半导体组件1在外壳6的上表面6c具有局部突起部6f,使得即使由于注入密封材料10时的该密封材料的流动、或者注入后进行输送时的振动而密封材料10漫到外壳6的上表面6c,也不会引起外观不良。The power semiconductor module 1 of the present embodiment has a partial protrusion 6f on the upper surface 6c of the case 6 so that even if the sealing material 10 spreads due to the flow of the sealing material 10 when the sealing material 10 is injected, or vibration during transportation after injection, The upper surface 6c of the casing 6 also does not cause appearance defects.
使用图2的俯视图来说明该突起部6f的俯视形状。此外,在图2中,为了易于理解本实用新型,省略了半导体贴片3、贴片电容器5、接合线9以及密封材料10的记载。在本实施方式的功率半导体组件1中,在外壳6的一个角部,在沿着外壳的长边方向和短边方向且与该角部相邻的位置处以分离方式各形成一个突起部6f。外壳6具有四个角部,因此总共形成有八个突起部6f。The plan view shape of this protrusion part 6f is demonstrated using the plan view of FIG. 2. FIG. In addition, in FIG. 2, description of the semiconductor chip 3, the chip capacitor 5, the bonding wire 9, and the sealing material 10 is abbreviate|omitted for easy understanding of this invention. In the power semiconductor module 1 of the present embodiment, one protrusion 6f is separately formed at one corner of the case 6 at a position adjacent to the corner along the long-side direction and the short-side direction of the case. The housing 6 has four corners, so a total of eight protrusions 6f are formed.
使用图3、图4对本实施方式的功率半导体组件1的作用效果进行说明。图3是表示密封材料10漫到外壳6的上表面6c时的状况的截面图,图4是表示密封材料10漫到外壳6的上表面6c时的状况的俯视的局部示意图。即使在注入密封材料10时或者注入密封材料10之后且固化前的输送时密封材料10漫到外壳6的上表面6c,密封材料10也会绕到突起部6f的侧面而不会漫到突起部6f的上表面。因而,本实施方式的功率半导体组件1不会发生外观不良。另外,能够使注入密封材料10时的操作性提高。Operation and effect of the power semiconductor module 1 of the present embodiment will be described with reference to FIGS. 3 and 4 . 3 is a cross-sectional view showing the situation when the sealing material 10 spreads to the upper surface 6c of the housing 6, and FIG. Even if the sealing material 10 overflows to the upper surface 6c of the housing 6 when the sealing material 10 is injected or when the sealing material 10 is injected and before curing, the sealing material 10 will go around the side of the protrusion 6f without spreading to the protrusion. The upper surface of 6f. Therefore, the power semiconductor module 1 of the present embodiment does not have appearance defects. In addition, the operability at the time of injecting the sealing material 10 can be improved.
并且,即使在密封材料10漫到外壳6的上表面6c的情况下,也由于密封材料10不会漫到突起部6f,因此本实施方式的功率半导体组件1如在图5中示出安装有盖11的情况下的立体图那样,不会导致粘接固定盖11时的粘接性降低。Moreover, even when the sealing material 10 spreads to the upper surface 6c of the case 6, since the sealing material 10 does not spread to the protrusion 6f, the power semiconductor module 1 of this embodiment is mounted with the As shown in the perspective view in the case of the cover 11 , there is no reduction in the adhesiveness when the cover 11 is bonded and fixed.
在本实施方式的功率半导体组件1中,从能够平坦地支承盖11的观点出发,突起部6f的个数最低为三个即可。如果考虑外壳6的尺寸精度、突起部6f的高度的精度,则为了能够可靠地支承盖11,理想的是如图2所示那样在与角部相邻且沿着外壳长边方向和短边方向的各个边上具有突起部6f。In the power semiconductor module 1 of the present embodiment, from the viewpoint of being able to support the cover 11 flatly, the number of protrusions 6 f may be at least three. In consideration of the dimensional accuracy of the case 6 and the height accuracy of the protrusion 6f, in order to reliably support the cover 11, it is desirable that the corners are adjacent to the corners and along the long and short sides of the case as shown in FIG. 2 . Each side in the direction has a protrusion 6f.
另外,期望将突起部6f的位置设为在对接合线9进行引线接合时与按压夹具不发生干扰的位置。In addition, it is desirable to set the position of the protrusion 6 f to a position where it does not interfere with the pressing jig when the bonding wire 9 is wire-bonded.
将从外壳6的上表面6c起的突起部6f的高度设为即使在密封材料10漫到上表面的情况下也不会漫到突起部6f的高度,0.1mm~1mm左右就足够了。发明人进行验证的结果是,在密封材料10漫到外壳6的上表面6c的情况下,该外壳6的上表面6c的密封材料10的厚度为30μm~80μm左右。因而,如果突起部6f的高度为0.1mm左右以上,则能够避免密封材料10漫到突起部6f上。另外,当突起部6f的高度超过1mm左右时,对使外壳6的高度薄型化所做的贡献少。The height of the protrusion 6f from the upper surface 6c of the housing 6 is such that the protrusion 6f does not overflow even if the sealing material 10 overflows to the upper surface, and about 0.1 mm to 1 mm is sufficient. As a result of verification conducted by the inventors, the thickness of the sealing material 10 on the upper surface 6 c of the housing 6 is about 30 μm to 80 μm when the sealing material 10 spreads to the upper surface 6 c of the housing 6 . Therefore, if the height of the protrusion part 6f is about 0.1 mm or more, it can avoid that the sealing material 10 overflows on the protrusion part 6f. In addition, when the height of the protruding portion 6 f exceeds about 1 mm, there is little contribution to reducing the height of the housing 6 .
如图1所示,外壳6具有如下形状:台阶部6da下方的厚度大于上端部6a的厚度。因此,当用模具使外壳6成型并使温度降低至常温时,在外壳6的上端部6a与下端部6b处热收缩量不同。其结果,外壳6必然具有长边方向中央凸那样的翘曲形状。其翘曲量还取决于外壳的尺寸,但与外壳的长边方向端部相比,中央部高出0.1mm左右。As shown in FIG. 1 , the case 6 has a shape in which the thickness below the stepped portion 6da is greater than the thickness of the upper end portion 6a. Therefore, when the case 6 is molded with a mold and the temperature is lowered to normal temperature, the amount of thermal contraction differs between the upper end portion 6 a and the lower end portion 6 b of the case 6 . As a result, the case 6 necessarily has a warped shape such that the center is convex in the longitudinal direction. The amount of warpage also depends on the size of the case, but the center portion is about 0.1 mm higher than the end portions in the longitudinal direction of the case.
如果考虑这种外壳6的翘曲,则将突起部6f设置在外壳6的上表面6c的长边方向端部附近易于将盖11平坦地支承在外壳6上而使粘接性提高,因此优选。In consideration of such warping of the case 6, it is preferable to provide the protrusion 6f near the end in the longitudinal direction of the upper surface 6c of the case 6 to support the cover 11 flatly on the case 6 and improve the adhesiveness. .
另外,考虑外壳6的翘曲,通过使设置在外壳6的上表面6c的长边方向端部附近的突起部6f的高度与设置在外壳6的上表面6c的靠长边方向中央部的突起部6f的高度相比相对较高,也易于将盖11平坦地支承在外壳6上而使粘接性提高,因此优选。In addition, considering the warpage of the case 6, the height of the protrusion 6f provided near the longitudinal end of the upper surface 6c of the case 6 and the height of the protrusion provided near the longitudinal center of the upper surface 6c of the case 6 are adjusted. The height of the portion 6f is relatively high, and it is also easy to flatly support the cover 11 on the case 6 to improve the adhesiveness, which is preferable.
对于本实施方式的功率半导体组件1,能够代替盖11而在外壳6上载置未图示的平板以用于在该平板上搭载层叠其它部件。如果在平板上搭载层叠其它部件,则能够进行高密度安装。当在外壳6上载置平板时,在以往的功率半导体组件的情况下,如果密封材料漫到外壳6的上表面6c则难以确保平板的平坦性、与外壳6的上表面6c的平行性,与此相对地,本实施方式的功率半导体组件1具有以下效果:即使密封材料漫到外壳6的上表面6c,也由于用突起部6f支承平板,因此能够确保平板的平坦性、与外壳6的上表面6c的平行性。In the power semiconductor module 1 of the present embodiment, instead of the cover 11 , a flat plate (not shown) can be placed on the case 6 for mounting and laminating other components on the flat plate. Mounting and stacking other components on a flat panel enables high-density mounting. When a flat plate is placed on the case 6, in the case of conventional power semiconductor modules, if the sealing material spreads to the upper surface 6c of the case 6, it is difficult to ensure the flatness of the flat plate and the parallelism with the upper surface 6c of the case 6, and In contrast, the power semiconductor module 1 of this embodiment has the following effects: Even if the sealing material spreads to the upper surface 6c of the case 6, since the flat plate is supported by the protrusion 6f, the flatness of the flat plate and the upper surface of the case 6 can be ensured. Parallelism of surface 6c.
另外,在外壳6上载置有平板的功率半导体组件1能够用于以下构造:在平板的上方设置弹簧,通过弹簧的作用力将功率半导体组件1的金属基板2a按压并固定于与该金属基板2a接触的散热片上,由此,能够确保金属基板2a与散热片之间的良好的接触性而提高散热性。在该情况下,功率半导体组件1也具有能够确保平板的平坦性、与外壳6的上表面6c的平行性这样的效果。In addition, the power semiconductor assembly 1 with a flat plate mounted on the housing 6 can be used in the following structure: a spring is provided above the flat plate, and the metal substrate 2a of the power semiconductor assembly 1 is pressed and fixed to the metal substrate 2a by the force of the spring. The metal substrate 2a and the heat radiation fin are in contact with each other, thereby ensuring good contact between the metal substrate 2a and the heat radiation fin, thereby improving heat dissipation. In this case as well, the power semiconductor module 1 has the effect of being able to ensure the flatness of the flat plate and the parallelism with the upper surface 6 c of the case 6 .
使用图6和图7的俯视图来说明外壳6的突起部的变形例。Modifications of the protrusions of the case 6 will be described using the plan views of FIGS. 6 and 7 .
在图6所示的变形例的半导体装置21中,突起部6g在厚度方向上将外壳6的上表面6c分为两个部分且使外表面6e侧的高度比内表面6d侧的高度高。在外壳6的上表面6c的长边方向中央部没有形成该突起部6g。由于在外壳6的上表面6c的长边方向中央部没有形成该突起部6g,因此针对上述的外壳6的翘曲,易于平坦地支承盖11而使粘接性提高。In the modified semiconductor device 21 shown in FIG. 6 , the protrusion 6g divides the upper surface 6c of the case 6 into two parts in the thickness direction, and the height on the outer surface 6e side is higher than that on the inner surface 6d side. The protrusion 6 g is not formed at the center in the longitudinal direction of the upper surface 6 c of the housing 6 . Since the protrusion 6g is not formed in the longitudinal center portion of the upper surface 6c of the case 6, the cover 11 is easily supported flatly against the above-mentioned warping of the case 6, thereby improving adhesiveness.
在图7所示的变形例的半导体装置31中,突起部6h与图2示出的突起部6f相比,在外壳6的上表面6c上的位置大致相同,各突起部6h的厚度在厚度方向上成为二分之一,且在外壳6的外表面6e侧形成了突起部6h。In the semiconductor device 31 of the modified example shown in FIG. 7, the position of the protrusion 6h on the upper surface 6c of the case 6 is substantially the same as that of the protrusion 6f shown in FIG. The direction is halved, and a protrusion 6 h is formed on the outer surface 6 e side of the case 6 .
图6示出的突起部6g和图7示出的突起部6h与图2示出的突起部6f的突起形状不同,但能够将突起的高度设为与图2示出的突起部6f的高度相同。另外,考虑外壳6的翘曲,还能够使设置在外壳6的上表面6c的长边方向端部附近的突起部6g、6h的高度与设置在外壳6的上表面6c的靠长边方向中央部的突起部6g、6h的高度相比相对较高。The protrusion 6g shown in FIG. 6 and the protrusion 6h shown in FIG. 7 are different from the protrusion 6f shown in FIG. 2 in the shape of the protrusion, but the height of the protrusion can be set to the height of the protrusion 6f shown in FIG. same. In addition, considering the warpage of the case 6, the heights of the protrusions 6g, 6h provided near the ends in the longitudinal direction of the upper surface 6c of the case 6 can be adjusted to the height of the protrusions 6g and 6h provided near the center of the upper surface 6c of the case 6 in the longitudinal direction. The height of the protruding portions 6g, 6h is relatively high.
使用图8来说明图6示出的变形例的作用效果,使用图9来说明图7示出的变形例的作用效果。图8、图9是在这些变形例的情况下表示密封材料10漫到外壳6的上表面6c时的状况的俯视的示意图。The operation and effect of the modification shown in FIG. 6 will be described using FIG. 8 , and the operation and effect of the modification shown in FIG. 7 will be described using FIG. 9 . FIG. 8 and FIG. 9 are schematic plan views showing the state when the sealing material 10 spreads over the upper surface 6 c of the case 6 in the case of these modified examples.
如根据图8、图9获知那样,突起部6g、6h的厚度相当于对外壳6的上表面6c的厚度进行分割后的厚度,由于薄,因此即使在注入密封材料10时或者在注入密封材料10后且固化前的输送时密封材料10漫到外壳6的上表面6c,密封材料10也会绕到突起部6g、6h的侧面而不会漫到突起部6g、6h的上表面。因而,本实施方式的功率半导体组件1不会发生外观不良。另外,能够使注入密封材料10时的操作性提高。As can be seen from FIG. 8 and FIG. 9, the thickness of the protrusions 6g, 6h corresponds to the thickness of the upper surface 6c of the housing 6 after dividing the thickness, and since they are thin, even when the sealing material 10 is injected or the sealing material is injected After 10 and before curing, the sealing material 10 diffuses to the upper surface 6c of the casing 6, and the sealing material 10 also wraps around the sides of the protrusions 6g, 6h without spreading to the upper surfaces of the protrusions 6g, 6h. Therefore, the power semiconductor module 1 of the present embodiment does not have appearance defects. In addition, the operability at the time of injecting the sealing material 10 can be improved.
并且,即使密封材料10漫到外壳6的上表面6c,密封材料10也不会漫到突起部6g、6h,因此不会导致粘接固定盖11时的粘接性的降低。Furthermore, even if the sealing material 10 spreads over the upper surface 6c of the case 6, the sealing material 10 does not spread over the protrusions 6g, 6h, so that the adhesiveness of the cover 11 is not reduced.
使用图10的俯视图来说明外壳6的突起部的参考例。A reference example of the protrusion of the case 6 will be described using the plan view of FIG. 10 .
图10所示的参考例的功率半导体组件111具有与图6示出的变形例相似的突起部106g。突起部106g为在厚度方向上将外壳6的上表面6c分为两个部分且使外表面6e侧的高度比内表面6d侧的高度高的突起部106g。该突起部106g遍及整周地形成在外壳6的上表面6c上,这一点与图6示出的突起部6g不同。与图6示出的变形例相比,图10所示的参考例的突起部106g难以将盖11平坦地支承在如上所述那样产生翘曲的外壳6上,粘接性的提高减弱。The power semiconductor module 111 of the reference example shown in FIG. 10 has a protruding portion 106 g similar to that of the modified example shown in FIG. 6 . The protrusion 106g is a protrusion 106g that divides the upper surface 6c of the case 6 into two parts in the thickness direction and makes the height on the outer surface 6e side higher than that on the inner surface 6d side. This protruding portion 106g is different from the protruding portion 6g shown in FIG. 6 in that it is formed over the entire circumference on the upper surface 6c of the case 6 . Compared with the modified example shown in FIG. 6 , it is difficult for the protrusion 106 g of the reference example shown in FIG. 10 to support the cover 11 flatly on the warped case 6 as described above, and the improvement of adhesiveness is weak.
作为比较例,使用图11示出的截面图来说明以往的功率半导体组件101。此外,在图11中,对与图1示出的功率半导体组件1相同的部件附加相同的附图标记,在下面省略重复的说明。As a comparative example, a conventional power semiconductor module 101 will be described using the cross-sectional view shown in FIG. 11 . In addition, in FIG. 11, the same code|symbol is attached|subjected to the same component as the power semiconductor module 1 shown in FIG. 1, and repeated description is abbreviate|omitted below.
图11示出的以往的功率半导体组件101与图1示出的本实用新型的实施方式的功率半导体组件1的不同点在于,在搭载有半导体贴片3的绝缘基板2的周缘安装了外壳106。该外壳106与外壳6的不同点在于,不具有图1示出的本实用新型的实施方式的功率半导体组件1的在外壳6上形成的突起部6f,其它结构相同。The difference between the conventional power semiconductor module 101 shown in FIG. 11 and the power semiconductor module 1 according to the embodiment of the present invention shown in FIG. . The case 106 differs from the case 6 in that it does not have the protruding portion 6 f formed on the case 6 of the power semiconductor module 1 according to the embodiment of the present invention shown in FIG. 1 , and the other structures are the same.
在图12中用截面图示出向上述以往的半导体组件101的外壳106的内部空间注入密封材料10且密封材料10漫到外壳106的上表面的状况,在图13中示出图12的俯视的局部示意图。如果如图12、13所示那样密封材料10漫到外壳106的上表面,则在将盖11放置到外壳106的情况下,该盖11不会被平坦地支承,进行粘接固定时的粘接性劣化,另外,外观不良。In FIG. 12 , the state in which the sealing material 10 is injected into the inner space of the housing 106 of the above-mentioned conventional semiconductor package 101 and the sealing material 10 spreads to the upper surface of the housing 106 is shown in a cross-sectional view. FIG. 13 shows the top view of FIG. 12 Partial schematic. If the sealing material 10 spreads to the upper surface of the case 106 as shown in FIGS. 12 and 13 , when the cover 11 is placed on the case 106, the cover 11 will not be supported flatly, and the adhesion during adhesive fixation will be difficult. The contact property is deteriorated, and the appearance is poor.
Claims (11)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2014-001612 | 2014-03-28 | ||
| JP2014001612U JP3191112U (en) | 2014-03-28 | 2014-03-28 | Semiconductor device and case for semiconductor device |
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| Publication Number | Publication Date |
|---|---|
| CN204558442U true CN204558442U (en) | 2015-08-12 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201520138599.5U Expired - Fee Related CN204558442U (en) | 2014-03-28 | 2015-03-11 | Semiconductor device and semiconductor device shell |
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| JP (1) | JP3191112U (en) |
| CN (1) | CN204558442U (en) |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP6435794B2 (en) * | 2014-11-12 | 2018-12-12 | 富士電機株式会社 | Semiconductor device |
| JP6451257B2 (en) * | 2014-11-21 | 2019-01-16 | 富士電機株式会社 | Semiconductor device |
| JP7676760B2 (en) * | 2020-05-28 | 2025-05-15 | 富士電機株式会社 | Semiconductor device and method for manufacturing the same |
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2014
- 2014-03-28 JP JP2014001612U patent/JP3191112U/en not_active Expired - Fee Related
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