CN203747400U - USB circuit - Google Patents

USB circuit Download PDF

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Publication number
CN203747400U
CN203747400U CN201320870407.0U CN201320870407U CN203747400U CN 203747400 U CN203747400 U CN 203747400U CN 201320870407 U CN201320870407 U CN 201320870407U CN 203747400 U CN203747400 U CN 203747400U
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China
Prior art keywords
tube
power tube
power
circuit
switch
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Expired - Lifetime
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CN201320870407.0U
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Chinese (zh)
Inventor
覃超
张旭光
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BCD Shanghai Micro Electronics Ltd
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BCD Semiconductor Manufacturing Ltd
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Abstract

The utility model discloses a USB circuit. The USB circuit comprises a power supply, a power tube, a charge pump, a USB interface, a clamp circuit and a first resistor. In case of output short circuits or load over-current, the clamp circuit is adopted to clamp the gate-source voltage of the power tube at a preset voltage so as to make the power tube enter a constant current zone. A current source is thus formed. Meanwhile, the power tube will shunt a part of currents generated by input inductance. At the same time, the power tube will provide a part of currents generated by output inductance. Charging currents of an input capacitor and discharging currents of an output capacitor are thus reduced. Overshoot of input voltages and undershoot of output voltages can be further reduced. The power tube which is reliably protected is prevented from being damaged. Later, the first resistor makes the gate voltage of the power tube discharged to 0V. The power tube is then turned off. The power supply and a load are then isolated.

Description

USB circuit
Technical Field
The utility model belongs to the technical field of the power supply, especially, relate to a USB circuit.
Background
USB (Universal Serial Bus) is the most common and popular interface in electronic devices. Peripheral devices of the computer, such as a keyboard, a mouse, a printer, and a scanner, and the MP3, the MP4, and the digital camera may be connected to the computer through USB interfaces.
The existing USB circuit comprises a power supply, a power tube, a charge pump (also called a switched capacitor voltage converter) and a USB interface, wherein the anode of the power supply is connected to a first contact of the USB interface through the power tube, the cathode of the power supply is connected to a second contact of the USB interface, and the control end of the power tube is connected to the charge pump. When the load is connected to the USB interface, the load is connected to the power supply through the first contact and the second contact.
FIG. 1 shows the equivalent of a prior art USB circuit after being connected to a loadCircuit in which the input capacitance CINAnd an output capacitor COUTDistributed capacitance for the conductor, input inductance LINAnd an output inductor LOUTDistributed inductance is created for the wires. When the accessed load is short-circuited or over-current, the conventional protection method is to use the power tube as a hard switch to rapidly turn off (shutdown), so as to isolate the power supply from the load, and enable the USB interface to safely and reliably work.
But because the power supply, the power tube and the load are connected by the conducting wires, the conducting wires have an inductive effect in a power-on state. After the power tube is turned off, the input inductance LINGenerated current ILINWill flow to the input capacitor CINTo make the input voltage VINVoltage Overshoot (Overshoot) occurs; output inductor LOUTGenerated current ILOUTWill be to the output capacitor COUTDischarging to output voltage VOUTA voltage negative pulse (undershot) occurs as shown in fig. 2. Input inductance LINLarger, input capacitance CINThe smaller the input voltage VINThe more severe the voltage overshoot, the output inductance LOUTLarger, output capacitance COUTThe smaller, the output voltage VOUTThe more severe the negative voltage overshoot, the damage to the power tube can be caused once the safe operation area of the power tube is exceeded.
SUMMERY OF THE UTILITY MODEL
In view of this, an object of the present invention is to provide a USB circuit, which can provide reliable protection for a power tube when an output short circuit or a load overcurrent occurs in the USB circuit, so as to prevent the power tube from being damaged.
In order to achieve the above object, the utility model provides a following technical scheme:
the utility model discloses a USB circuit, which comprises a power supply, a power tube, a charge pump, a USB interface, a clamping circuit and a first resistor, wherein the power tube is an N-channel field effect tube;
the positive electrode of the power supply is connected to the drain electrode of the power tube, the first contact of the USB interface is connected to the source electrode of the power tube, the second contact of the USB interface is connected to the negative electrode of the power supply, the negative electrode of the power supply is grounded at the same time, and the charge pump is connected to the grid electrode of the power tube;
the clamping circuit is connected between the grid electrode and the source electrode of the power tube, and clamps the grid source voltage of the power tube at a preset voltage when the USB circuit is in an output short circuit or is in a load overcurrent state, so that the power tube enters a constant current area;
one end of the first resistor is connected to the grid electrode of the power tube, the other end of the first resistor is grounded or connected to the source electrode of the power tube, and the first resistor discharges the grid electrode of the power tube after the power tube enters a constant current region.
Preferably, in the USB circuit, the clamp circuit includes a first switch tube and a second switch tube, and the second switch tube is an N-channel fet;
the input end of the first switching tube is connected to the charge pump and the grid electrode of the power tube at the same time, the control end of the first switching tube is connected to the output end of an external current detection circuit, and when the current detection circuit determines that the USB circuit has output short circuit or load overcurrent, the first switching tube is conducted under the control of the current detection circuit;
the drain electrode of the second switching tube is connected to the output end of the first switching tube, the source electrode of the second switching tube is connected to the source electrode of the power tube, and the grid electrode of the second switching tube is in short circuit with the drain electrode of the second switching tube;
one end of the first resistor is connected to the output end of the first switch tube, and the other end of the first resistor is connected to the source electrode of the power tube.
Preferably, in the USB circuit, the clamp circuit includes a first switch tube and a third switch tube, and the third switch tube is a P-channel fet;
the source electrode of the third switching tube is connected to the charge pump and the grid electrode of the power tube at the same time, the grid electrode of the third switching tube is connected to the source electrode of the power tube, and the drain electrode of the third switching tube is connected to the input end of the first switching tube;
the output end of the first switch tube is grounded, the control end of the first switch tube is connected to the output end of an external current detection circuit, and when the current detection circuit determines that the USB circuit has an output short circuit or a load overcurrent, the first switch tube is conducted under the control of the current detection circuit;
one end of the first resistor is connected to the grid electrode of the power tube, and the other end of the first resistor is connected to the input end of the first switch tube.
Preferably, in the USB circuit, the first switch tube is a triode or a field effect transistor.
Therefore, the utility model has the advantages that: the utility model discloses a USB circuit, when taking place output short circuit or load and overflowing, utilize clamping circuit with the bars source voltage clamp of power tube at default voltage to make the power tube get into the constant current district, thereby form the electric current source. At the moment, the power tube can shunt part of current generated by the input inductor, and meanwhile, the power tube can provide part of current generated by the output inductor, so that the charging current of the input capacitor and the discharging current of the output capacitor are reduced, the voltage overshoot of the input voltage and the negative voltage overshoot of the output voltage are reduced, reliable protection is provided for the power tube, the power tube is prevented from being damaged, then, the grid voltage of the power tube is discharged to 0V through the first resistor, the power tube is turned off, and the power source and the load are isolated.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
FIG. 1 is an equivalent circuit diagram of a conventional USB circuit after being connected to a load;
FIG. 2 is an equivalent circuit diagram of a conventional USB circuit after a load is short-circuited or over-current;
fig. 3 is a schematic structural diagram of a USB circuit disclosed in the present invention;
FIG. 4 is a schematic diagram of the USB circuit of FIG. 3 for power tube protection;
fig. 5 is a schematic structural diagram of another USB circuit disclosed in the present invention;
fig. 6 is a schematic structural diagram of another USB circuit disclosed in the present invention;
fig. 7 is a schematic structural diagram of a current detection circuit disclosed in the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.
The utility model discloses a USB circuit, when USB circuit took place to export short circuit or load and overflows, can prevent that the power tube from being destroyed for the power tube provides reliable protection.
Referring to fig. 3, fig. 3 is a schematic structural diagram of a USB circuit according to the present invention. The USB circuit comprises a power supply V1 and a power tube QOUTThe charge pump 1, the USB interface 2, the clamp circuit 3 and the first resistor R1.
Wherein:
power tube QOUTIs an N-channel field effect transistor. The positive pole of a power supply V1 is connected to the power tube QOUTThe first contact of the USB interface 2 is connected to the power tube QOUTThe second contact of the USB interface 2 is connected to the negative pole of the power supply V1, the negative pole of the power supply V1 is grounded at the same time, and the charge pump 1 is connected to the power tube QOUTA gate electrode of (1).
The clamping circuit 3 is connected with the power tube QOUTWhen the output of the USB circuit is short-circuited or the load is over-current, the clamping circuit 3 clamps the power tube QOUTGate source voltage V ofGS1Clamping at a preset voltage to enable the power tube QOUTInto the constant current region (also referred to as the saturation region).
One end of the first resistor R1 and the power tube QOUTIs connected to the grid, the other end is grounded or connected to the power tube QOUTAt the source of the power transistor QOUTAnd discharging the grid electrode after entering the constant current region.
The following is about the power tube Q of the USB circuit pair shown in FIG. 3OUTThe principle of protection will be explained.
When the USB circuit is in output short circuit or load overcurrent, the clamping circuit 3 clamps the power tube QOUTThe gate-source voltage is clamped at a preset voltage VGS1The preset voltage satisfies VP1<VGS1Less than or equal to 0 and VDS1≥VGS1-VP1In which V isP1Is a power tube QOUTPinch-off voltage of VDS1Is a power tube QOUTSource and drain ofVoltage to make the power tube QOUTEnters a constant current region, and then the power tube QOUTThe equivalent circuit of the USB circuit, which is a current source, is shown in fig. 4.
Input inductance LINGenerated current ILINOne part passes through a power tube QOUTCurrent of (I)SAFEFlows away, and another part is opposite to the input capacitor CINCharging with a charging current ICIN=ILIN-ISAFE,ISAFEThe larger the input capacitance CINThe smaller the charging current, the lower the input voltage VINThe smaller the Overshoot voltage (Overshoot voltage) of. Output inductor LOUTGenerated current ILOUTOne part is composed of a power tube QOUTCurrent of (I)SAFEProviding another part of the current to the output capacitor COUTDischarging with a discharge current ICOUT=ILOUT-ISAFE,ISAFEThe larger the output capacitance COUTThe smaller the current discharged, the lower the output voltage VOUTThe smaller the Undershoot voltage (undershot voltage).
Output short circuit or load overcurrent from the USB circuit to the power tube Q through the clamping circuit 3OUTThe faster the response of the current source is, the shorter the response time is, and the input inductance L is maintainedINAnd an output inductor LOUTThe smaller the peak current is, the better the subsequent overcurrent protection is, so that the input voltage V isINAnd the output voltage VOUTThe undershoot voltage is smaller.
At the power tube QOUTAfter entering the constant current region, the first resistor R1 is used for the power tube QOUTThe grid electrode of the power tube Q discharges, and when the grid electrode voltage discharges to 0V, the power tube QOUTOff, isolating the supply V1 from the load.
The utility model discloses a USB circuit, when taking place output short circuit or load and overflowing, utilize clamping circuit 3 with power tube QOUTThe gate-source voltage of the transistor is clamped at a preset voltage so that the power tube QOUTInto the constant current region to form electricityA flow source. At this time, the power tube QOUTWill shunt part of the current from the input inductor LINGenerated current ILINSynchronous power tube QOUTWill provide a portion of the output inductance LOUTThe generated current, thereby reducing the input capacitance CINCharging current and output capacitor COUTThereby reducing voltage overshoot of the input voltage and negative voltage overshoot of the output voltage, and forming the power transistor QOUTProvide reliable protection to prevent the power tube from being damaged, and then the first resistor R1 connects the power tube QOUTThe grid voltage is discharged to 0V, and the power tube Q is turned offOUTIsolating the power supply V1 from the load.
Referring to fig. 5, fig. 5 is a schematic structural diagram of a USB circuit according to the present invention. The USB circuit comprises a power supply V1 and a power tube QOUTThe charge pump 1, the USB interface 2, the clamp circuit 3 and the first resistor R1.
Wherein:
power tube QOUTIs an N-channel field effect transistor. The positive pole of a power supply V1 is connected to the power tube QOUTThe first contact of the USB interface 2 is connected to the power tube QOUTThe second contact of the USB interface 2 is connected to the negative pole of the power supply V1, the negative pole of the power supply V1 is grounded at the same time, and the charge pump 1 is connected to the power tube QOUTA gate electrode of (1).
The clamping circuit 3 comprises a first switch tube Q1 and a second switch tube Q2. The first switch Q1 may be a triode or a fet, and the second switch Q2 is an N-channel fet. The input end of the first switch tube Q1 is connected to the charge pump 1 and the power tube Q simultaneouslyOUTWhen the current detection circuit 4 determines that the output short circuit or the load overcurrent occurs in the USB circuit, the first switch tube Q1 is turned on under the control of the current detection circuit 4. The drain of the second switch transistor Q2 is connected to the output terminal of the first switch transistor Q1, and the source of the second switch transistor Q2 is connected to the power transistor QOUTThe gate of the second switch Q2 is shorted to the drain of the second switch Q2.
One end of the first resistor R1 is connected to the output end of the first switch tube Q1, and the other end is connected to the power tube QOUTOf the substrate. That is, one end of the first resistor R1 is connected to the power transistor Q via the first switch transistor Q1OUTThe other end of the first resistor R1 is connected to the power tube QOUTOf the substrate. When the first switch transistor Q1 is turned on, the first resistor R1 couples the power transistor QOUTThe grid of the power transistor Q is discharged, thereby turning off the power transistor QOUTAnd realizing the power supply V1 and the load.
When the current detection circuit 4 detects that the output of the USB circuit is short-circuited or the load is over-current, the current detection circuit 4 outputs a control signal to the first switch Q1 to control the first switch Q1 to be turned on.
After the first switch tube Q1 is turned on, the power tube QOUTThe grid voltage of the power tube Q is pulled downOUTGate source voltage V ofGS1=VGS2,VGS2The gate-source voltage of the second switch tube Q2, the power tube QOUTEntering a constant current region to form a current source, wherein the current magnitude is as follows:
IDS1=1/2×μn×COX×W/L×(VGS1-VTHN)2
wherein,μnis a power tube QOUTCarrier mobility of (2), COXIs a power tube QOUTThe thickness of the gate oxide is W is the power tube QOUTL is the power tube QOUTLength of channel of (V)THNIs a power tube QOUTThe threshold voltage of (2).
The first resistor R1 is used for the power tube QOUTWhen the grid voltage drops to 0V, the power tube is turned off, and the power supply V1 is isolated from the load.
Referring to fig. 6, fig. 6 is a schematic structural diagram of a USB circuit according to the present invention. The USB circuit comprises a power supply V1 and a power tube QOUTCharge pump 1, USB interface 2, clamp circuit3 and a first resistor R1.
Wherein:
power tube QOUTIs an N-channel field effect transistor. The positive pole of a power supply V1 is connected to the power tube QOUTThe first contact of the USB interface 2 is connected to the power tube QOUTThe second contact of the USB interface 2 is connected to the negative pole of the power supply V1, the negative pole of the power supply V1 is grounded at the same time, and the charge pump 1 is connected to the power tube QOUTA gate electrode of (1).
The clamping circuit 3 comprises a first switching tube Q1 and a third switching tube Q3. The first switching tube Q1 may be a triode or a fet, and the third switching tube Q3 is a P-channel fet. The source of the third switch tube Q3 is connected to the charge pump 1 and the power tube Q simultaneouslyOUTThe gate of the third switching tube Q3 is connected to the power tube QOUTAnd the drain of the third switching tube Q3 is connected to the input terminal of the first switching tube Q1. The output end of the first switch tube Q1 is grounded, the control end of the first switch tube Q1 is connected to the output end of the external current detection circuit 4, and when the current detection circuit 4 determines that the output short circuit or the load overcurrent occurs in the USB circuit, the first switch tube Q1 is turned on under the control of the current detection circuit.
One end of the first resistor R1 is connected to the power tube QOUTAnd the other end of the second switch is connected to the input end of the first switch tube Q1. That is, one end of the first resistor R1 is connected to the power transistor QOUTThe other end of the first switch tube Q1 is grounded. When the first switch transistor Q1 is turned on, the first resistor R1 couples the power transistor QOUTThe grid of the power transistor Q is discharged, thereby turning off the power transistor QOUTAnd realizing the power supply V1 and the load.
When the current detection circuit 4 detects that the output of the USB circuit is short-circuited or the load is over-current, the current detection circuit 4 outputs a control signal to the first switch Q1 to control the first switch Q1 to be turned on.
After the first switch tube Q1 is turned on, the power tube QOUTIs pulled down to VOUT+VP,VPIs the gate-source voltage of the third switching tube Q3, i.e. the power tube QOUTHas a gate-source voltage of VPAt this time, the power tube QOUTEntering a constant current region to form a current source, wherein the current magnitude is as follows:
IDS2=1/2×μn×COX×W/L×(VP-VTHN)2
wherein, munIs a power tube QOUTCarrier mobility of (2), COXIs a power tube QOUTThe thickness of the gate oxide is W is the power tube QOUTL is the power tube QOUTLength of channel of (V)THNIs a power tube QOUTThe threshold voltage of (2).
The first resistor R1 is used for the power tube QOUTWhen the grid voltage drops to 0V, the power tube is turned off, and the power supply V1 is isolated from the load.
The first switching transistor Q1 may be a triode or a field effect transistor. When the first switching transistor Q1 is an NPN transistor, its input terminal is a collector, its output terminal is an emitter, and its control terminal is a base. When the first switch Q1 is a PNP transistor, its input terminal is an emitter, its output terminal is a collector, and its control terminal is a base. When the first switch Q1 is an N-channel fet, the input terminal is a drain, the output terminal is a source, and the control terminal is a gate. When the first switch Q1 is a P-channel fet, the input terminal is a source, the output terminal is a drain, and the control terminal is a gate.
In addition, in the above embodiments of the present invention, the USB circuit is implemented based on the original current detection circuit 4 in the electronic device. However, when the electronic device itself does not have a current detection circuit, the current detection circuit may be provided in the USB circuit.
The current detection circuit 4 compares the current value flowing through the load with the current reference value, determines that the USB circuit has an output short circuit or a load overcurrent when the current value flowing through the load is greater than the current reference value, and outputs a control signal to the first switch tube Q1 to control the first switch tube Q1 to be turned on. When the first switch Q1 uses a different switching device, the current detection circuit 4 outputs a control signal corresponding to the switching device to control the first switch Q1 to conduct. Specifically, when the first switch Q1 is an NPN transistor or an N-channel fet, the current detection circuit 4 outputs a high level signal to drive the first switch Q1 to turn on. When the first switch Q1 is a PNP transistor or a P-channel fet, the current detection circuit 4 outputs a low signal to turn on the first switch Q1.
The current detection circuit 4 can adopt multiple structures to realize, the utility model discloses a current detection circuit's structure, please see fig. 7, current detection circuit includes comparator 41, loop compensation circuit 42 and drive circuit 43.
Wherein:
one input terminal of the comparator 41 is connected to a reference current value, and the other input terminal of the comparator 41 is connected to a detected current value flowing through the load. The non-inverting input of the comparator 41 is connected to a reference current value IREFThe reverse phase input end is connected with a detection current value ISENSE. Of course, the positive input terminal of the comparator 41 may be connected to the detected current value, and the negative input terminal may be connected to the reference current value, as long as the structure of the driving circuit is adjusted according to the type of the first switching tube.
The loop compensation circuit 42 comprises a second resistor R2 and a capacitor C1, wherein a first end of the second resistor R2 and a first end of the capacitor C1 are simultaneously connected to the output end of the comparator, and a second end of the second resistor R2 and a second end of the capacitor C1 are simultaneously grounded. The loop compensation circuit 42 frequency-compensates the signal output from the comparator 41.
The input end of the driving circuit 43 is connected to the output end of the comparator 41, the output end is connected to the control end of the first switch tube, and the driving circuit 43 processes the signal output by the comparator 41 when the detected current value is determined to be greater than the reference current value, so as to drive the first switch tube to be conducted.
When the current flowing through the load is greater than the reference current value, the comparator 41 determines that the USB circuit has an output short circuit or a load overcurrent, outputs a corresponding signal, the signal is frequency compensated by the loop compensation circuit 42, and then the compensated signal is processed by the driving circuit 43 to control the conduction of the first switching tube.
The embodiments in the present description are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (4)

1. A USB circuit is characterized by comprising a power supply, a power tube, a charge pump, a USB interface, a clamping circuit and a first resistor, wherein the power tube is an N-channel field effect tube;
the positive electrode of the power supply is connected to the drain electrode of the power tube, the first contact of the USB interface is connected to the source electrode of the power tube, the second contact of the USB interface is connected to the negative electrode of the power supply, the negative electrode of the power supply is grounded at the same time, and the charge pump is connected to the grid electrode of the power tube;
the clamping circuit is connected between the grid electrode and the source electrode of the power tube, and clamps the grid source voltage of the power tube at a preset voltage when the USB circuit is in an output short circuit or is in a load overcurrent state, so that the power tube enters a constant current area;
one end of the first resistor is connected to the grid electrode of the power tube, the other end of the first resistor is grounded or connected to the source electrode of the power tube, and the first resistor discharges the grid electrode of the power tube after the power tube enters a constant current region.
2. The USB circuit according to claim 1, wherein the clamp circuit comprises a first switch tube and a second switch tube, and the second switch tube is an N-channel field effect transistor;
the input end of the first switching tube is connected to the charge pump and the grid electrode of the power tube at the same time, the control end of the first switching tube is connected to the output end of an external current detection circuit, and when the current detection circuit determines that the USB circuit has output short circuit or load overcurrent, the first switching tube is conducted under the control of the current detection circuit;
the drain electrode of the second switching tube is connected to the output end of the first switching tube, the source electrode of the second switching tube is connected to the source electrode of the power tube, and the grid electrode of the second switching tube is in short circuit with the drain electrode of the second switching tube;
one end of the first resistor is connected to the output end of the first switch tube, and the other end of the first resistor is connected to the source electrode of the power tube.
3. The USB circuit according to claim 1, wherein the clamp circuit comprises a first switch tube and a third switch tube, and the third switch tube is a P-channel field effect transistor;
the source electrode of the third switching tube is connected to the charge pump and the grid electrode of the power tube at the same time, the grid electrode of the third switching tube is connected to the source electrode of the power tube, and the drain electrode of the third switching tube is connected to the input end of the first switching tube;
the output end of the first switch tube is grounded, the control end of the first switch tube is connected to the output end of an external current detection circuit, and when the current detection circuit determines that the USB circuit has an output short circuit or a load overcurrent, the first switch tube is conducted under the control of the current detection circuit;
one end of the first resistor is connected to the grid electrode of the power tube, and the other end of the first resistor is connected to the input end of the first switch tube.
4. The USB circuit according to claim 2 or 3, wherein the first switch transistor is a triode or a field effect transistor.
CN201320870407.0U 2013-12-26 2013-12-26 USB circuit Expired - Lifetime CN203747400U (en)

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Application Number Priority Date Filing Date Title
CN201320870407.0U CN203747400U (en) 2013-12-26 2013-12-26 USB circuit

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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105207027A (en) * 2015-06-30 2015-12-30 深圳市共进电子股份有限公司 USB with external equipment protection circuit
CN107017758A (en) * 2016-01-15 2017-08-04 恩智浦有限公司 Controller
CN108808643A (en) * 2018-05-31 2018-11-13 上海艾为电子技术股份有限公司 A kind of analog switching circuit
CN109873404A (en) * 2019-03-15 2019-06-11 珠海市杰理科技股份有限公司 Power tube anti-backflow circuit and voltage regulator chip
CN111277042A (en) * 2020-02-17 2020-06-12 上海艾为电子技术股份有限公司 Chip and dual-power supply circuit
CN111355370A (en) * 2019-12-16 2020-06-30 上海南芯半导体科技有限公司 Medium-power low-cost charge pump charging method

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105207027A (en) * 2015-06-30 2015-12-30 深圳市共进电子股份有限公司 USB with external equipment protection circuit
CN105207027B (en) * 2015-06-30 2017-09-29 深圳市共进电子股份有限公司 A kind of USB with external equipment protection circuit
CN107017758A (en) * 2016-01-15 2017-08-04 恩智浦有限公司 Controller
US10587184B2 (en) 2016-01-15 2020-03-10 Nxp B.V. Charge pump circuit driving a load connection switch
CN107017758B (en) * 2016-01-15 2020-12-01 恩智浦有限公司 Controller
CN108808643A (en) * 2018-05-31 2018-11-13 上海艾为电子技术股份有限公司 A kind of analog switching circuit
CN109873404A (en) * 2019-03-15 2019-06-11 珠海市杰理科技股份有限公司 Power tube anti-backflow circuit and voltage regulator chip
CN111355370A (en) * 2019-12-16 2020-06-30 上海南芯半导体科技有限公司 Medium-power low-cost charge pump charging method
CN111277042A (en) * 2020-02-17 2020-06-12 上海艾为电子技术股份有限公司 Chip and dual-power supply circuit

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