CN203278208U

CN203278208U - Electronic overload relay capable of improving phase loss protection reliability

Info

Publication number: CN203278208U
Application number: CN 201320266177
Authority: CN
Inventors: 史祺; 于君
Original assignee: Tianjin Baili Electronic Co Ltd
Current assignee: Tianjin Baili Electronic Co Ltd
Priority date: 2013-05-16
Filing date: 2013-05-16
Publication date: 2013-11-06
Anticipated expiration: 2023-05-16

Abstract

The utility model relates to an electronic overload relay capable of improving phase loss protection reliability. The phase loss protection circuit of the relay comprises a pin interface of a three-phase mutual inductor output end, three rectifier bridges for rectification, three diodes, a voltage stabilizing tube, a resistor, a capacitor, and pin interfaces of two intersection gate circuits and an INT of a single-chip microcomputer. The relay utilizes the principle that an intersection gate logical operation circuit determines a three-phase voltage signal in the phase loss protection circuit. The relay greatly improves the reliability of the phase loss protection function, and is characterized by using few electronic elements and having simple structure and low cost.

Description

Can improve the electronic overload relay of open phase protection reliability

Technical field

It is a kind of that the utility model belongs to, and particularly relates to a kind of electronic overload relay that improves the open phase protection reliability.

Background technology

To have adopted from three phase acquisition half-wave voltage signal at present known electronic overload relay phase failure protection function; through electric resistance partial pressure; send into the principle that operational amplifier and voltage reference value compare judgement; this principle is had relatively high expectations to the accuracy that gathers waveform; to the instrument transformer precision require high; the reliability of phase failure protection function is lower, and the protection precision is not easy to guarantee.

Summary of the invention

The utility model provides a kind of reliable, the electronic overload relay of improved open phase protection reliability simple in structure for solving the technical problem that exists in known technology.

the technical scheme that the utility model is taked for the technical problem that exists in the solution known technology is: it includes an open-phase protection circuit, it includes described open-phase protection circuit, the INT pin interface of single-chip microcomputer, first, second, the 3rd instrument transformer (CT1, CT2, CT3) electric signal input end of output, first, second, the 3rd rectifier bridge (D1, D2, D3), first, two, three, four, five, six, seven, eight, nine resistance (R1, R2, R3, R4, R5, R6, R7, R8, R9), first, two, three, four, five, six electric capacity (C1, C2, C3, C4, C5, C6), the 4th, five, six diode (D4, D5, D6), voltage-stabiliser tube (D7), first, the second AND circuit (U1, U2), the electric signal input end of the output of described first, second, third instrument transformer (CT1, CT2, CT3) connects respectively the ac input end of described first, second, third rectifier bridge (D1, D2, D3), positive output end in the dc output end of described first, second, third rectifier bridge (D1, D2, D3) connects respectively the positive pole of described the 4th, the 5th, the 6th diode (D4, D5, D6), negative output terminal connects respectively the end of described first, second, third resistance (R1, R2, R3), another termination GND of described first, second, third resistance (R1, R2, R3), the negative electrode of described voltage-stabiliser tube (D7) meets negative pole and the VCC of described the 4th, the 5th, the 6th diode (D4, D5, D6), and the anode of described voltage-stabiliser tube (D7) meets GND, described the 4th, the 5th, the 6th electric capacity (C4, C5, C6) is parallel to the two ends of described voltage-stabiliser tube (D7), the common port of described the 4th, the 5th resistance of the A termination of described the first AND circuit (U1) (R4, R5), the positive pole of described the 4th diode of another termination of described the 4th resistance (R4) (D4), another termination GND of described the 5th resistance (R5), described the first electric capacity (C1) is connected in parallel on the two ends of described the 5th resistance (R5), the common port of described the 6th, the 7th resistance of the B termination of described the first AND circuit (U1) (R6, R7), the positive pole of described the 5th diode of another termination of described the 6th resistance (R6) (D5), another termination GND of described the 7th resistance (R7), described the second electric capacity (C2) is connected in parallel on the two ends of described the 7th resistance (R7), the common port of described the 8th, the 9th resistance of the A termination of described the second AND circuit (U2) (R8, R9), the positive pole of described the 6th diode of another termination of described the 8th resistance (R8) (D6), another termination GND of described the 9th resistance (R9), described the 3rd electric capacity (C3) is connected in parallel on the two ends of described the 9th resistance (R9), the Y end of described the first AND circuit of the B termination of described the second AND circuit (U2) (U1), the INT pin interface of the described single-chip microcomputer of Y termination of described the second AND circuit (U2).

Advantage and the good effect that the utlity model has are: owing to having adopted the principle that judges three-phase voltage signal with the gate logic computing circuit in open-phase protection circuit; Very large raising the reliability of phase failure protection function, and have and use electronic component few, simple in structure, lower-cost characteristics.

Description of drawings

Fig. 1 is circuit theory diagrams of the present utility model.

Embodiment

For further understanding summary of the invention of the present utility model, Characteristic, hereby exemplify following examples, and coordinate accompanying drawing to be described in detail as follows:

As shown in Figure 1, the output of instrument transformer T1, T2, T3 connects respectively the ac input end of rectifier bridge D1, D2, D3; Positive output end in the dc output end of rectifier bridge D1, D2, D3 connects respectively the positive pole of diode D4, D5, D6, and negative output terminal is the end of connecting resistance R1, R2, R3 respectively, another termination GND of resistance R 1, R2, R3; The negative electrode of voltage-stabiliser tube D7 connects the negative pole of diode D4, D5, D6 and connects, and the anode of voltage-stabiliser tube D7 meets GND; Capacitor C 4, C5, C6 are parallel to the two ends of voltage-stabiliser tube D7; The A terminating resistor R4 of AND circuit U1, the common port of R5, the positive pole of another terminating diode D4 of resistance R 4, another termination GND of resistance R 5, electric C1) be connected in parallel on the two ends of resistance R 5; The B terminating resistor R6 of AND circuit U1, the common port of R7, the positive pole of another terminating diode D5 of resistance R 6, another termination GND of resistance R 7, capacitor C 2 is connected in parallel on the two ends of resistance R 7; The A terminating resistor R8 of AND circuit U2, the common port of R9, the positive pole of another terminating diode D6 of resistance R 8, another termination GND of resistance R 9, capacitor C 3 is connected in parallel on the two ends of resistance R 9; The Y end of the B termination AND circuit U1 of AND circuit U2, the INT pin interface of the Y termination single-chip microcomputer of AND circuit U2.

The electric current that Current Transmit 1, CT2, CT3 induce is after process rectifier bridge D1, D2, D3 rectification, positive output end in the dc output end of rectifier bridge D1, D2, D3 connects respectively the positive pole of diode D4, D5, D6, negative output terminal is the end of connecting resistance R1, R2, R3 respectively, another termination GND of resistance R 1, R2, R3; The negative electrode of voltage-stabiliser tube D7 connects the negative pole of diode D4, D5, D6, and the anode of voltage-stabiliser tube D7 meets GND; Capacitor C 4, C5, C6 are parallel to the two ends of voltage-stabiliser tube D7, and through voltage stabilizing and the capacitor C 4 of voltage-stabiliser tube D7, C5 produces a galvanic current and presses VCC after C6 filtering.

In normal situation, the electric current that Current Transmit 1 induces produces through the common port in resistance R 4 and resistance R 5 after resistance R 4, resistance R 5 dividing potential drops and C1 capacitor filtering the A end that a stable high level signal enters into AND circuit U1 after process rectifier bridge D1 rectification; The electric current that Current Transmit 2 induces produces through the common port in resistance R 6 and resistance R 7 after resistance R 6, resistance R 7 dividing potential drops and C2 capacitor filtering the B end that a stable high level signal enters into AND circuit U1 after process rectifier bridge D2 rectification; The electric current that Current Transmit 3 induces produces through the common port in resistance R 8 and resistance R 9 after resistance R 8, resistance R 9 dividing potential drops and C3 capacitor filtering the A end that a stable high level signal enters into AND circuit U2 after process rectifier bridge D3 rectification; According to AND circuit logical operation rule, the Y end of AND circuit U1 is exported high level signal, and enters into the B end of AND circuit U2, the Y end output high level signal of AND circuit U2, and this moment, electronic overload relay did not carry out open phase protection, and relay is failure to actuate.

electric current as Current Transmit 1 induction is 0, when Current Transmit 2 summation current transformer CT3 are in normal operating conditions, Current Transmit 1 induction produces the A end that a low level signal enters AND circuit U1, Current Transmit 2 inductions produce the B end that a high level signal enters AND circuit U1, according to the gate logic operation rule, the Y end of AND circuit U1 is exported a low level signal and is entered the B end of AND circuit U2, Current Transmit 3 inductions produce the A end that a high level signal enters AND circuit U2, according to the gate logic operation rule, low level signal of Y end output of AND circuit U2 enters single-chip microcomputer INT pin interface, this moment, electronic overload relay carried out open phase protection, the actuating of relay.

electric current as Current Transmit 2 inductions is 0, when Current Transmit 1 and CT3 are in normal operating conditions, Current Transmit 1 induction produces the A end that a high level signal enters AND circuit U1, Current Transmit 2 inductions produce the B end that a low level signal enters AND circuit U1, according to the gate logic operation rule, the Y end of AND circuit U1 is exported a low level signal and is entered the B end of AND circuit U2, Current Transmit 3 inductions produce the A end that a high level signal enters AND circuit U2, according to the gate logic operation rule, low level signal of Y end output of AND circuit U2 enters single-chip microcomputer INT pin interface, this moment, electronic overload relay carried out open phase protection, the actuating of relay.

electric current as Current Transmit 3 inductions is 0, when Current Transmit 1 and CT2 are in normal operating conditions, Current Transmit 1 induction produces the A end that a high level signal enters AND circuit U1, Current Transmit 2 inductions produce the B end that a high level signal enters AND circuit U1, according to the gate logic operation rule, the Y end of AND circuit U1 is exported a high level signal and is entered the B end of AND circuit U2, Current Transmit 3 inductions produce the A end that a low level signal enters AND circuit U2, according to the gate logic operation rule, low level signal of Y end output of AND circuit U2 enters single-chip microcomputer INT pin interface, this moment, electronic overload relay carried out open phase protection, the actuating of relay.

Claims

1. electronic overload relay that can improve the open phase protection reliability, it includes an open-phase protection circuit, it is characterized in that: it includes described open-phase protection circuit, the INT pin interface of single-chip microcomputer, first, second, the 3rd instrument transformer (CT1, CT2, CT3) electric signal input end of output, first, second, the 3rd rectifier bridge (D1, D2, D3), first, two, three, four, five, six, seven, eight, nine resistance (R1, R2, R3, R4, R5, R6, R7, R8, R9), first, two, three, four, five, six electric capacity (C1, C2, C3, C4, C5, C6), the 4th, five, six diode (D4, D5, D6), voltage-stabiliser tube (D7), first, the second AND circuit (U1, U2), the electric signal input end of the output of described first, second, third instrument transformer (CT1, CT2, CT3) connects respectively the ac input end of described first, second, third rectifier bridge (D1, D2, D3), positive output end in the dc output end of described first, second, third rectifier bridge (D1, D2, D3) connects respectively the positive pole of described the 4th, the 5th, the 6th diode (D4, D5, D6), negative output terminal connects respectively the end of described first, second, third resistance (R1, R2, R3), another termination GND of described first, second, third resistance (R1, R2, R3), the negative electrode of described voltage-stabiliser tube (D7) meets negative pole and the VCC of described the 4th, the 5th, the 6th diode (D4, D5, D6), and the anode of described voltage-stabiliser tube (D7) meets GND, described the 4th, the 5th, the 6th electric capacity (C4, C5, C6) is parallel to the two ends of described voltage-stabiliser tube (D7), the common port of described the 4th, the 5th resistance of the A termination of described the first AND circuit (U1) (R4, R5), the positive pole of described the 4th diode of another termination of described the 4th resistance (R4) (D4), another termination GND of described the 5th resistance (R5), described the first electric capacity (C1) is connected in parallel on the two ends of described the 5th resistance (R5), the common port of described the 6th, the 7th resistance of the B termination of described the first AND circuit (U1) (R6, R7), the positive pole of described the 5th diode of another termination of described the 6th resistance (R6) (D5), another termination GND of described the 7th resistance (R7), described the second electric capacity (C2) is connected in parallel on the two ends of described the 7th resistance (R7), the common port of described the 8th, the 9th resistance of the A termination of described the second AND circuit (U2) (R8, R9), the positive pole of described the 6th diode of another termination of described the 8th resistance (R8) (D6), another termination GND of described the 9th resistance (R9), described the 3rd electric capacity (C3) is connected in parallel on the two ends of described the 9th resistance (R9), the Y end of described the first AND circuit of the B termination of described the second AND circuit (U2) (U1), the INT pin interface of the described single-chip microcomputer of Y termination of described the second AND circuit (U2).