CN1355564A - Semiconductor package and manufacturing method thereof - Google Patents
Semiconductor package and manufacturing method thereof Download PDFInfo
- Publication number
- CN1355564A CN1355564A CN00132544.2A CN00132544A CN1355564A CN 1355564 A CN1355564 A CN 1355564A CN 00132544 A CN00132544 A CN 00132544A CN 1355564 A CN1355564 A CN 1355564A
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- CN
- China
- Prior art keywords
- lead frame
- chip
- semiconductor package
- wafer
- heat sink
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Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/874—On different surfaces
- H10W72/884—Die-attach connectors and bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink
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- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
A semiconductor package is composed of a chip with active surface, a lead frame with the first and the second surfaces, a chip holder with the first surface for fixing the chip and multiple pins electrically connected to the active surface by wire bonding, a package colloid for sealing the chip and the lead frame, and a heat radiating plate adhered to the second surface of the chip holder and the pins by a thermally conductive adhesive. The utility model is suitable for the manufacture of thin products, and the heat generated by the wafer can be discharged outside the atmosphere through the radiating fin and can also be discharged through the leads and the connected printed circuit board.
Description
The present invention relates to a kind of semiconductor package part, especially relate to a kind of semiconductor package part and manufacture method thereof of strengthening heat sinking function.
For semiconductor packaging, how properly solving the wafer heat dissipation problem is a very important problem.The packaging part of bad cooling mechanism not only may cause the misoperation of wafer, reduces the reliability (reliability) of product, also may increase many costs of manufacture.
Fig. 1 is a known built-in type fin (Drop-in Heat Sink that inserts; DHS) packaging part is disclosed in U.S. Patent number 5,225, in 710 the patent specification.This packaging part comprises: a wafer (die) 12, this wafer 12 be with a wafer sticker (die attachadhesive) 15, and elargol (silver paste) for example is bonded to first 141 an of wafer holder (die pad) 14; A most lead foot 13 are with most routings (bonding wire) 17, and for example gold thread is electrically connected on the active surface (active surface) 121 of this wafer 12; This wafer holder 14 and this majority lead foot 13 are the part of a lead frame (laeadframe); One fin (heatsind) 16 is positioned at the inside of counterdie 19, and it contacts with second 142 of this wafer holder, and is provided with most contact points 161 and 162 on the bottom surface of this counterdie 19; One packing colloid (encapsulant) 11 is injected into behind patrix 18 and counterdie 19 matched moulds, with the die cavity of this packaging part of filling.The technical characterictic of the packaging part of this known techniques is that the heat that produced of this wafer 12 can be via this wafer holder 14, again via this fin 16 that conforms to this wafer holder 14 dissipation in atmosphere,
Fig. 2 is a known exposed type fin (Exposed Drop-in HeatSink that inserts; EDHS) packaging part is disclosed in U.S. Patent number 5,381, in 042 the patent specification.With Fig. 1 built-in insert type fin packaging part different be that this exposed packaging part of inserting the type fin is to use the smooth fin in a bottom surface 21 directly to expose to the bottom surface of this semiconductor package part, replace aforesaid fin 16 with most contact points 161 and 162 these semiconductor package part bottom surfaces of contact.This exposed type fin 21 of inserting, this built-in type fin 16 of inserting is big because of the air contact area of heat when the dissipation, so radiating effect is also preferable relatively.
But no matter be built-inly to insert the type fin or exposed packaging part of inserting the type fin all has following shortcoming:
1. after in manufacture process, must inserting this fin in the counterdie 19 earlier, again this wafer holder 14 is aimed at (align) on this fin, equaled to increase the step of making together, therefore increase the cycle period (cycle time) of whole process of production, and reduced the output (throughput) of unit interval.
2. this built-in exposed type fin 21 of inserting of type fin 16 or this of inserting is coated by this packing colloid 11, because of both have different materials, that is has different thermal coefficient of expansions (Coefficient Thermal Expansion; CTE).Can produce a thermal stress (thermal stress) effect at the contact-making surface of back that expand with heat and contract with cold, and cause this packing colloid 11 and this fin 16 or 21 to have the phenomenon of delamination (delamination) to take place at both.And because of this packing colloid 11, unequal because of patrix 18 with the glue amount of counterdie 19, in cooled contraction strength difference, therefore cause whole packaging part to have the phenomenon of distortion (warpage) to take place.Extraneous aqueous vapor will be infiltrated by the slit after this delamination or the distortion, and influence this semiconductor package part in the reliability of using in the future.
3. in addition, when injecting this packing colloid 11, this fin 21 is that four by this lead frame are positioned at cornerwise support bar (tie bar) and are fixed (scheming not shown).This fin 21 may not enough be oppressed and fix to the chucking power of these four support bars, therefore after finishing the process of injecting glue, at the bottom surface of this packaging part meeting residual excessive glue (falsh-over), and need carry out an action of removing the glue (defalsh) that overflows.Therefore needing increases the step of making together in addition, and manufacturing cost is increased.
4. the heat dissipation path of above-mentioned two kinds of known techniques is by this wafer 12, and via this wafer holder 14, via this fin 16 or 21, dissipation is gone out by atmosphere at last again.Because heat dissipation path is limited, for example can not utilize the heat dissipation path of this majority lead foot, therefore influenced the efficient of heat radiation.
5. for some thin type products, for example the thickness P of semiconductor package part consumer integrated circuit of (promptly the counterdie of this packaging part is defined to 0.45mm) below 1.0mm can't be inserted this fin 16 or 21 in the inside of this packaging part because of its thickness is too little.
First purpose of the present invention provide a kind of strengthen heat sinking function, before injecting glue, need not insert the semiconductor package part and the manufacture method thereof of a fin.
Second purpose of the present invention provides does not a kind ofly have semiconductor package part and the manufacture method thereof that different thermal coefficient of expansions causes delamination because of this packing colloid and this fin.
The 3rd purpose of the present invention provides a kind of semiconductor package part and manufacture method thereof that does not need to carry out in addition the excessive glue action of a removing on making.
The 4th purpose of the present invention provides a kind of semiconductor package part and manufacture method thereof of utilizing most lead foots as heat dissipation path.
The 5th purpose of the present invention provides a kind of slim product that is common to, for example semiconductor package part of TQFP or TSOP and manufacture method thereof.
To achieve these goals, the invention provides a kind of semiconductor package part, comprise:
One wafer has an active surface;
One lead frame comprises:
One wafer holder has first and second, this first this wafer of set, and
A most lead foot are the active surfaces that are electrically connected to this wafer via most routings;
One is used to seal the packing colloid of this wafer and this lead frame; And
One fin fits in second and this majority lead foot of this wafer holder with the sticker of a heat conduction non-conducting.
Described semiconductor package part is characterized in that: the material of this fin is one of in copper, copper alloy, aluminium and the aluminium alloy.
Described semiconductor package part is characterized in that: the material of this sticker is one of in epoxy resin, B rank epoxy resin and the silica gel.
Described semiconductor package part is characterized in that: the pattern of this lead frame after the moulding is that wafer one of makes progress in pattern and the downward pattern of wafer.
Described semiconductor package part is characterized in that: when the pattern of this lead frame after the moulding was the downward pattern of wafer, the top of this fin also comprised a power fin.
The present invention also provides a kind of semiconductor package part manufacture method, comprises following steps:
(a) wafer is bonded to first of wafer holder of lead frame, and is electrically connected the active surface of this wafer and most lead foots of lead frame with most routings;
(b) only inject packing colloid for the patrix that comprises this wafer and lead frame;
(c) fin is fitted in second and the part of this majority lead foot of this wafer holder by the sticker of heat conduction non-conducting; And
(d) this lead frame is carried out moulding and cuts single action.
Described semiconductor package part manufacture method is characterized in that: in step (d), this lead frame is to be shaped to wafer one of to make progress in pattern and the downward pattern of wafer.
The present invention provides a kind of semiconductor package part again, comprises:
One wafer has an active surface and one second;
One lead frame comprises:
The wafer holder of one hole-opening type has first and second, this first this wafer of set; And
Most lead foots are electrically connected to the active surface of this wafer via most routings;
One is used to seal the packing colloid of this wafer and this lead frame; And
One fin is a T type mechanism, and fits in second of this wafer, second and this majority lead foot of this wafer holder with the sticker of a heat conduction non-conducting.
Described semiconductor package part is characterized in that: the material of this fin is one of in copper, copper alloy, aluminium and the aluminium alloy.
Described semiconductor package part is characterized in that: the material of this sticker is one of in epoxy resin, B rank epoxy resin and the silica gel.
Described semiconductor package part is characterized in that: this lead frame after the moulding is that wafer one of makes progress in pattern and the downward pattern of wafer.
Described semiconductor package part is characterized in that: when this lead frame after moulding was the downward pattern of a wafer, the top of this fin also comprised a power fin.
The present invention provides a kind of semiconductor package part manufacture method in addition, comprises following steps:
(a) wafer is bonded to first of wafer holder of lead frame, and is electrically connected in the active surface of this wafer and most lead foots of this lead frame with most routings;
(b) only inject packing colloid for the patrix that comprises this wafer and this lead frame;
(c) fin is fitted in second of this wafer, second and the part of this majority lead foot of this wafer holder by the sticker of this heat conduction non-conducting; And
(d) this lead frame is carried out moulding and cuts single action.
Described semiconductor package part manufacture method is characterized in that: in step (d), this lead frame is to be shaped to wafer one of to make progress in pattern and the downward pattern of wafer.
The present invention provides a kind of semiconductor package part in addition, comprises:
One wafer has an active surface;
One lead frame comprises the active surface that most lead foots are used for this wafer of set and are electrically connected to this wafer via most routings;
One is used to seal the packing colloid of this wafer and this lead frame; And
One fin fits in this majority lead foot with the sticker of a heat conduction non-conducting.
Described semiconductor package part is characterized in that: the material of this fin is one of in copper, copper alloy, aluminium and the aluminium alloy.
Described semiconductor package part is characterized in that: the material of this sticker is one of in epoxy resin, B rank epoxy resin and the silica gel.
Described semiconductor package part is characterized in that: this lead frame after the moulding is that wafer one of makes progress in pattern and the downward pattern of wafer.
Described semiconductor package part is characterized in that: when this lead frame after moulding was the downward pattern of a wafer, the top of this fin also comprised a power fin.
The present invention provides a kind of semiconductor package part manufacture method in addition, comprises following steps:
(a) wafer is bonded to most lead foots of lead frame, and is electrically connected in active surface and this majority lead foot of this wafer with most routings;
(b) only inject packing colloid for the patrix that comprises this wafer and this lead frame;
(c) fin is fitted in the part of this majority lead foot by the sticker of heat conduction non-conducting; And
(d) this lead frame is carried out moulding and cuts single action.
After having adopted technique scheme, semiconductor package part of the present invention and manufacture method thereof, this semiconductor package part only injects packing colloid in the part of the upper die that comprises a wafer and a lead frame, and utilizes a thickness can fit in the part of this wafer holder and this majority lead foot with the fin that demand is chosen with the sticker of a thermally conductive, electrically non-conductive.Because the thickness of this fin can be adjusted with demand, and is not subject to the specification of the counterdie thickness of known techniques, therefore be very suitable for the making of thin type product.The width of this fin can be contained the part of this wafer holder and this majority lead foot, therefore the heat that this wafer produced also can be discharged heat by the mode of conduction except being disposed to the atmosphere by this fin via the printed circuit board (PCB) that the individual lead foots of the majority of this lead frame are connected.The semiconductor package part of reinforcement heat sinking function of the present invention does not need in this wafer holder and the accurate alignment actions of this fin intercropping in the process of making, need be by the support bar of this lead frame this fin of extruding yet, therefore the cycle period of whole making can shorten, and the unit interval output of product also can improve.In addition, fin of the present invention is not to be contained within the counterdie, and only be to fit by the part of a sticker and this wafer holder and this majority lead foot, therefore make the thermal coefficient of expansion of this fin and this packing colloid or lead frame unequal, also can after expanding with heat and contract with cold, not cause the be full of cracks of packing colloid or delamination and influence the reliability of this packaging part.At last, both made the excessive glue phenomenon that is produced in the injecting glue process because of patrix, after fitting, will have been covered, also do not hindered attractive in appearancely, and also can avoid known techniques need carry out a step of removing the glue that overflows in addition but also do not influence function with this fin.
Below, with specific embodiment the present invention is done further detailed description in conjunction with the accompanying drawings.
Fig. 1 is a known built-in semiconductor package part schematic diagram of inserting the type fin.
Fig. 2 is a known exposed semiconductor package part schematic diagram of inserting the type fin.
Fig. 3 A to 3D is each schematic flow sheet of making of the present invention.
Fig. 4 is the embodiment schematic diagram of the downward semiconductor package part of a wafer of the present invention.
Fig. 5 is an embodiment schematic diagram of semiconductor package part of the present invention.
Fig. 6 is another embodiment schematic diagram of semiconductor package part of the present invention.
Fig. 3 A to 3D is a making schematic flow sheet of the present invention.As shown in Figure 3A, the present invention is bonded to first 141 of this wafer holder 14 with a wafer 12, and carries out the active surface 121 of this wafer 12 and the routing (wire bonding) of this majority lead foot 13.Afterwards, only carry out the injecting glue action of this patrix 18.
Shown in Fig. 3 B, after the injecting glue action that finishes this patrix 18, a fin 31 is fitted in second 142 and the part of this majority lead foot of this wafer holder by a sticker 32.The thickness of this fin 31 can be selected the specification that is fit to according to the thickness limits of required thin type product, therefore can avoid known techniques can't be common to the shortcoming of thin type product because of the thickness limits of counterdie.But this sticker 32 needs to select the material of thermally conductive, electrically non-conductive, and for example known epoxy resin, B rank epoxy resin or silica gel etc. are all applicable, and the present invention does not have any restriction to this.If use known B rank epoxy resin as sticker, in the time of about 50 ℃ is to be in half-dried state, but after pressurized, heated, can change its inner bond, thereby the part of firmly bonding this wafer holder, this packing colloid and this majority lead foot is in this fin 31.The material of this fin 31 can select that known aluminium, aluminium close entirely, copper or copper alloy, and the present invention does not have any restriction to this.
Shown in Fig. 3 C, through bonding this fin 31 behind this patrix 18, step via a moulding (forming) bends this majority lead 13 directions to this fin 31 again, and cuts four support bars (scheming not shown) of this lead frame via the step of all single (singulation).
The structure of Fig. 3 C is the direction that it(?) should a majority lead foot when carrying out the step of moulding be folded to this fin 31, can be described as the upwards pattern of (cavity-up) of a wafer.And the structure of Fig. 3 D be should majority when the step of moulding a lead foot bending to the direction of this patrix 18, can be described as the wafer pattern of (cavity-down) downwards.
Fig. 4 is the embodiment of the downward packaging part of a wafer of the present invention.Add in addition a power fin 41 in the structure of Fig. 4 above this fin 31, the heat discharge that the mode of utilizing convection current (convection) and radiation (radiation) is produced this wafer 12 is to atmosphere.
Fig. 5 is an embodiment of packaging part among the present invention.Different with aforesaid embodiment is that this wafer holder 14 is a hole-opening type, that is this wafer holder 14 can be divided into the branch of the left and right sides, and stays the space of a hollow.The benefit of this design is to reduce the probability of the delamination of this wafer 12 and this wafer holder 14.This fin 31 can adopt a mo(u)ld bottom half mechanism, after the injecting glue action that finishes this patrix, fits in second 122 of this wafer, this wafer holder 14 and this lead foot 13 with this sticker 32, and with this lead frame via a moulding and cut single step and finish.
Fig. 6 is another embodiment of packaging part among the present invention.Different with aforesaid embodiment is that this packaging part does not have wafer holder, and this wafer 12 is to be located on this lead foot 13 with this wafer sticker 15.This design can be common to the lead frame of the multiple wafer size that varies in size.As the step of Fig. 3 B to Fig. 3 C, after the injecting glue action that finishes this patrix, then this fin 31 is fitted in the part of this majority lead foot 13 by this sticker 32, and with this lead frame via a moulding and cut single step and finish.
Fin 31 of the present invention is not to be positioned within the packing colloid, even therefore this fin 31 and this packing colloid have unequal thermal coefficient of expansion, cause sticker to each other is the interlayer of elastic buffer formula (Buffering), therefore do not have the problem of delamination, can not cause the internal structure be full of cracks because of the effect of thermal stress, so can guarantee the reliability of packaging part of the present invention yet.In addition, the present invention only carries out the injecting glue of this patrix 18, and not as good as in counterdie, so the overflow problem of glue of counterdie, so need not increase by a step of removing excessive glue as known techniques.Though the bottom surface of this patrix 18 has the problem of excessive glue, after fitting via this sticker 32, will be hidden with this fin 31, therefore do not influence the outward appearance and the function of packaging part of the present invention.In addition, because of this wafer 12 and this majority lead foot 13 are that sticker 32 with a tool heat conduction function fits on this fin 31, the heat dissipation path of this wafer 31 is except known heat dissipation path, be that heat is dissipated to outside the path of atmosphere by this wafer 12, this wafer holder 14 and this fin 31, also can discharge by a printed circuit board (PCB) (scheming not shown) that connects this majority lead foot 13 in the mode of conduction by the path of this wafer 12 via this wafer holder 14, this fin 31 and this majority lead foot 13.
Structure of the present invention is not limited to any encapsulation pattern, but with the best results of the encapsulation pattern that is common to QFP and TSOP.
Claims (20)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB001325442A CN1168140C (en) | 2000-11-24 | 2000-11-24 | Semiconductor package and method of manufacturing the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB001325442A CN1168140C (en) | 2000-11-24 | 2000-11-24 | Semiconductor package and method of manufacturing the same |
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| Publication Number | Publication Date |
|---|---|
| CN1355564A true CN1355564A (en) | 2002-06-26 |
| CN1168140C CN1168140C (en) | 2004-09-22 |
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| Application Number | Title | Priority Date | Filing Date |
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| CNB001325442A Expired - Lifetime CN1168140C (en) | 2000-11-24 | 2000-11-24 | Semiconductor package and method of manufacturing the same |
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Cited By (28)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN100413060C (en) * | 2003-09-04 | 2008-08-20 | 松下电器产业株式会社 | Semiconductor device |
| CN102044507A (en) * | 2010-01-30 | 2011-05-04 | 江苏长电科技股份有限公司 | Printed circuit board chip flip external radiator packaging structure |
| CN102044503A (en) * | 2010-01-27 | 2011-05-04 | 江苏长电科技股份有限公司 | Packaging structure with printed circuit board, chip and upright heat dissipation block with locking hole |
| CN102044508A (en) * | 2010-01-30 | 2011-05-04 | 江苏长电科技股份有限公司 | Package structure with resin printed circuit board (PCB), chip, upright locking hole, radiating block, convex column and external radiator |
| CN102054798A (en) * | 2010-01-30 | 2011-05-11 | 江苏长电科技股份有限公司 | External heat radiator packaging structure of upright heat radiating block of chip in resin circuit board |
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| CN102054801A (en) * | 2010-01-30 | 2011-05-11 | 江苏长电科技股份有限公司 | Capsulation structure with inner pin embedded in flip-chip locking hole and radiator externally connected on radiating block |
| CN102054805A (en) * | 2010-01-30 | 2011-05-11 | 江苏长电科技股份有限公司 | Packaging structure of flip resin circuit board chip with circumscribed radiator |
| CN102054797A (en) * | 2010-01-30 | 2011-05-11 | 江苏长电科技股份有限公司 | Packaging structure of printed circuit board, chip, flip lock hole radiating block and external radiator |
| CN102054802A (en) * | 2010-01-29 | 2011-05-11 | 江苏长电科技股份有限公司 | Packaging structure of external heat radiator of pyramid lock hole heat radiation block of base island exposed chip |
| CN102074521A (en) * | 2010-01-30 | 2011-05-25 | 江苏长电科技股份有限公司 | Package structure of printed circuit board, flip-chip, radiating block and external radiator |
| CN102074526A (en) * | 2010-01-30 | 2011-05-25 | 江苏长电科技股份有限公司 | Encapsulation structure of resin circuit board, positive chip, lock hole, radiating block and external radiator |
| CN102074529A (en) * | 2010-01-30 | 2011-05-25 | 江苏长电科技股份有限公司 | Package structure of printed circuit board, normal chip, locking hole, radiating block and external radiator |
| CN102074523A (en) * | 2010-01-30 | 2011-05-25 | 江苏长电科技股份有限公司 | Encapsulation structure of resin circuit board, inverted chip, lock hole, radiating block, convex column and external radiator |
| CN102074524A (en) * | 2010-01-30 | 2011-05-25 | 江苏长电科技股份有限公司 | Encapsulation structure of resin circuit board, inverted chip, lock hole, radiating block and external radiator |
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| CN102074522A (en) * | 2010-01-30 | 2011-05-25 | 江苏长电科技股份有限公司 | Package structure with printed circuit boards (PCBs), chip, inverted locking hole, radiating block, convex column and external radiator |
| CN102082134A (en) * | 2010-01-29 | 2011-06-01 | 江苏长电科技股份有限公司 | Packaging structure of base island-embedded chip upright heat dissipation block external radiator |
| CN102088008A (en) * | 2010-01-28 | 2011-06-08 | 江苏长电科技股份有限公司 | Inner-pin exposed and chip-inverted packaging structure for heat dissipation block with locking hole |
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| CN100413060C (en) * | 2003-09-04 | 2008-08-20 | 松下电器产业株式会社 | Semiconductor device |
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| CN102088009A (en) * | 2010-01-26 | 2011-06-08 | 江苏长电科技股份有限公司 | Paddle-exposed and chip-upright packaging structure for heat dissipation block with locking holes |
| CN102074519A (en) * | 2010-01-27 | 2011-05-25 | 江苏长电科技股份有限公司 | Flip chip package structure with radiating block on printed circuit board (PCB) |
| CN102044503A (en) * | 2010-01-27 | 2011-05-04 | 江苏长电科技股份有限公司 | Packaging structure with printed circuit board, chip and upright heat dissipation block with locking hole |
| CN102088008A (en) * | 2010-01-28 | 2011-06-08 | 江苏长电科技股份有限公司 | Inner-pin exposed and chip-inverted packaging structure for heat dissipation block with locking hole |
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| CN102082134A (en) * | 2010-01-29 | 2011-06-01 | 江苏长电科技股份有限公司 | Packaging structure of base island-embedded chip upright heat dissipation block external radiator |
| CN102054802A (en) * | 2010-01-29 | 2011-05-11 | 江苏长电科技股份有限公司 | Packaging structure of external heat radiator of pyramid lock hole heat radiation block of base island exposed chip |
| CN102074520A (en) * | 2010-01-29 | 2011-05-25 | 江苏长电科技股份有限公司 | Encapsulation structure of resin circuit board, inverted chip and surface-bulged or fully coated radiating block |
| CN102054801A (en) * | 2010-01-30 | 2011-05-11 | 江苏长电科技股份有限公司 | Capsulation structure with inner pin embedded in flip-chip locking hole and radiator externally connected on radiating block |
| CN102054805A (en) * | 2010-01-30 | 2011-05-11 | 江苏长电科技股份有限公司 | Packaging structure of flip resin circuit board chip with circumscribed radiator |
| CN102074523A (en) * | 2010-01-30 | 2011-05-25 | 江苏长电科技股份有限公司 | Encapsulation structure of resin circuit board, inverted chip, lock hole, radiating block, convex column and external radiator |
| CN102074524A (en) * | 2010-01-30 | 2011-05-25 | 江苏长电科技股份有限公司 | Encapsulation structure of resin circuit board, inverted chip, lock hole, radiating block and external radiator |
| CN102074525A (en) * | 2010-01-30 | 2011-05-25 | 江苏长电科技股份有限公司 | Upright packaging structure for radiating-block external radiator of printed circuit board chip |
| CN102074526A (en) * | 2010-01-30 | 2011-05-25 | 江苏长电科技股份有限公司 | Encapsulation structure of resin circuit board, positive chip, lock hole, radiating block and external radiator |
| CN102074521A (en) * | 2010-01-30 | 2011-05-25 | 江苏长电科技股份有限公司 | Package structure of printed circuit board, flip-chip, radiating block and external radiator |
| CN102074522A (en) * | 2010-01-30 | 2011-05-25 | 江苏长电科技股份有限公司 | Package structure with printed circuit boards (PCBs), chip, inverted locking hole, radiating block, convex column and external radiator |
| CN102054797A (en) * | 2010-01-30 | 2011-05-11 | 江苏长电科技股份有限公司 | Packaging structure of printed circuit board, chip, flip lock hole radiating block and external radiator |
| CN102074529A (en) * | 2010-01-30 | 2011-05-25 | 江苏长电科技股份有限公司 | Package structure of printed circuit board, normal chip, locking hole, radiating block and external radiator |
| CN102054798A (en) * | 2010-01-30 | 2011-05-11 | 江苏长电科技股份有限公司 | External heat radiator packaging structure of upright heat radiating block of chip in resin circuit board |
| CN102088010A (en) * | 2010-01-30 | 2011-06-08 | 江苏长电科技股份有限公司 | Packaging structure of resin circuit board, chip and inverted heat dissipation block externally provided with radiator |
| CN102044508A (en) * | 2010-01-30 | 2011-05-04 | 江苏长电科技股份有限公司 | Package structure with resin printed circuit board (PCB), chip, upright locking hole, radiating block, convex column and external radiator |
| CN102044507A (en) * | 2010-01-30 | 2011-05-04 | 江苏长电科技股份有限公司 | Printed circuit board chip flip external radiator packaging structure |
| CN103811451A (en) * | 2014-01-23 | 2014-05-21 | 南通富士通微电子股份有限公司 | Chip scale package structure |
| WO2021226799A1 (en) * | 2020-05-11 | 2021-11-18 | 华为技术有限公司 | Package structure, manufacturing method therefor, and communication apparatus |
| CN113650223A (en) * | 2021-08-23 | 2021-11-16 | 东莞市速力科技有限公司 | A kind of quartz sensor packaging method and equipment |
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