CN120950309B - Exception handling method, device, equipment and storage medium for server boot firmware - Google Patents
Exception handling method, device, equipment and storage medium for server boot firmwareInfo
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- CN120950309B CN120950309B CN202511463136.0A CN202511463136A CN120950309B CN 120950309 B CN120950309 B CN 120950309B CN 202511463136 A CN202511463136 A CN 202511463136A CN 120950309 B CN120950309 B CN 120950309B
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/14—Error detection or correction of the data by redundancy in operations
- G06F11/1402—Saving, restoring, recovering or retrying
- G06F11/1415—Saving, restoring, recovering or retrying at system level
- G06F11/1441—Resetting or repowering
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/14—Error detection or correction of the data by redundancy in operations
- G06F11/1402—Saving, restoring, recovering or retrying
- G06F11/1415—Saving, restoring, recovering or retrying at system level
- G06F11/1417—Boot up procedures
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Abstract
本申请公开了一种服务器开机固件的异常处理方法、装置、设备及存储介质，涉及服务器技术领域。该方法包括：响应于开机操作，通过基板管理控制器获取当前使用的第一闪存存储器的固件异常信息；若固件异常信息包括服务器平台固件异常和/或微码固件异常，则通过基板管理控制器向可编程控制器件发送通道切换指令；通道切换指令用于将第一闪存存储器切换到备用的第二闪存存储器；通过基板管理控制器向电源供应单元发送断电指令并触发服务器的开机指令；在电源供应单元供电恢复后，从第二闪存存储器中加载服务器平台固件、微码固件和输入输出系统固件，以完成服务器的开机。该方法可以提高服务器的稳定性。
This application discloses a method, apparatus, device, and storage medium for handling server boot firmware anomalies, relating to the field of server technology. The method includes: in response to a boot operation, obtaining firmware anomaly information of the currently used first flash memory through a baseboard management controller; if the firmware anomaly information includes server platform firmware anomalies and/or microcode firmware anomalies, sending a channel switching instruction to a programmable controller through the baseboard management controller; the channel switching instruction is used to switch the first flash memory to a backup second flash memory; sending a power-off instruction to a power supply unit through the baseboard management controller and triggering a server boot command; after power is restored from the power supply unit, loading the server platform firmware, microcode firmware, and input/output system firmware from the second flash memory to complete the server boot process. This method can improve server stability.
Description
Technical Field
The present application relates to the field of server technologies, and in particular, to a method, an apparatus, a device, and a storage medium for processing an exception of a server boot firmware.
Background
With the rapid development of server technology, the requirements of users on the stability of the server are higher and higher. The startup stability is an important index of the stability of the server.
In the related art, when a server is started, the server needs a series of startup firmware to run. The starting firmware of the server is stored in the flash memory. When the starting firmware is abnormal, the server cannot be started normally. Therefore, the abnormal processing needs to be performed on the boot firmware in the process of booting the server so as to ensure the normal booting of the server. However, in the related art, the accuracy of exception handling of the startup firmware is low, so that the startup stability of the server is reduced.
Disclosure of Invention
The application provides an exception handling method, device, equipment and storage medium for server startup firmware, which at least solve the problem of lower stability of a server caused by lower accuracy of exception handling of the startup firmware in the related technology.
In one aspect, the present application provides a method for processing an exception of a server boot firmware, including:
in response to a starting operation, acquiring firmware exception information of a first flash memory currently used by a baseboard management controller of a server;
if the firmware abnormal information comprises server platform firmware abnormal and/or microcode firmware abnormal, a channel switching instruction is sent to a programmable control device of a server through a baseboard management controller, wherein the channel switching instruction is used for switching a first flash memory to a standby second flash memory;
The power-off instruction is used for enabling the power supply unit to be powered off and restarted;
After the power supply unit is powered back, loading the server platform firmware, the microcode firmware and the input/output system firmware from the second flash memory to finish the starting of the server.
On the other hand, the application provides an exception handling device for the starting firmware of the server, which comprises the following components:
the acquisition unit is used for responding to the starting operation and acquiring firmware abnormality information of the first flash memory currently used through a baseboard management controller of the server;
the switching unit is used for sending a channel switching instruction to a programmable control device of the server through the baseboard management controller if the firmware abnormal information comprises server platform firmware abnormal and/or microcode firmware abnormal;
The power-off instruction is used for powering off the power supply unit and restarting the power supply unit;
And the processing unit is used for loading the server platform firmware, the microcode firmware and the input/output system firmware from the second flash memory after the power supply unit is powered back to finish the startup of the server.
The application also provides electronic equipment which comprises a memory and a processor, wherein the memory is used for storing a computer program, and the processor is used for realizing the steps of any server starting firmware abnormality processing method when executing the computer program.
The application also provides a computer readable storage medium, wherein the computer readable storage medium stores a computer program, and the computer program is executed by a processor to realize the steps of any one of the server startup firmware exception handling methods.
The application also provides a computer program product, which comprises a computer program, and the computer program realizes the steps of any one of the abnormal processing methods of the server starting firmware when being executed by a processor.
The application provides an exception handling method, device, equipment and storage medium of a server startup firmware, wherein the method comprises the steps of responding to startup operation, acquiring firmware exception information of a first flash memory currently used by a baseboard management controller of the server; if the firmware abnormal information comprises server platform firmware abnormal and/or microcode firmware abnormal, a channel switching instruction is sent to a programmable control device of a server through a baseboard management controller, the channel switching instruction is used for switching a first flash memory to a standby second flash memory, a power-off instruction is sent to a power supply unit of the server through the baseboard management controller and triggers a starting instruction of the server, the power-off instruction is used for enabling the power supply unit to be powered off and restarted, and after the power supply of the power supply unit is recovered, the server platform firmware, microcode firmware and input/output system firmware are loaded from the second flash memory so as to complete starting of the server. In the embodiment of the application, the firmware exception information of the first flash memory which is currently used is acquired through the baseboard management controller of the server, and the exception processing step conforming to the exception type is executed according to the type of the firmware exception information, so that the exception processing efficiency and accuracy are improved, and the starting stability of the server is improved. In addition, since the server platform firmware and microcode firmware abnormality cannot be eliminated through the starting-up restart of the server, in the embodiment of the application, the power supply unit is powered off and restarted through the power-off instruction, and the server platform firmware, microcode firmware and input-output system firmware can be reloaded from the second flash memory, so that the server platform firmware abnormality and microcode firmware abnormality of the first flash memory can be eliminated, and the normal starting of the server is realized, thereby further improving the starting stability of the server.
Drawings
For a clearer description of embodiments of the present application, the drawings that are required to be used in the embodiments will be briefly described, it being apparent that the drawings in the following description are only some embodiments of the present application, and other drawings may be obtained according to the drawings without inventive effort for those skilled in the art.
Fig. 1 is an application scenario schematic diagram of an exception handling method for a server boot firmware according to an embodiment of the present application;
FIG. 2 is a flowchart illustrating a method for exception handling of a boot firmware of a server according to an embodiment of the present application;
FIG. 3 is a schematic diagram of a method for exception handling of a boot firmware of a server according to an embodiment of the present application;
FIG. 4 is a flowchart II of a method for exception handling of a boot firmware of a server according to an embodiment of the present application;
FIG. 5 is a schematic diagram of an exception handling apparatus for a boot firmware of a server according to an embodiment of the present application;
fig. 6 is a schematic structural diagram of an electronic device provided by the present application.
Detailed Description
The following description of the embodiments of the present application will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present application, but not all embodiments. Based on the embodiments of the present application, all other embodiments obtained by a person of ordinary skill in the art without making any inventive effort are within the scope of the present application.
It should be noted that in the description of the present application, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. The terms "first," "second," and the like in this specification are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order.
With the rapid development of server technology, the requirements of users on the stability of the server are higher and higher. The startup stability is an important index of the stability of the server.
In the related art, when a server is started, the server needs a series of startup firmware to run. The starting firmware of the server is stored in the flash memory. The flash memory is a non-volatile memory, and different boot firmware is stored in different areas of the flash memory. When the starting firmware is abnormal, the server cannot be started normally. Therefore, the abnormal processing needs to be performed on the boot firmware in the process of booting the server so as to ensure the normal booting of the server. At present, whether the boot firmware is normal is generally determined by detecting the boot time.
Alternatively, the boot firmware may include SPS (System Platform Services, server platform firmware), microcode firmware, and BIOS (Basic Input/Output System firmware), stored in a flash memory. Different firmware is stored in different areas of FLASH (FLASH memory).
The SPS firmware is firmware executed by the ME (MANAGE ENGINE, management engine), is mainly responsible for managing and monitoring core hardware (CPU, memory, I/O controller, storage controller and the like) of the server, completing hardware wakeup, detection and configuration after the server is powered on, and providing a standardized interface for calling hardware for upper software (operating system and management tool). The microcode firmware is firmware executed by a PCU (Platform Controller Unit, platform control unit) in the CPU, and is responsible for decomposing a 'complex instruction' sent by upper software (such as an operating system and an application) into a 'micro-operation' which can be directly identified by chip hardware, and repairing hardware loopholes and optimizing instruction execution efficiency existing when the chip leaves a factory, so that the microcode firmware is a bottom foundation of the chip for 'correctly and efficiently executing the upper instruction'. The BIOS firmware is firmware initialized by the whole system of the server in a startup self-checking mode, is executed by the CPU, is responsible for managing the hardware function of the I/O device, realizes protocol conversion between the device and the host (such as converting a read-write instruction of the host into an operation which can be identified by the device), ensures the stable operation of the device, and is a precondition that the I/O device can be identified and called by the server.
However, since the startup time of the server is affected by various factors, the accuracy of determining whether the firmware is abnormal by the startup time is low, and thus the startup stability of the server is reduced.
Therefore, how to accurately detect the execution abnormality of the firmware to improve the starting stability of the server is a technical problem to be solved.
The application provides an exception handling method of a server startup firmware, which comprises the following specific steps of firstly, responding to startup operation, obtaining firmware exception information of a first flash memory currently used through a baseboard management controller of the server, secondly, if the firmware exception information comprises server platform firmware exception and/or microcode firmware exception, sending a channel switching instruction to a programmable control device of the server through the baseboard management controller, wherein the channel switching instruction is used for switching the first flash memory to a second flash memory which is standby, sending a power-off instruction to a power supply unit of the server through the baseboard management controller and triggering the startup instruction of the server, wherein the power-off instruction is used for restarting the power supply unit, and finally, loading the server platform firmware, the microcode firmware and input-output system firmware from the second flash memory after power supply restoration of the power supply unit so as to finish startup of the server.
In the embodiment of the application, the firmware exception information of the first flash memory which is currently used is acquired through the baseboard management controller of the server, and the exception processing step conforming to the exception type is executed according to the type of the firmware exception information, so that the exception processing efficiency and accuracy are improved, and the starting stability of the server is improved. In addition, since the server platform firmware and microcode firmware abnormality cannot be eliminated through the starting-up restart of the server, in the embodiment of the application, the power supply unit is powered off and restarted through the power-off instruction, and the server platform firmware, microcode firmware and input-output system firmware can be reloaded from the second flash memory, so that the server platform firmware abnormality and microcode firmware abnormality of the first flash memory can be eliminated, and the normal starting of the server is realized, thereby further improving the starting stability of the server.
The present application will be further described in detail below with reference to the drawings and detailed description for the purpose of enabling those skilled in the art to better understand the aspects of the present application.
The specific application environment architecture or specific hardware architecture upon which execution of the exception handling method for the server boot firmware depends is described herein.
Fig. 1 is an application scenario schematic diagram of an exception handling method for a server boot firmware according to an embodiment of the present application. As shown in fig. 1, the server includes a BMC (Baseboard Management Controller ) and a CPLD (Complex Programmable Logic Device, complex programmable logic device), firmware exception information is detected by combining the BMC and the CPLD, and after the firmware exception information is determined, exception processing is performed through an exception processing step matched with the firmware exception information, so as to improve the starting stability of the server.
The BMC is a special microcontroller on the server main board and is mainly used for monitoring and managing the state of system hardware. It gathers information through integrated sensors and interfaces and provides remote management functions, ensuring that the server can be managed and monitored even if the operating system is not running. The intelligent monitoring system has the main functions of health monitoring and alarming, namely, the BMC can monitor key parameters such as temperature, voltage, fan speed and the like of a server in real time and send out a warning or take measures when abnormality occurs. Remote management supporting IPMI (INTELLIGENT PLATFORM MANAGEMENT INTERFACE) protocols allows an administrator to remotely access a server via a network for diagnostic, reboot, or shutdown operations. Event log recording, namely recording hardware-related events and alarms, and facilitating subsequent analysis and fault investigation. Firmware update-firmware supporting updating of a server component over a network. And the power management is used for controlling the power state of the server and comprises the functions of starting up, shutting down, restarting and the like. And in the application scene, the operation and maintenance personnel of the data center can remotely manage a large number of server nodes through the BMC, so that the efficiency is improved and the maintenance cost is reduced. When the hardware of the server fails, the BMC can quickly locate the problem and help to quickly restore service.
The CPLD is a programmable logic device and is used for realizing a complex digital logic circuit. Is mainly responsible for coordinating communication and control signal transfer between different hardware components. The main functions are signal processing and routing. The CPLD may process the input signal according to a preset logic rule, and send the processed signal to the correct output port. For example, in a multiprocessor system, a CPLD may be used to arbitrate access requests by multiple CPUs for shared resources. Initialization and configuration the CPLD may take on some initialization tasks such as setting bus frequency, configuring peripherals, etc., during initial system start-up. Fault detection and isolation in some cases, the CPLD may be used to detect hardware faults and attempt to isolate the faulty portion, preventing it from affecting the stability of the overall system. Flexible design adjustment, because the CPLD is programmable, the internal logic of the CPLD can be reconfigured according to specific requirements, and the CPLD is suitable for different hardware architectures or upgrading requirements. In the application scene, in a high-performance computing environment, the CPLD can optimize a data path and improve the overall system performance. For server platforms that require high degree of customization, CPLDs provide a convenient way to achieve specific functional requirements without having to change the physical circuit design.
In the embodiment of the application, the fault information is mapped to the self-defined fault register zone bit through the combination of the program detection of the baseboard management controller and the programmable control device, and the fault identification is started through various firmware established at the BMC side, so that the repair of various firmware faults and the automatic starting after the faults occur are effectively realized. The following describes a method for handling different firmware exceptions through a specific embodiment.
Fig. 2 is a flowchart of a method for processing an exception of a server boot firmware according to an embodiment of the present application, where an execution body of the method for processing an exception of a server boot firmware may be a server, and a bios may be deployed on the server. As shown in fig. 2, the method includes:
s201, in response to the starting operation, firmware exception information of a first flash memory which is currently used is obtained through a baseboard management controller of a server.
In the embodiment of the disclosure, the boot firmware in the first flash memory may include server platform firmware, microcode firmware, and input-output system firmware.
In some embodiments, firmware exception information of the first flash memory currently in use is obtained from a failure register of the programmable control device by a baseboard management controller of the server. Optionally, firmware exception information is stored by an identification bit of the fault register. Accordingly, this step may include:
acquiring setting information of a first identification bit and setting information of a second identification bit of a startup fault register from a programmable control device through a baseboard management controller of a server, wherein the first identification bit is used for identifying whether firmware of a server platform is abnormal or not, and the second identification bit is used for identifying whether microcode firmware is abnormal or not;
And determining the firmware exception information as the firmware exception of the server platform if the set information of the first identification bit is set, and/or determining the firmware exception information as the firmware exception of the microcode if the set information of the second identification bit is set.
It should be noted that, in the disclosed embodiment, the type of the programmable control device is not particularly limited. Alternatively, the Programmable control device may be a Programmable logic device, an MCU (Microcontroller Unit, microcontroller), or an FPGA (Field-Programmable GATE ARRAY ).
Illustratively, the first identification bit may be represented as bit0 and the second identification bit may be represented as bit1. If the setting information of bit0 is set, determining that the firmware of the server platform is abnormal, and if the setting information of bit0 is unset, determining that the firmware of the server platform is normal. If the setting information of bit1 is set, determining that the microcode firmware is abnormal, and if the setting information of bit1 is unset, determining that the microcode firmware is normal.
Alternatively, the first fault identification information may be recorded when the firmware exception information includes a server platform firmware exception and/or a microcode firmware exception. Illustratively, the first fault identification information is an "SPS_microcode fault" identification.
In some embodiments, the execution sequence of the boot firmware is matched with the boot power-on sequence of the power signal pins of each key device in the server system platform, and the stage of abnormal boot is judged according to whether the power signal of each device is normal. Correspondingly, before the base plate management controller of the server obtains the setting information of the first identification position and the setting information of the second identification position of the starting fault register from the programmable control device, the method further comprises the steps of responding to a starting instruction of the server, monitoring a first power signal of a Platform Control Hub (PCH) and a second power signal of a processor (CPU) through the programmable control device of the server, determining that the server platform firmware is abnormal if the first power signal is not monitored within a first preset time period, setting the first identification position in the starting fault register, determining that the microcode firmware is abnormal if the second power signal is not monitored within the first preset time period, and setting the second identification position in the starting fault register.
The value of the first preset duration is not particularly limited in the embodiment of the present disclosure. The first preset time period may be 10 seconds, 15 seconds, or 20 seconds, for example.
For example, as shown in fig. 1 and 3, when the Power key signal is triggered, PCH Power OK (PCH Power signal) is then triggered, followed by SYS Power OK (system Power signal) and then CPU Power GOOD (CPU Power signal) signal is triggered, and then the CPU starts loading the BIOS and executing the BIOS firmware program.
In this example, the first power signal may be a PCH (Platform Controller Hub, platform control hub) power signal and the second power signal may be a CPU power signal. The CPLD detection program may be designed to start timing after the start button is triggered, and if any one of the PCH Power OK (PCH Power signal) and the CPU Power GOOD (CPU Power signal) is not triggered within a first preset period (for example, 10 s), a fault is recorded and updated into a custom start fault register (which may be represented as a Power On error). The PCH power signal is not triggered, and indicates that SPS firmware fails to execute, and at the moment, the setting information of the first identification bit0 of the startup failure register is modified to be set. The CPU power signal is not triggered, which indicates that the microcode firmware executes fault, and the setting information of the first identification bit1 of the starting fault register is modified to be set.
In the embodiment of the disclosure, the hardware signals of the server are used for representing the starting execution abnormality of various firmware of the server, so that the execution abnormality of the firmware can be effectively and reliably detected, and the abnormal detection of the firmware can not be detected and triggered by mistake, thereby improving the accuracy of the abnormal detection of the firmware.
In other embodiments, as shown in fig. 3, the baseboard management controller of the server obtains firmware exception information corresponding to the i/o system firmware of the currently used first flash memory according to the power-on self-test completion signal of the i/o system firmware. If the power-on self-checking completion signal is received within the second preset time period, determining that the output system firmware is normal, and if the power-on self-checking completion signal is not received within the second preset time period, determining that the output system firmware is abnormal. The power-on self-test completion signal may be represented as a POST (Power On Self Test, power-on self-test) Complete signal.
The value of the second preset time period is not particularly limited in the embodiment of the present disclosure. The second preset time period may be, for example, 15 seconds, 20 seconds, or 25 seconds.
Alternatively, when the firmware abnormality information includes an output system firmware abnormality, the second failure identification information may be recorded. Illustratively, the second fault identification information is a "bios_start fault" identification.
S202, if the firmware abnormal information comprises server platform firmware abnormal and/or microcode firmware abnormal, a channel switching instruction is sent to a programmable control device of a server through a baseboard management controller, and the channel switching instruction is used for switching the first flash memory to a standby second flash memory.
Alternatively, as shown in fig. 1, the first flash memory may be a main flash memory and the second flash memory may be a spare flash memory. After the programmable control device receives the channel switching instruction, the first flash memory can be switched to the standby second flash memory through a serial peripheral interface switch (SPI SWITCH). For example, the serial peripheral interface corresponding to the first flash memory is "SPI1", the serial peripheral interface corresponding to the second flash memory is "SPI2", and SPI2 may be enabled and SPI1 may be disabled through SPI SWITCH, so as to switch the first flash memory to the standby second flash memory.
In some embodiments, before sending the channel switch instruction, it may be determined whether the boot firmware of the second flash memory is normal. Correspondingly, before the channel switching instruction is sent to the programmable control device of the server through the baseboard management controller, the method further comprises the steps of inquiring setting information of a fault state register of the second flash memory, if the setting information is 0, sending the channel switching instruction to the programmable control device of the server through the baseboard management controller, and if the setting information is 1, not sending the channel switching instruction, and recording fault information of the first flash memory and/or fault information of the second flash memory in a system event log.
If the setting information of the fault state register is 0, it indicates that the boot firmware of the second flash memory is normal, and if the setting information of the fault state register is 1, it indicates that the boot firmware of the second flash memory is abnormal.
Optionally, the method further comprises initializing set information of a fault state register of the target flash memory to be 0, wherein the target flash memory is a first flash memory and/or a second flash memory, determining a serial peripheral interface used by the target flash memory if firmware exception information of the target flash memory comprises one or more of server platform firmware exception, microcode firmware exception and input/output system firmware exception, and adjusting the set information of the fault state register of the target flash memory to be 1 through the serial peripheral interface.
For example, the fault status register of the first flash memory and the fault status register of the second flash memory may be designed to default to 0, indicating that the flash memory has no fault. After the baseboard management controller inquires the 'SPS_microcode fault' identifier or the 'BIOS_start fault' identifier, inquiring whether the currently used SPI channel is SPI1 or SPI2 from the CPLD, and setting a fault state register of the flash memory corresponding to the currently used SPI channel to be 1.
In the embodiment of the disclosure, before the channel switching instruction is sent, it is determined whether the boot firmware of the second flash memory is normal, if so, the switching is performed. Therefore, when the first flash memory and the second flash memory are in failure, the switching cycle of the flash memory can be avoided, and the starting-up stability of the server is further improved.
In some embodiments, a test result register of the flash memory may also be added. If the starting firmware of the flash memory is normal, setting the test result register to be 1, and normally executing the channel switching instruction. And in response to the completion of switching the first flash memory to the standby second flash memory, judging whether the set information of the test result register is 1, and if so, indicating that the starting firmware in the newly switched second flash memory is normally available. At this time, the baseboard management controller may copy the data in the second flash memory to the first flash memory. And in response to the completion of the data copying, resetting the test result register of the second flash memory, and resetting the fault state register of the first flash memory, so that the first flash memory is used as a spare flash memory of the second flash memory.
In the embodiment of the disclosure, after the firmware of the first flash memory is repaired, the data in the second flash memory is copied to the first flash memory, and the fault state register of the first flash memory is cleared, so that the first flash memory is used as a spare flash memory of the second flash memory, and the repair is performed through the first flash memory when the second flash memory fails, thereby further improving the starting-up stability of the server.
S203, sending a power-off instruction to a power supply unit of the server through the baseboard management controller and triggering a starting instruction of the server, wherein the power-off instruction is used for enabling the power supply unit to be powered off and restarted.
In the embodiment of the disclosure, when the server platform firmware and/or the microcode firmware are abnormal, the power supply unit can be temporarily powered off and restarted through the temporary power-off instruction, so that the server reloads the server platform firmware and the microcode firmware.
For example, as shown in fig. 1, the power supply unit may be denoted as PSU (english: power Supply Unit).
S204, after the power supply unit is powered back, loading the server platform firmware, the microcode firmware and the input/output system firmware from the second flash memory to finish the startup of the server.
In some embodiments, the method includes restarting the platform control hub and the baseboard management controller after power supply is restored, loading the server platform firmware from the second flash memory through the restarted platform control hub, determining whether first fault identification information is recorded through the restarted baseboard management controller, if yes, triggering a starting-up instruction of the server, wherein the first fault identification information is recorded under the condition that firmware abnormality information comprises server platform firmware abnormality and/or microcode firmware abnormality, and loading the microcode firmware and input-output system firmware from the second flash memory through a processor of the server to complete starting-up of the server.
Optionally, after the baseboard management controller triggers a power-on instruction of the server, the first fault identification information may be cleared.
In the embodiment of the disclosure, after the temporary power-off restart recovery of the power supply unit, the platform control hub and the baseboard management controller restart, at this time, the platform control hub may load the server platform firmware from the second flash memory, the processor may load the microcode firmware and the input/output system firmware from the second flash memory, and the boot firmware in the second flash memory is normal, so that normal boot of the server may be realized.
The application provides an exception handling method of a server startup firmware, which comprises the steps of firstly, responding to startup operation, obtaining firmware exception information of a first flash memory currently used through a baseboard management controller of a server, secondly, if the firmware exception information comprises server platform firmware exception and/or microcode firmware exception, sending a channel switching instruction to a programmable control device of the server through the baseboard management controller, wherein the channel switching instruction is used for switching the first flash memory to a second flash memory which is standby, sending a power-off instruction to a power supply unit of the server through the baseboard management controller and triggering the startup instruction of the server, and finally, loading the server platform firmware, the microcode firmware and input/output system firmware from the second flash memory after power supply restoration of the power supply unit so as to finish startup of the server. In the embodiment of the application, the firmware exception information of the first flash memory which is currently used is acquired through the baseboard management controller of the server, and the exception processing step conforming to the exception type is executed according to the type of the firmware exception information, so that the exception processing efficiency and accuracy are improved, and the starting stability of the server is improved. In addition, since the server platform firmware and microcode firmware abnormality cannot be eliminated through the starting-up restart of the server, in the embodiment of the application, the power supply unit is powered off and restarted through the power-off instruction, and the server platform firmware, microcode firmware and input-output system firmware can be reloaded from the second flash memory, so that the server platform firmware abnormality and microcode firmware abnormality of the first flash memory can be eliminated, and the normal starting of the server is realized, thereby further improving the starting stability of the server.
It should be noted that, when the firmware exception information includes an input/output system firmware exception, the power-off instruction does not need to be sent. Accordingly, as shown in fig. 4, the method further includes:
S205, if the firmware abnormal information comprises the firmware abnormality of the input/output system, a channel switching instruction is sent to a programmable control device of the server through the baseboard management controller, and the channel switching instruction is used for switching the first flash memory to a standby second flash memory.
The method for switching the first flash memory to the spare second flash memory in step S205 is the same as the method for switching the first flash memory to the spare second flash memory in step S202, and will not be described here again.
S206, responding to the completion of switching to the second flash memory, triggering a restarting instruction of the server, and loading the input/output system firmware from the second flash memory to complete the starting of the server.
Optionally, the method may include determining, by the baseboard management controller, whether second fault identification information is recorded in response to switching to the second flash memory, and if yes, triggering a power-on instruction of the server, where the second fault identification information is recorded when the firmware abnormality information includes an input-output system firmware abnormality.
Optionally, after the baseboard management controller triggers a power-on instruction of the server, the second fault identification information may be cleared.
In the embodiment of the application, when the firmware abnormal information comprises the firmware of the server platform and the firmware of the microcode, the power supply unit is powered off and restarted through the power-off instruction, the firmware abnormality of the server platform and the firmware abnormality of the microcode are eliminated, and when the firmware abnormal information comprises the firmware abnormality of the input and output system, the firmware abnormality of the input and output system is eliminated through sending the channel switching instruction, so that the repair of various firmware faults and the automatic starting after the faults occur are realized.
Fig. 5 is a schematic structural diagram of an exception handling device for a boot firmware of a server according to an embodiment of the present application. As shown in fig. 5, the apparatus includes:
an obtaining unit 501, configured to obtain, by a baseboard management controller of a server, firmware exception information of a first flash memory currently used in response to a boot operation;
The switching unit 502 is configured to send a channel switching instruction to a programmable control device of the server through the baseboard management controller if the firmware exception information includes a server platform firmware exception and/or a microcode firmware exception;
The instruction sending unit 503 is configured to send a power-off instruction to a power supply unit of the server through the baseboard management controller and trigger a power-on instruction of the server;
and the processing unit 504 is configured to load the server platform firmware, the microcode firmware, and the i/o system firmware from the second flash memory after the power supply unit resumes the power supply, so as to complete the startup of the server.
In some embodiments, the obtaining unit 501 obtains firmware exception information of a first flash memory currently used through a baseboard management controller of a server, where the obtaining unit includes obtaining, by the baseboard management controller of the server, setting information of a first identification bit and setting information of a second identification bit of a boot failure register from a programmable control device, where the first identification bit is used to identify whether firmware of a server platform is abnormal, and the second identification bit is used to identify whether the microcode firmware is abnormal, and if the setting information of the first identification bit is set, determining that the firmware exception information is that the firmware of the server platform is abnormal, and/or if the setting information of the second identification bit is set, determining that the firmware exception information is that the microcode firmware is abnormal.
In some embodiments, the device further comprises a monitoring unit, wherein the monitoring unit is used for responding to a starting-up instruction of the server, monitoring a first power supply signal of the platform control hub and a second power supply signal of the processor through a programmable control device of the server, determining that the firmware of the server platform is abnormal if the first power supply signal is not monitored within a first preset duration, setting a first identification bit in a starting-up fault register, and determining that the microcode firmware is abnormal if the second power supply signal is not monitored within the first preset duration, and setting a second identification bit in the starting-up fault register.
In some embodiments, the processing unit 504 loads the server platform firmware, the microcode firmware and the input/output system firmware from the second flash memory after the power supply unit is powered up, so as to complete the startup of the server, and the method comprises restarting the platform control hub and the baseboard management controller after the power supply unit is powered up, loading the server platform firmware from the second flash memory through the restarted platform control hub, determining whether first fault identification information is recorded through the restarted baseboard management controller, and triggering a startup instruction of the server if the first fault identification information is recorded, wherein the first fault identification information is recorded under the condition that the firmware abnormality information comprises server platform firmware abnormality and/or microcode firmware abnormality, and loading the microcode firmware and the input/output system firmware from the second flash memory through a processor of the server so as to complete the startup of the server.
In some embodiments, the processing unit 504 is further configured to send a channel switching instruction to the programmable control device of the server through the baseboard management controller if the firmware exception information includes an i/o system firmware exception, where the channel switching instruction is used to switch the first flash memory to the standby second flash memory, and trigger a restart instruction of the server to load the i/o system firmware from the second flash memory in response to the completion of the switching to the second flash memory, so as to complete the startup of the server.
In some embodiments, the processing unit 504 is configured to trigger a restart instruction of the server in response to the completion of the switching to the second flash memory, including determining, by the baseboard management controller, whether second failure identification information is recorded in response to the completion of the switching to the second flash memory, and if so, triggering a start instruction of the server, where the second failure identification information is recorded in a case that the firmware exception information includes an input-output system firmware exception.
In some embodiments, the device further comprises a query unit, wherein the query unit is used for querying setting information of a fault state register of the second flash memory, if the setting information is 0, a channel switching instruction is sent to a programmable control device of the server through the baseboard management controller, if the setting information is 1, the channel switching instruction is not sent, and fault information of the first flash memory and/or fault information of the second flash memory are recorded in a system event log.
In some embodiments, the device further comprises an initialization unit, wherein the initialization unit is used for initializing the setting information of the fault state register of the target flash memory to be 0, the target flash memory is a first flash memory and/or a second flash memory, if the firmware abnormality information of the target flash memory comprises one or more of a server platform firmware abnormality, a microcode firmware abnormality and an input-output system firmware abnormality, a serial peripheral interface used by the target flash memory is determined, and the setting information of the fault state register of the target flash memory is adjusted to be 1 through the serial peripheral interface.
The application provides an exception handling device for starting up firmware of a server, which is used for acquiring the firmware exception information of a first flash memory currently used by a baseboard management controller of the server, executing an exception handling step conforming to the exception type according to the type of the firmware exception information, and improving the efficiency and accuracy of exception handling, thus improving the starting-up stability of the server. In addition, since the server platform firmware and microcode firmware abnormality cannot be eliminated through the starting-up restart of the server, in the embodiment of the application, the power supply unit is powered off and restarted through the power-off instruction, and the server platform firmware, microcode firmware and input-output system firmware can be reloaded from the second flash memory, so that the server platform firmware abnormality and microcode firmware abnormality of the first flash memory can be eliminated, and the normal starting of the server is realized, thereby further improving the starting stability of the server.
The description of the features in the embodiment corresponding to the exception handling device of the server boot firmware provided by the embodiment of the present application may refer to the related description of the embodiment corresponding to the exception handling method of the server boot firmware, which is not described herein in detail.
Fig. 6 is a schematic structural diagram of an electronic device provided by the present application. As shown in fig. 6, the electronic device 60 provided in this embodiment includes at least one processor 601 and a memory 602. Optionally, the electronic device 60 further comprises a communication component 603. The processor 601, the memory 602, and the communication section 603 are connected via a bus.
In a specific implementation process, at least one processor 601 executes computer-executable instructions stored in the memory 602, so that at least one processor 601 executes the above-mentioned embodiment of the method for exception handling of the server boot firmware.
The specific implementation process of the processor 601 may refer to the above-mentioned method embodiment, and its implementation principle and technical effects are similar, and this embodiment will not be described herein again.
In the above embodiment, it should be understood that the Processor may be a central processing unit (Central Processing Unit, abbreviated as CPU), other general purpose Processor, digital signal Processor (DIGITAL SIGNAL Processor, abbreviated as DSP), application SPECIFIC INTEGRATED Circuit (ASIC), and the like. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like. The steps of a method disclosed in connection with the present application may be embodied directly in a hardware processor for execution, or in a combination of hardware and software modules in a processor for execution.
The Memory may include high-speed Memory (Random Access Memory, RAM) or may further include Non-volatile Memory (NVM), such as at least one disk Memory.
The bus may be an industry standard architecture (Industry Standard Architecture, ISA) bus, an external device interconnect (PERIPHERAL COMPONENT, PCI) bus, or an extended industry standard architecture (Extended Industry Standard Architecture, EISA) bus, among others. The buses may be divided into address buses, data buses, control buses, etc. For ease of illustration, the buses in the drawings of the present application are not limited to only one bus or to one type of bus.
Embodiments of the present application also provide a computer readable storage medium having a computer program stored therein, wherein the computer program is configured to execute the steps of any of the foregoing embodiments of the method for exception handling of server boot firmware when run.
In an exemplary embodiment, the computer readable storage medium may include, but is not limited to, a U disk, a Read-Only Memory (ROM), a random access Memory (Random Access Memory, RAM), a removable hard disk, a magnetic disk, or an optical disk, etc. various media in which a computer program may be stored.
The embodiment of the application also provides a computer program product, which comprises a computer program, and the computer program realizes the steps in the embodiment of any one of the abnormality processing methods of the server boot firmware when being executed by a processor.
Embodiments of the present application also provide another computer program product, including a non-volatile computer readable storage medium, where the non-volatile computer readable storage medium stores a computer program, where the computer program when executed by a processor implements the steps in any of the foregoing embodiments of the method for exception handling of server boot firmware.
Those of skill would further appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both, and that the various illustrative elements and steps are described above generally in terms of functionality in order to clearly illustrate the interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
The method, the device, the equipment and the storage medium for processing the abnormality of the starting firmware of the server are described in detail. The principles and embodiments of the present application have been described herein with reference to specific examples, the description of which is intended only to facilitate an understanding of the method of the present application and its core ideas. It should be noted that it will be apparent to those skilled in the art that various modifications and adaptations of the application can be made without departing from the principles of the application and these modifications and adaptations are intended to be within the scope of the application as defined in the following claims.
Claims (9)
1. An exception handling method for a server boot firmware is characterized by comprising the following steps:
In response to a power-on operation, monitoring, by a programmable control device of the server, a first power signal of the platform control hub and a second power signal of the processor;
acquiring firmware exception information of a currently used first flash memory from the programmable control device through a baseboard management controller of the server;
Executing an exception processing step conforming to the exception type according to the exception type of the firmware exception information;
If the firmware abnormality information comprises server platform firmware abnormality and/or microcode firmware abnormality, a channel switching instruction is sent to a programmable control device of the server through the baseboard management controller, wherein the abnormality information of the server platform firmware abnormality is determined according to the monitored first power supply signal;
the channel switching instruction is used for switching the first flash memory to a standby second flash memory;
Sending a power-off instruction to a power supply unit of the server through the baseboard management controller and triggering a starting instruction of the server, wherein the power-off instruction is used for enabling the power supply unit to be powered off and restarted;
After the power supply unit is powered back, loading server platform firmware, microcode firmware and input/output system firmware from the second flash memory to complete the starting of the server;
if the firmware abnormality information comprises firmware abnormality of an input/output system, a channel switching instruction is sent to a programmable control device of the server through the baseboard management controller, wherein the channel switching instruction is used for switching the first flash memory to a standby second flash memory;
And in response to the completion of switching to the second flash memory, triggering a restarting instruction of the server, and loading the input/output system firmware from the second flash memory to complete the starting of the server.
2. The abnormality processing method according to claim 1, wherein the obtaining, by the baseboard management controller of the server, firmware abnormality information of the first flash memory currently in use from the programmable control device includes:
acquiring setting information of a first identification position and setting information of a second identification position of a startup fault register from the programmable control device through a baseboard management controller of the server, wherein the first identification position is used for identifying whether firmware of a server platform is abnormal or not, and the second identification position is used for identifying whether the microcode firmware is abnormal or not;
If the setting information of the first identification position is set, determining that the firmware abnormality information is server platform firmware abnormality; and/or if the setting information of the second identification bit is set, determining that the firmware exception information is microcode firmware exception.
3. The exception handling method according to claim 2, wherein the method further comprises:
if the first power supply signal is not monitored within a first preset time period, determining that the firmware of the server platform is abnormal, and setting a first identification bit in the starting-up fault register;
if the second power supply signal is not monitored within the first preset duration, determining that the microcode firmware is abnormal, and setting a second identification bit in the starting-up fault register.
4. The exception handling method of claim 1, wherein loading server platform firmware, microcode firmware, and input-output system firmware from the second flash memory after the power supply unit is powered up to complete the powering up of the server, comprising:
Restarting the platform control hub and the baseboard management controller after the power supply unit is powered back, and loading the server platform firmware from the second flash memory through the restarted platform control hub;
Determining whether first fault identification information is recorded or not through the restarted baseboard management controller, if yes, triggering a starting instruction of a server, wherein the first fault identification information is recorded under the condition that the firmware abnormality information comprises server platform firmware abnormality and/or microcode firmware abnormality;
and loading microcode firmware and input/output system firmware from the second flash memory by a processor of the server so as to finish the starting of the server.
5. The exception handling method of claim 1, wherein triggering a restart instruction of the server in response to switching to the second flash memory being completed comprises:
Responding to the completion of switching to the second flash memory, determining whether second fault identification information is recorded or not through a baseboard management controller, and if yes, triggering a starting instruction of the server;
Wherein the second failure identification information is recorded in a case where the firmware abnormality information includes an input-output system firmware abnormality.
6. The abnormality processing method according to any one of claims 1 to 5, characterized by further comprising, before said sending, by said baseboard management controller, a channel switching instruction to a programmable control device of said server:
inquiring setting information of a fault state register of the second flash memory, and if the setting information is 0, sending a channel switching instruction to a programmable control device of the server through the baseboard management controller;
If the first flash memory is 1, a channel switching instruction is not sent, and fault information of the first flash memory and/or fault information of the second flash memory are recorded in a system event log.
7. The exception handling method according to claim 6, further comprising:
initializing the setting information of a fault state register of a target flash memory to be 0, wherein the target flash memory is a first flash memory and/or a second flash memory;
If the firmware exception information of the target flash memory comprises one or more of server platform firmware exception, microcode firmware exception and input/output system firmware exception, determining a serial peripheral interface used by the target flash memory;
and adjusting the setting information of the fault state register of the target flash memory to be 1 through the serial peripheral interface.
8. An electronic device, comprising:
A memory for storing a computer program;
A processor for implementing the steps of the exception handling method of the server boot firmware according to any one of claims 1 to 7 when executing said computer program.
9. A computer readable storage medium, wherein a computer program is stored in the computer readable storage medium, wherein the computer program, when executed by a processor, implements the steps of the exception handling method of the server boot firmware of any one of claims 1 to 7.
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| CN117234863A (en) * | 2023-09-27 | 2023-12-15 | 苏州元脑智能科技有限公司 | Flash memory information display method and server |
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| CN117608674A (en) * | 2023-11-28 | 2024-02-27 | 浪潮计算机科技有限公司 | Operating system access method, device, equipment and storage medium |
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