CN120144197B - A startup control method, apparatus, computer device, and storage medium - Google Patents

A startup control method, apparatus, computer device, and storage medium

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Publication number
CN120144197B
CN120144197B CN202510271169.9A CN202510271169A CN120144197B CN 120144197 B CN120144197 B CN 120144197B CN 202510271169 A CN202510271169 A CN 202510271169A CN 120144197 B CN120144197 B CN 120144197B
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module
chip select
timeout
xip
chip
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CN120144197A (en
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谢艳强
黎发明
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Die Micro Technology Shanghai Co ltd
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Die Micro Technology Shanghai Co ltd
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    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/4401Bootstrapping
    • G06F9/4406Loading of operating system

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  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Stored Programmes (AREA)

Abstract

The application relates to a startup control method, a startup control device, a computer device and a storage medium. The method comprises the steps of responding to receiving reset setting and releasing signals, controlling an XIP module to start finger taking operation, determining a starting stage according to the finger taking operation, controlling a multi-chip selection module to obtain a timeout threshold corresponding to the starting stage through a system control module, receiving the reset setting and releasing signals generated by the multi-chip selection module based on the timeout threshold when the starting stage does not normally operate, controlling the XIP module to re-take fingers based on the reset setting and releasing signals until all the starting stages normally operate, and finishing starting. The method can realize flexible and efficient completion of XIP startup.

Description

Start control method, device, computer equipment and storage medium
Technical Field
The present application relates to the field of computer technologies, and in particular, to a startup control method, a startup control device, a computer device, and a storage medium.
Background
The system boot program is used for a section of applet which is pre-operated before the CPU runs the operating system kernel, so that the CPU initializes the hardware equipment and establishes a mapping diagram of the memory space, thereby bringing the software and hardware environment of the system to a proper state, and finally calling the operating system kernel for the CPU to prepare a correct environment.
In the prior art, the system boot program is usually stored in a nonvolatile memory device supporting an on-chip execution (eXecute In Place, XIP) operation, and the CPU can access the nonvolatile memory device in a memory access manner, so as to directly execute the system boot program stored in the nonvolatile memory device. Accordingly, XIP technology has a wide range of applications including, but not limited to, industrial control, transportation management, robotics, national defense, military, medical instrumentation, and aerospace.
In the course of conception and implementation of the present application, the inventors found that at least the following problems exist:
The access speed of the nonvolatile memory is generally lower than that of a Random Access Memory (RAM), so that the execution efficiency is reduced, the access mode and data consistency requirements of the memory in the XIP starting process are higher, if the system is improperly used, the system is unstable or data is damaged, the existing XIP starting implementation often lacks flexibility, and the requirements of different application scenes are difficult to adapt.
The foregoing description is provided for general background information and does not necessarily constitute prior art.
Disclosure of Invention
In view of the foregoing, it is desirable to provide a startup control method, apparatus, computer device, and storage medium that can efficiently and flexibly employ XIP startup.
In a first aspect, the present application provides a startup control method applied to a central processing unit, where the central processing unit is connected to a system control module and an XIP module, the XIP module is connected to a multi-selection module, and the system control module is connected to the multi-selection module, the method includes:
s10, responding to receiving reset setting and release signals, and controlling an XIP module to start finger fetching operation;
S20, determining a starting stage according to the finger taking operation, and controlling the multi-chip module to acquire a timeout threshold corresponding to the starting stage through the system control module;
And S30, when the starting stage does not normally operate, receiving reset setting and releasing signals generated by the multi-chip module based on the timeout threshold, and controlling the XIP module to re-pick fingers based on the reset setting and releasing signals until all the starting stages normally operate, and finishing starting.
In one embodiment, the timeout threshold includes a first timeout and a second timeout, and the step of S20 includes:
when the starting stage is a preset initial starting stage, enabling a switching function in the multi-chip module to enable through the system control module so as to obtain a first timeout preset by the switching function;
And when the starting stage is a preset non-initial starting stage, closing the switching function enabling of the multi-chip selection module through the system control module, and sending a second timeout corresponding to the chip selection function to the multi-chip selection module.
In one embodiment, before S20, the method includes:
dividing a plurality of starting stages in a starting process in advance according to the finger fetching operation
In one embodiment, the plurality of start-up phases includes:
A BOOTROM stage for directly taking the instruction from the flash memory and actively moving the program from the flash memory to the internal static memory;
A UBOOT stage for verifying the moved program;
the pointer jumps to the KERNEL phase of the program where the new address is moved.
In a second aspect, the present application provides a startup control method applied to a multi-chip selection module, where the multi-chip selection module is connected with a system control module and an XIP module, the system control module is connected with a central processor, and the XIP module is connected with the central processor, the method includes:
s21, responding to a trigger reset setting and releasing signal, re-timing to acquire timing data and acquiring a timeout threshold;
S22, when the timing data is larger than the timeout threshold, configuring chip selection data of next finger taking operation according to a preset sequence, generating new reset setting and releasing signals, and carrying out reset management through the system control module so that the central processing unit controls the XIP module to take fingers again until the finger taking operation is completed.
In one embodiment, the timeout threshold comprises a first timeout and a second timeout, and the step of obtaining the timeout threshold comprises the following steps:
Enabling a switching function enabling in the multi-chip module based on the system control module to obtain a first timeout of the switching function preconfigured;
And closing the switching function enabling in the multi-chip module based on the system control module, and receiving the second timeout sent by the central processing unit through the system control module.
In one embodiment, when the timing data is greater than the timeout threshold, configuring the chip selection data of the next finger fetching operation according to a preset sequence includes:
Judging whether a preset switching function is enabled or not, if the switching function is enabled, comparing the timing data with the first timeout, and configuring chip selection data of the next finger taking operation according to a chip selection and configuration sequence when the timing data is larger than the first timeout;
And if the switching function is closed, comparing the timing data with the second timeout, and configuring chip selection data of the next finger taking operation according to a chip selection sequence when the timing data is larger than the second timeout.
In one embodiment, the step of configuring the chip selection data of the next finger fetching operation according to the preset sequence includes:
Determining chip selection data of the current finger taking operation;
when the switching function is enabled and the timing data is larger than the first timeout, determining a configuration value and/or a chip selection value of the chip selection data required by the next finger taking operation;
Or when the switching function is disabled and the timing data is larger than the second timeout, determining the chip selection value of the chip selection data required by the next finger taking operation.
In one embodiment, the step of determining the configuration value and/or the chip select value of the chip select data of the next finger fetching operation includes:
Judging whether the chip selection data is the last configuration value of the current chip selection, if so, continuing to judge whether the chip selection data is the last chip selection value, and if so, reading the abnormal state of the multi-chip selection module through the system control module;
If the chip selection data is not the last configuration value of the current chip selection, determining the configuration value of the next chip selection, and triggering a new reset setting and releasing signal;
And if the chip select data is not the last chip select value, determining the chip select value of the next chip select and triggering a new reset set and release signal.
In a third aspect, the application provides a start control device, which comprises a signal receiving module, a threshold sending module and an instruction taking control module, wherein,
The signal receiving module is used for responding to the received reset setting and releasing signals and controlling the XIP module to start the finger taking operation;
The threshold sending module is used for determining a starting stage according to the finger taking operation, and controlling the multi-chip module to obtain a timeout threshold corresponding to the starting stage through the system control module;
And the instruction fetching control module is used for acquiring reset setting and releasing signals generated by the multi-chip selection module based on the timeout threshold when the starting stage does not normally operate, so as to control the XIP module to fetch the instruction again based on the reset setting and releasing signals until all the starting stages normally operate.
In a fourth aspect, the application provides a start control device, which comprises a data acquisition module and a chip selection configuration module, wherein,
The data acquisition module is used for responding to the trigger reset setting and release signals, re-timing to acquire timing data and acquiring a timeout threshold;
And the chip selection configuration module is used for configuring chip selection data of next finger taking operation according to a preset sequence when the timing data is larger than the timeout threshold value, generating a new reset setting and releasing signal, and carrying out reset management through the system control module so that the central processing unit controls the XIP module to re-take fingers until the finger taking operation is completed.
In a fifth aspect, the present application provides a computer device comprising a memory storing a computer program and a processor implementing the following steps when executing the computer program:
s10, responding to receiving reset setting and release signals, and controlling an XIP module to start finger fetching operation;
S20, determining a starting stage according to the finger taking operation, and controlling the multi-chip module to acquire a timeout threshold corresponding to the starting stage through the system control module;
S30, when the starting stage does not normally operate, receiving reset setting and releasing signals generated by the multi-chip module based on the timeout threshold, and controlling the XIP module to re-pick the fingers based on the reset setting and releasing signals until all the starting stages normally operate, and finishing starting;
or the processor when executing the computer program performs the steps of:
s21, responding to a trigger reset setting and releasing signal, re-timing to acquire timing data and acquiring a timeout threshold;
S22, when the timing data is larger than the timeout threshold, configuring chip selection data of next finger taking operation according to a preset sequence, generating new reset setting and releasing signals, and carrying out reset management through the system control module so that the central processing unit controls the XIP module to take fingers again until the finger taking operation is completed.
In a sixth aspect, the present application provides a computer readable storage medium having stored thereon a computer program which when executed by a processor performs the steps of:
s10, responding to receiving reset setting and release signals, and controlling an XIP module to start finger fetching operation;
S20, determining a starting stage according to the finger taking operation, and controlling the multi-chip module to acquire a timeout threshold corresponding to the starting stage through the system control module;
S30, when the starting stage does not normally operate, receiving reset setting and releasing signals generated by the multi-chip module based on the timeout threshold, and controlling the XIP module to re-pick the fingers based on the reset setting and releasing signals until all the starting stages normally operate, and finishing starting;
Or the computer program when executed by a processor performs the steps of
S21, responding to a trigger reset setting and releasing signal, re-timing to acquire timing data and acquiring a timeout threshold;
S22, when the timing data is larger than the timeout threshold, configuring chip selection data of next finger taking operation according to a preset sequence, generating new reset setting and releasing signals, and carrying out reset management through the system control module so that the central processing unit controls the XIP module to take fingers again until the finger taking operation is completed.
The starting control method, the device, the computer equipment and the storage medium can support the access of the nonvolatile memory by utilizing the multi-chip module based on the XIP module to finish the starting process, reduce the probability of starting failure caused by damage of the existing nonvolatile memory, and reasonably traverse configuration parameters to each nonvolatile memory as much as possible through the multi-chip design so as to ensure that the nonvolatile memory can read data, thereby implementing flexible and efficient starting by utilizing the XIP. The central processing unit is connected with the system control module and the XIP module, the XIP module is connected with the multi-chip selection module, the system control module is connected with the multi-chip selection module, high-efficiency and simple communication interaction between the central processing unit and hardware is supported, the disabling/enabling of the switching function in the multi-chip selection module is configured in different starting stages, and the chip selection threshold values of the switching function and the chip selection function are configured, so that the central processing unit problems, such as hanging up, flying and the like, which happen accidentally in each starting stage are prevented. And automatically generating reset setting and releasing signals based on finger taking timeout caused by abnormal finger taking operation by utilizing the multi-chip selection module. And the central processing unit rapidly ends the current failed starting flow according to the reset setting and release signals generated by the multi-chip module, and reenters the new starting flow to restart the finger taking. The multi-chip selection module is matched with the XIP module to access the nonvolatile memory to execute the instruction fetching operation, so that the success rate of starting the XIP is improved, the method is suitable for reading nonvolatile memories of different types, the risk of system suspension caused by abnormality of a central processing unit in each starting stage is avoided, and the reliability of starting the whole system is improved.
Drawings
FIG. 1 is a diagram of a start control system of a start control method in a first embodiment;
FIG. 2 is a flowchart of a start control method according to a second embodiment;
FIG. 3 is a schematic diagram of address arrangement in a memory space according to a second embodiment;
FIG. 4 is a flow chart illustrating a process of a plurality of start-up phases in a second embodiment;
FIG. 5 is a flowchart of a start control method according to a third embodiment;
FIG. 6 is a schematic diagram of a configuration chip selection process of a multi-chip module according to a third embodiment;
Fig. 7 is a block diagram showing the configuration of a start control device in a fourth embodiment;
Fig. 8 is a block diagram showing the configuration of a start control device in the fifth embodiment;
Fig. 9 is an internal structural diagram of a computer device in one embodiment.
Detailed Description
Reference will now be made in detail to exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, the same numbers in different drawings refer to the same or similar elements, unless otherwise indicated. The implementations described in the following exemplary examples do not represent all implementations consistent with the application. Rather, they are merely examples of apparatus and methods consistent with aspects of the application as detailed in the accompanying claims.
It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, the element(s) defined by the phrase "comprising one does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other like elements in different embodiments of the application having the same meaning as may be defined by the same meaning as they are explained in this particular embodiment or by further reference to the context of this particular embodiment.
It should be understood that although the terms first, second, third, etc. may be used herein to describe various information, these information should not be limited by these terms. These terms are only used to distinguish one type of information from another. For example, first information may also be referred to as second information, and similarly, second information may also be referred to as first information, without departing from the scope herein. The term "if" as used herein may be interpreted as "at..once" or "when..once" or "in response to a determination", depending on the context. Furthermore, as used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context indicates otherwise. It will be further understood that the terms "comprises," "comprising," "includes," and/or "including" specify the presence of stated features, steps, operations, elements, components, items, categories, and/or groups, but do not preclude the presence, presence or addition of one or more other features, steps, operations, elements, components, items, categories, and/or groups. The terms "or", "and/or", "including at least one of", and the like, as used herein, may be construed as inclusive, or mean any one or any combination. For example, "including at least one of" A, B, C "means" any of A, B, C, A and B, A and C, B and C, A and B and C ", and as yet another example," A, B or C "or" A, B and/or C "means" any of A, B, C, A and B, A and C, B and C, A and B and C ". An exception to this definition will occur only when a combination of elements, functions, steps or operations are in some way inherently mutually exclusive.
It should be understood that, although the steps in the flowcharts in the embodiments of the present application are shown in order as indicated by the arrows, these steps are not necessarily performed in order as indicated by the arrows. The steps are not strictly limited in order and may be performed in other orders, unless explicitly stated herein. Moreover, at least some of the steps in the figures may include multiple sub-steps or stages that are not necessarily performed at the same time, but may be performed at different times, the order of their execution not necessarily occurring in sequence, but may be performed alternately or alternately with other steps or at least a portion of the other steps or stages.
The words "if", as used herein, may be interpreted as "at" or "when" or "in response to a determination" or "in response to a detection", depending on the context. Similarly, the phrase "if determined" or "if detected (stated condition or event)" may be interpreted as "when determined" or "in response to determination" or "when detected (stated condition or event)" or "in response to detection (stated condition or event), depending on the context.
It should be noted that, in this document, step numbers such as S1 and S2 are adopted, and the purpose of the present application is to more clearly and briefly describe the corresponding content, and not to constitute a substantial limitation on the sequence, and those skilled in the art may execute S2 first and then execute S1 when implementing the present application, which is within the scope of protection of the present application. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the application. In the following description, suffixes such as "module", "part" or "unit" for representing elements are used only for facilitating the description of the present application, and have no specific meaning per se. Thus, "module," "component," or "unit" may be used in combination.
First embodiment
The method for controlling start-up provided by the present application may refer to a start-up control system as shown in fig. 1. The start-up control system includes a central processing unit 110, an XIP module 120, a system control module 130, a multi-chip module 140, and a non-volatile memory 150. Central processor 110 is connected to XIP module 120 and system control module 130, XIP module 120 is connected to multi-chip module 140 and nonvolatile memory 150, and system control module 130 is connected to multi-chip module 140. Wherein, central processor 110, XIP module 120, system control module 130, and multi-chip module 140 are integrated on the same SOC chip.
The system control module 130 is responsible for coordinating and managing system level configuration and control functions, such as clock gating, exception reset control. The system control module in this embodiment serves as a bridge for connecting the cpu 110 and the multi-chip module 140. The interaction between the system control module 130 and the multi-chip module 140 in this embodiment is relatively simple, and no additional use of amba bus communication is required.
XIP module 120, employing a simplified version of the QSPI/SPI controller, has a read function. XIP module 120 uses XIP technology to directly execute code on non-volatile memory 150, eliminating the need to copy code to RAM, thereby reducing boot time, memory footprint, improving system operating efficiency, and reducing system cost and power consumption. Any Bus communication interaction may be used between XIP module 120 and cpu 110, for example, AXI (Advanced eXtensible Interface) Bus, AHB (ADVANCED HIGH Performance Bus) Bus, or APB (ADVANCED PERIPHERAL Bus) Bus, so that cpu 110 may access XIP module 120 through any Bus. XIP module 120 converts the read request access of cpu 110 into a QSPI bus waveform for communication with off-chip nonvolatile memory 150 and receives the chip select configuration of the multiple chip select module to change the QSPI bus request form in real time. Optionally, XIP module 120 reads chip select data of multi-chip select module 140 according to the instruction fetch of cpu 110, and performs the instruction fetch operation directly on non-volatile memory 150. Optionally, the cpu 110 generates the instruction fetch instruction according to the reset set and release signals. Optionally, when central processor 110 receives reset set and release signals generated by an external start key operation, chip select data of multi-chip module 140 received by XIP module 120 is initial chip select data, for example, chip select 0_configurational 0, and when central processor 110 receives reset set and release signals generated by an internal multi-chip module, chip select data of multi-chip module 140 received by XIP module 120 is chip select data configured by multi-chip module 140 based on a timeout threshold.
The nonvolatile memory 150 adopts a group of Norflash chips, a clock and a data line to share, and the chip selection is independent (refers to that in the nonvolatile memory, the selected state of each memory chip is independently controlled through a chip selection signal (CHIP SELECT, abbreviated as CS). Different norflash chips may be manufactured differently, with specific parameters that are different, such as supporting 16-bit, 24-bit, 32-bit addresses, e.g., only mode0, mode1 clock/phase polarity, etc.
The central processor 110 may be a general purpose processor, a digital signal processor, or any other conventional processor. Central processor 110 interacts with XIP module 120 to control XIP module 120 to perform a finger fetch operation, central processor 110 interacts with multi-chip module 140 via system control module 130 to enable or disable a switching function, send a timeout threshold to multi-chip module 140, send a stop command to multi-chip module 140 to control multi-chip module 140 to stop timing and stop operation, and receive reset set and release signals generated by multi-chip module 140 using reset management of system control module 130 to cause central processor 110 to control XIP module 120 to fetch fingers from zero based on the reset set and release signals.
Optionally, after receiving an external start key operation or a reset set and release signal generated by an internal multi-chip selection module, central processor 110 controls XIP module 120 to read the current chip selection data of multi-chip selection module 140 and then perform a finger picking operation on non-volatile memory 150, and when the finger picking is successful or fails, a stop command is sent to multi-chip selection module 140 through system control module 130 to control multi-chip selection module 140 to stop working. Alternatively, chip select data initialization of the multiple chip select module 140 is controlled by the system control module 130 when the set and release signals are reset externally. Optionally, central processor 110 sends a fetch instruction to XIP module 120 according to the reset set and release signals, controlling XIP module 120 to perform a fetch operation from scratch. Optionally, the central processor 110 controls the multiple chip selection module 140 to turn off/enable the switching function enable through the system control module 130. Optionally, central processor 110 sends a timeout threshold corresponding to the chip select function to multi-chip module 140 via system control module 130.
The multi-chip selection module 140 may be a general-purpose processor, and is configured with a timing clock, a reset design, and a multi-chip selection design, where the multi-chip selection design includes a plurality of chip selection parameters and configuration parameters, and when the multi-chip selection module generates reset setting and release signals, the timing of the internal clock is cleared to be re-timed. In this embodiment, the reset set and release signal generated by the multi-chip module is a reset set and release signal. Optionally, after the multi-chip selection module 140 generates a new reset set and release signal, the timing data is automatically cleared and re-clocked, and when the timing data is greater than the currently acquired timeout threshold, the chip selection data of the next finger taking operation is determined.
The starting control method adopted by the starting control system supports the access of the non-volatile memory by the multi-chip selection module under the XIP module to complete the starting process, reduces the probability of starting failure caused by damage of the non-volatile memory, supports high-efficiency and simple communication interaction between the central processing unit and hardware, configures chip selection data required by the instruction taking operation based on timeout threshold values transmitted to the multi-chip selection module by the central processing unit in different starting stages of software, so as to prevent the problem of the central processing unit, such as the phenomena of suspension, flying and the like, caused by accidents in each starting stage, automatically configures the next chip selection data after the multi-chip selection module is overtime, generates reset setting and release signals to feed back to the central processing unit, so that the central processing unit can quickly finish the starting process which fails at present and reenter the starting process, and utilizes the multi-chip selection module to assist the instruction taking operation of the XIP module, improve the starting success rate of the XIP module, adapt to the reading of the non-volatile memory of different types, avoid the abnormal occurrence of the central processing unit in each starting stage, thereby improving the starting reliability of the whole system.
Second embodiment
In one embodiment, as shown in fig. 2, a startup control method is provided, and the method is applied to the central processing unit in fig. 1, where the central processing unit is respectively connected to a system control module and an XIP module, the XIP module is connected to a multi-chip module, and the system control module is connected to the multi-chip module. The starting control method provided by the embodiment comprises the following steps:
s10, responding to receiving reset setting and release signals, and controlling an XIP module to start finger fetching operation;
s20, determining a starting stage according to the finger taking operation, and controlling a multi-chip selection module to acquire a timeout threshold corresponding to the starting stage through a system control module;
and S30, when the starting stage does not normally operate, receiving reset setting and releasing signals generated by the multi-chip selection module based on the timeout threshold, and controlling the XIP module to re-take fingers based on the reset setting and releasing signals until all the starting stages normally operate, and finishing starting.
Alternatively, reset set and release refers to an operation in a computer system that restores the state of certain hardware devices or software programs to their original state. In short, reset set and release is to allow some devices to restart to ensure proper operation. Resetting and releasing the set helps to address system failures or ensure the necessary steps for proper system operation. The main functions of resetting and releasing comprise ‌ solving the system fault and initializing the hardware device. For example, some devices or programs may have abnormal states or deadlocks due to long-time running, software bug, hardware fault and the like, and resetting and releasing can enable the devices or programs to forcedly restore the original states, so that the faults are relieved. For another example, in some application environments, reset set and release may be used to initialize hardware devices or clear certain temporary data, speeding up system response. The implementation of reset set and release typically includes ‌ system commands, ‌ software programming, ‌ physical switches. ‌ system commands refer to the implementation of reset set and release by system commands issued by the operating system or hardware drivers. ‌ software programming, which means that reset set and release operations are implemented by specific codes in the software programming. ‌ physical switches, which means that some devices implement reset operation through physical switches on the hardware level. Since the start control method in this embodiment is illustrated by using the cpu as an example, when the received reset set and release signal is from the outside, the reset set and release signal may be triggered by one of ‌ system command, ‌ software program, and ‌ physical switch, and when the received reset set and release signal is from the inside, the trigger condition may be preset, for example, the predetermined time is exceeded.
Alternatively, a fetch operation refers to the process of fetching an instruction from non-volatile memory into an instruction register. The fetch operation in this embodiment is that the XIP module uses chip select data transmitted by the multi-chip select module to determine the location of the instruction in the nonvolatile memory, and then reads and executes the instruction from the nonvolatile memory.
Optionally, the timeout threshold includes a first timeout, a second timeout. The first timeout is used for controlling the switching function to acquire the chip selection data, and the second timeout is used for controlling the chip selection function to acquire the chip selection data.
Optionally, the step of controlling, by the system control module, the multi-chip module to obtain a timeout threshold corresponding to the start-up phase in step S20 includes:
S121, when the starting stage is a preset initial starting stage, enabling a switching function in a multi-chip selection module to be enabled through a system control module so as to obtain a first timeout preset by the switching function;
S122, when the starting stage is a preset non-initial starting stage, switching function enabling in the multi-chip selection module is closed through the system control module, and a second timeout corresponding to the chip selection function is sent to the multi-chip selection module.
The CPU distributes corresponding second time-out to the chip selection function of the multi-chip selection module through the system control module in different starting stages so as to generate reset setting and releasing signals based on the second time-out of the chip selection function when the switching function is closed and enabled. Optionally, the priority of the switching function is higher than the priority of the chip select function, the switching function is prioritized when both the switching function and the chip select function are in an enabled state, and the chip select function is considered when the switching function is disabled.
Optionally, before step S10, the method includes pre-dividing a plurality of starting stages in the starting process according to the finger fetching operation. Optionally, the plurality of boot phases includes a BOOTROM phase, a UBOOT phase, and a KERNEL phase. Optionally, the plurality of starting stages include a BOOTROM stage for directly fetching a finger from the flash memory and actively transferring a program from the flash memory to the internal static memory, a UBOOT stage for verifying the transferred program, and a KERNEL stage for jumping the pointer to a new address to execute the transferred program.
Optionally, the embodiment sends different timeout thresholds to the multi-chip module through the system control module in different startup phases, for example, a first timeout of 1s in the BOOTROM phase, a second timeout of 3s in the UBOOT phase, and a second timeout of 10s in the kennel phase. Further, when the finger taking operation is not normally operated in the BOOTROM stage, that is, after the finger taking operation fails, a new reset setting and releasing signal transmitted by the multi-chip module is received, and the new finger taking operation is started. Optionally, the first timeout is preset to be 1 second or less, so as to end the current start-up procedure as soon as possible, and if the finger taking operation in the BOOTROM stage is successfully completed, the finger taking operation will enter the uboot stage. Further, the switching function is turned off (i.e., the switching function is disabled, i.e., the first timeout is disabled) in the uboot phase by the system control module, and a second timeout corresponding to the uboot phase is sent to the multi-chip module by the system control module. Optionally, if the verification fails or other anomalies cause timeout in the uboot stage, a reset setting and releasing signal transmitted by the multi-chip module is received to end the current starting flow, and if the finger fetching operation in the uboot stage is successfully executed, the finger fetching operation will enter a kernel stage. Further, a second timeout corresponding to the kernel phase is sent to the multi-chip module by the system control module during the kernel phase. Optionally, if an error or other abnormality occurs in execution of the moving program in the kernel stage, a reset setting and releasing signal transmitted by the multi-chip module is received to end the current start-up procedure.
Optionally, in any start-up phase, when the central processor no longer needs the reset set and release signals generated by the multi-chip module, a stop command is sent to the multi-chip module through the system control module to control the multi-chip module to stop timing and stop working.
Optionally, all the nonvolatile memories need to pre-cure the bin file, and referring to fig. 3, an address arrangement schematic diagram in the storage space is shown. The BOOTROM is arranged at the beginning of the 0 address, and the uboot code and the kernel code and the verification are sequentially arranged behind.
Optionally, in this embodiment, for each startup phase, a switching function, an enabled state of a chip selection function, a switching function, and a timeout threshold of the chip selection function are preset. Optionally, during the BOOTROM stage, the switching function is enabled, when the finger taking operation does not normally run after the timeout threshold, the reset setting and releasing signals transmitted by the multi-chip module are received, and simultaneously, the timeout threshold of the next starting stage (UBOOT stage or KERNEL stage) is sent to the multi-chip module through the system control module, and the switching function is enabled is turned off. In this embodiment, the BOOTROM phase is used as an initial startup phase, and the UBOOT phase and the kenel phase are used as non-initial startup phases. Alternatively, in practical applications, more start-up phases may be subdivided.
In one embodiment, referring to FIG. 4, a flow diagram of a fetch operation for multiple boot phases of a CPU is shown.
S101, receiving reset setting and releasing signals, controlling the XIP module to start finger fetching operation, and entering a BOOTROM stage. Optionally, the XIP module performs a finger fetch operation on the nonvolatile memory after reading the chip select data of the multi-chip module, wherein when the reset set and release signals come from outside, the chip select data of the multi-chip module is initialized through the system control module, and the switching function enabling of the multi-chip module is enabled through the system control module so that the multi-chip module obtains a first timeout of the switching function, so that the multi-chip module obtains a new reset set and release signal generated by the multi-chip module based on the first timeout.
S102, judging whether the instruction fetching operation of the BOOTROM stage runs normally, if so, closing the switching function enabling of the multi-chip selection module through the system control module, and sending a second timeout of the next starting stage (UBOOTT stage) to the multi-chip selection module through the system control module to enter the UBOOTT stage;
S103, judging whether the fetching operation of the UBOOT stage is normally operated, if so, sending a second timeout of a next starting stage (KERNEL stage) to the multi-chip module through the system control module to enter the KERNEL stage, and if not, receiving reset setting and releasing signals newly generated by the multi-chip module after the second timeout so as to control the XIP module to fetch the fingers again;
S104, judging whether the instruction fetching operation in the KERNEL stage is normal or not, if so, sending a stop command to the multi-chip selection module through the system control module, and if not, receiving a reset setting and release signal newly generated by the multi-chip selection module after the second timeout occurs so as to control the XIP module to fetch the instruction again. Optionally, when the preset timeout condition is exceeded, the abnormal state of the multiple chip selection module is read through the system control module, so that the central processor triggers a prompt for an implementation personnel to debug and check according to the abnormal state.
In one embodiment, the second timeout of the chip select function is set to 3 seconds in the UBOOT stage, the second timeout of the chip select function is set to 10 seconds in the kennel stage, the switching function is turned off to enable when the finger fetch operation is completed in the BOOTROM stage, the second timeout is configured to 3 seconds based on the next start stage, the configured second timeout is updated to 10 seconds in the kennel stage when the finger fetch operation is normally executed in the UBOOT stage, and then the multiple finger fetch operations are executed based on the second timeout of 10 seconds.
Optionally, when the reset setting and releasing signals come from the outside, the multi-chip module receives the externally triggered reset setting and releasing signals and feeds the externally triggered reset setting and releasing signals back to the system control module, the system control module controls global reset according to the reset setting signals so as to enable the external reset setting release, the multi-chip module reset setting release, the system control module self reset setting release, the SOC bus reset setting release, the central processing unit reset setting release and the XIP module reset setting release to be carried out, and the central processing unit controls the XIP module to start the finger taking operation based on the global reset triggered by the system control module.
The starting control method is applied to a central processing unit, and is used for responding to receiving reset setting and releasing signals to control an XIP module to start finger taking operation, determining a starting stage according to the finger taking operation, sending a timeout threshold corresponding to the starting stage to the multi-chip module through the system control module, receiving the reset setting and releasing signals generated by the multi-chip module based on the timeout threshold when the starting stage does not normally operate, and controlling the XIP module to re-take fingers based on the reset setting and releasing signals until all the starting stages normally operate to finish starting. The method can support the access of the multi-chip module to the nonvolatile memory based on the XIP module to complete the starting process, reduce the probability of starting failure caused by damage of the existing nonvolatile memory, and traverse configuration parameters of each nonvolatile memory as much as possible and reasonably through the multi-chip design so as to ensure that the nonvolatile memory can read data, thereby implementing flexible and efficient starting by using the XIP. The central processing unit is connected with the system control module and the XIP module, the XIP module is connected with the multi-chip selection module, the system control module is connected with the multi-chip selection module, high-efficiency and simple communication interaction between the central processing unit and hardware is supported, the disabling/enabling of the switching function in the multi-chip selection module is configured in different starting stages, and the chip selection threshold values of the switching function and the chip selection function are configured, so that the central processing unit problems, such as hanging up, flying and the like, which happen accidentally in each starting stage are prevented. And automatically generating reset setting and releasing signals based on finger taking timeout caused by abnormal finger taking operation by utilizing the multi-chip selection module. And the central processing unit rapidly ends the current failed starting flow according to the reset setting and release signals generated by the multi-chip module, and reenters the new starting flow to restart the finger taking. The multi-chip selection module is matched with the XIP module to access the nonvolatile memory to execute the instruction fetching operation, so that the success rate of starting the XIP is improved, the method is suitable for reading nonvolatile memories of different types, the risk of system suspension caused by abnormality of a central processing unit in each starting stage is avoided, and the reliability of starting the whole system is improved.
Third embodiment
In one embodiment, as shown in fig. 5, a startup control method is provided, and the method is applied to the multi-chip module in fig. 1, where the multi-chip module is connected to a system control module, and an XIP module, and the system control module is connected to a central processor, and the XIP module is connected to the central processor.
S21, responding to a trigger reset setting and releasing signal, re-timing to acquire timing data and acquiring a timeout threshold;
S22, when the timing data is larger than the timeout threshold, chip selection data of next finger taking operation is configured according to a preset sequence, a new reset setting and releasing signal is generated and fed back to the central processing unit through the system control module, so that the central processing unit controls the XIP module to re-take fingers until the finger taking operation is completed.
Optionally, when the reset set and release signals are from the outside, step S21 further includes resetting the chip select data to initialize the chip select data.
Optionally, the timeout threshold in step S21 comprises a first timeout and a second timeout, and the step of acquiring the timeout threshold in step S21 comprises the following steps:
Enabling a switching function enabling in the multi-chip module based on the system control module to obtain a first timeout of the switching function preconfigured;
And closing the switching function enabling in the multi-chip module based on the system control module, and receiving the second timeout sent by the central processing unit through the system control module.
Optionally, after the multi-chip module generates the reset set and release signals, the timeout threshold automatically reverts to the first timeout.
Optionally, the timing data in step S21 is the data after the counter counts the operations, in this embodiment, the mechanism to be triggered is measured, the timing data is compared with a timeout threshold, a time for the finger taking operation is reserved for a time up to the timeout threshold, when the finger taking operation does not normally run within the timeout threshold, the finger taking failure is indicated, chip selection data required by the next finger taking operation is configured for reading by the XIP module, and new reset setting and release signals are generated, reset and managed by the system control module, and fed back to the central processor. Optionally, the XIP module is controlled to take a finger from zero each time the cpu receives reset set and release signals.
Optionally, the step S22 involves a handover function and a chip selection function. The switching function in the multi-chip module is preconfigured with a first timeout, and when the multi-chip module generates reset setting and releasing signals, the timeout threshold is returned to the first timeout. After the fetch operation of the XIP module is unsuccessful and the timing data reaches a first timeout, the multi-chip select module generates new reset set and release signals and determines the chip select data of the next fetch operation. Further, the multi-chip selection module is traversed, and chip selection values and/or configuration values in the chip selection data of the next finger-taking operation are sequentially modified.
Further, the priority of the switch function is higher than the chip select function, the chip select data is configured by the switch function when the switch function is enabled, and the chip select data is configured by the chip select function when the switch function is disabled. The switching function of the multi-chip selection module comprises a plurality of chip selection values, and each chip selection value comprises a plurality of configuration values. Optionally, the chip selection data of the multi-chip selection module includes { chip selection_0 configuration_0, chip selection_0 configuration_1, chip selection_0 configuration_2, chip selection_1 configuration_0, chip selection_1 configuration_1, chip selection_1 configuration_2, chip selection_2 configuration_0, chip selection_2 configuration_1, chip selection_2 configuration_2 }, and when traversing the multi-chip selection module, the configured chip selection data is sent to the XIP module from the chip selection_0 configuration_0 to the chip selection_2 configuration_2 so that the XIP module performs the finger fetching operation according to the chip selection data.
And receiving a second timeout for the chip selection function configuration by the central processing unit, generating new reset setting and releasing signals by the multi-chip selection module after the instruction fetching operation of the XIP module is unsuccessful and the timing data reaches the second timeout, and determining the chip selection data of the next instruction fetching operation. Further, the multi-chip selection module is traversed, and chip selection values of chip selection data of the next finger taking operation are sequentially modified. Optionally, the chip selection data of the multi-chip selection module includes {
Chip select_0 configuration_0, chip select_0 configuration_1, chip select_0 configuration_2, chip select_1 configuration_0, chip select_1 configuration_1, chip select_1 configuration_2, chip select_2 configuration_0, chip select_2 configuration_1, chip select_2 configuration_2 }, modifying chip select values from chip select_0 configuration_0 to chip select_2 configuration_0 when traversing the multi-chip select module, and providing the configured chip select data for an XIP module to read so that the XIP module performs a finger fetching operation on a nonvolatile memory according to the chip select data.
Optionally, in step S22, when the timing data is greater than the timeout threshold, chip selection data of a next finger fetching operation is configured according to a preset sequence, including:
s221, judging whether a preset switching function is enabled, if yes, comparing the timing data with a first timeout, and configuring chip selection data of the next finger taking operation according to a chip selection and configuration sequence when the timing data is larger than the first timeout;
s222, if the switching function is closed and enabled, comparing the timing data with a second timeout, and when the timing data is larger than the second timeout, configuring the chip selection data of the next finger taking operation according to the chip selection sequence.
Optionally, in step S221, the step of configuring the chip selection data of the next finger fetching operation in a preset order includes:
Determining chip selection data of the current finger taking operation;
When the switching function is enabled and the timing data is greater than the first timeout, determining a configuration value and/or a chip selection value of chip selection data of the next finger taking operation;
or when the switching function is disabled and the timing data is larger than the second timeout, determining the chip selection value of the chip selection data required by the next finger taking operation.
When the external part from the set and release signals is reset, the chip selection data of the finger taking operation is initial chip selection data, for example, the chip selection 0_configurational 0.
The step of determining the configuration value and/or the chip selection value of the chip selection data of the next finger taking operation comprises the following steps:
Judging whether the chip selection data is the last configuration value of the current chip selection, if so, continuing to judge whether the chip selection data is the last chip selection value, if so, reading the abnormal state of the multi-chip selection module through the system control module, if the chip selection data is not the last configuration value of the current chip selection, determining the configuration value of the next chip selection and triggering a new reset setting and releasing signal, and if the chip selection data is not the last chip selection value, determining the chip selection value of the next chip selection and triggering a new reset setting and releasing signal.
Optionally, referring to fig. 6, a schematic flow chart of the operation of the multi-chip module is shown.
S41, generating new reset setting and releasing signals, resetting the count, and re-counting to obtain timing data, wherein when the reset setting and releasing signals of the finger taking operation come from the outside, initializing chip selection data;
s42, judging whether a switching function is enabled, if so, turning to S43, and if not, turning to S44;
s43, waiting for the timing data to reach a first timeout, and then turning to S45;
s44, waiting for the timing data to reach a second timeout, and then turning to S46;
s45, judging whether the chip selection data is the last configuration value of the current chip selection, if so, turning to S46, otherwise, turning to S48;
s46, judging whether the chip selection data is the last chip selection value, if so, turning to S47, otherwise, turning to S49;
s47, controlling the multi-chip selection module to stop abnormally;
s48, determining a configuration value of the next selection, and turning to S41;
S49, determining a chip selection value of the next chip selection, and turning to S41.
Alternatively, for the cpu, each time a reset set and release signal is received, a new start point is used to perform the finger fetch operation from zero. When the central processing unit receives reset setting and release signals from the outside, the XIP module starts the instruction fetching operation, and the system control module controls the multi-chip selection module to initialize chip selection data so that the XIP module reads the initial chip selection data and starts the instruction fetching operation. Optionally, the initial chip selection data is in a first configuration of a first chip selection, and when the reset set and release signals come from outside, the system control module controls the multi-chip selection module to initialize the chip selection data. The initial chip select data is chip select 0_configurational 0. When the reset setting and releasing signals come from the inside, namely the failure of the finger taking operation leads to overtime, the multi-chip selection module generates new reset setting and releasing signals due to overtime and feeds back the new reset setting and releasing signals to the central processing unit, and configures chip selection data of the next finger taking operation for reading by the XIP module.
Optionally, when the switching function is enabled, when the timing data exceeds the first timeout, the multi-chip module generates a new reset set and release signal to the central processing unit, and the central processing unit receives the reset set and release signal generated by the multi-chip module, and performs the finger fetching operation from zero. For example, when configuring the chip select data of the next finger fetch operation, if the current chip select data (the chip select data is assumed to include the chip select (0, 1, 2) _configuration (0, 1, 2)) is the last configuration of the current chip select, the next chip select is switched (for example, the next chip select of the chip select 0_configuration 2 is the chip select 1_configuration 0), otherwise, the next chip select data is switched (for example, the next chip select 1_configuration 0 is the chip select 1_configuration 1).
Optionally, when the switching function is disabled, when the timing data exceeds the second timeout, the multi-chip module generates a reset setting and releasing signal to the central processor, and the central processor performs the finger taking operation from zero according to the reset setting and releasing signal generated by the multi-chip module. For example, assuming the current chip select data is the last chip select value, no new reset set and release signals will be generated since no chip select value is optional, otherwise the next chip select value will be determined.
Optionally, after the XIP module completes the finger fetching operation in all the start phases, the central processor sends a stop command to the multi-chip selection module through the system control module, and the multi-chip selection stops counting in any case, and no new reset set and release signals are generated. When the multi-chip selection module generates a timeout condition when the chip selection data is the last chip selection value and the last configuration value, the counting is stopped, a reset setting and releasing signal is not generated, and the current state is kept, so that the central processing unit/system generates a corresponding reminder for debugging and checking by an implementer.
Optionally, when the reset setting and releasing signals come from the inside, namely the reset setting and releasing signals generated by the multi-chip selection module, the timing data of the multi-chip selection module reaches a timeout threshold, the system control module receives the reset setting and releasing signals of the multi-chip selection module and controls the preset global reset to enable the Soc bus, the multi-chip selection module, the central processing unit and the XIP module to enter a reset state according to the reset setting and releasing signals, the multi-chip selection module is cleared in timing, and the central processing unit controls the XIP module to retrieve the fingers again.
The starting control method is applied to a multi-chip selection module, responds to a trigger reset setting and release signal, rechems to acquire timing data, receives a timeout threshold value transmitted by the central processing unit through the system control module, configures chip selection data of next finger picking operation according to a preset sequence when the timing data is larger than the timeout threshold value, generates new reset setting and release signals, and carries out reset management through the system control module, so that the central processing unit controls the XIP module to pick fingers again until the finger picking operation is completed. The method can support the access of the multi-chip module to the nonvolatile memory based on the XIP module to complete the starting process, reduce the probability of starting failure caused by damage of the existing nonvolatile memory, and traverse configuration parameters of each nonvolatile memory as much as possible and reasonably through the multi-chip design so as to ensure that the nonvolatile memory can read data, thereby implementing flexible and efficient starting by using the XIP. The central processing unit is connected with the system control module and the XIP module, the XIP module is connected with the multi-chip selection module, the system control module is connected with the multi-chip selection module, high-efficiency and simple communication interaction between the central processing unit and hardware is supported, the disabling/enabling of the switching function in the multi-chip selection module is configured in different starting stages, and the chip selection threshold values of the switching function and the chip selection function are configured, so that the central processing unit problems, such as hanging up, flying and the like, which happen accidentally in each starting stage are prevented. And automatically generating reset setting and releasing signals based on finger taking timeout caused by abnormal finger taking operation by utilizing the multi-chip selection module. And the central processing unit rapidly ends the current failed starting flow according to the reset setting and release signals generated by the multi-chip module, and reenters the new starting flow to restart the finger taking. The multi-chip selection module is matched with the XIP module to access the nonvolatile memory to execute the instruction fetching operation, so that the success rate of starting the XIP is improved, the method is suitable for reading nonvolatile memories of different types, the risk of system suspension caused by abnormality of a central processing unit in each starting stage is avoided, and the reliability of starting the whole system is improved.
Fourth embodiment
In one embodiment, as shown in fig. 7, there is provided a start control apparatus, including a signal receiving module 110, a threshold transmitting module 120, and an instruction taking control module 130, wherein:
a signal receiving module 110, configured to control the XIP module to start the finger fetching operation in response to receiving the reset set and release signals;
the threshold sending module 120 is configured to determine a start stage according to the finger fetching operation, and control the multi-chip module to obtain a timeout threshold corresponding to the start stage through the system control module;
And the instruction fetch control module 130 is configured to obtain a reset setting and releasing signal generated by the multi-chip module based on the timeout threshold when the starting stage does not operate normally, so as to control the XIP module to fetch instructions again based on the reset setting and releasing signal until all the starting stages operate normally.
Fifth embodiment
In one embodiment, as shown in fig. 8, there is provided a start control apparatus, including a data acquisition module 210 and a chip selection configuration module 220, wherein:
A data acquisition module 210, configured to, in response to triggering the reset set and release signals, re-clock to acquire timing data and acquire a timeout threshold;
And the chip selection configuration module 220 is configured to configure chip selection data of a next finger taking operation according to a preset sequence when the timing data is greater than the timeout threshold, and generate a new reset set and release signal to be reset and managed by the XIP module, so that the central processing unit controls the XIP module to re-take fingers until the finger taking operation is completed.
The specific limitation of the start control device may be referred to as the limitation of the start control method hereinabove, and will not be described herein. The respective modules in the above-described start control apparatus may be implemented in whole or in part by software, hardware, and combinations thereof. The above modules may be embedded in hardware or may be independent of a processor in the computer device, or may be stored in software in a memory in the computer device, so that the processor may call and execute operations corresponding to the above modules.
In one embodiment, a computer device is provided, which may be a server, the internal structure of which may be as shown in fig. 7. The computer device includes a processor, a memory, a network interface, and a database connected by a system bus. Wherein the processor of the computer device is configured to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, computer programs, and a database. The internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage media. The database of the computer device is used to store the start control data. The network interface of the computer device is used for communicating with an external terminal through a network connection. The computer program is executed by a processor to implement a start-up control method.
It will be appreciated by those skilled in the art that the structure shown in FIG. 7 is merely a block diagram of some of the structures associated with the present inventive arrangements and is not limiting of the computer device to which the present inventive arrangements may be applied, and that a particular computer device may include more or fewer components than shown, or may combine some of the components, or have a different arrangement of components.
In one embodiment, a computer device is provided comprising a memory and a processor, the memory having stored therein a computer program, the processor when executing the computer program performing the steps of:
when the starting stage does not normally operate, receiving reset setting and release signals generated by the multi-chip module based on the timeout threshold, and controlling the XIP module to re-pick the fingers based on the reset setting and release signals until all the starting stages normally operate, and finishing starting;
or the processor when executing the computer program performs the steps of:
And when the timing data is larger than the timeout threshold, configuring chip selection data of next finger taking operation according to a preset sequence, generating new reset setting and releasing signals, and carrying out reset management through the system control module so that the central processing unit controls the XIP module to re-take fingers until the finger taking operation is completed.
In one embodiment, a computer readable storage medium is provided having a computer program stored thereon, which when executed by a processor, performs the steps of:
when the starting stage does not normally operate, receiving reset setting and release signals generated by the multi-chip module based on the timeout threshold, and controlling the XIP module to re-pick the fingers based on the reset setting and release signals until all the starting stages normally operate, and finishing starting;
Or the computer program when executed by a processor performs the steps of:
And when the timing data is larger than the timeout threshold, configuring chip selection data of next finger taking operation according to a preset sequence, generating new reset setting and releasing signals, and carrying out reset management through the system control module so that the central processing unit controls the XIP module to re-take fingers until the finger taking operation is completed. Those skilled in the art will appreciate that implementing all or part of the above-described embodiment methods may be accomplished by way of a computer program stored on a non-transitory computer readable storage medium, which when executed, may comprise the steps of the embodiments of the methods described above. Any reference to memory, storage, database, or other medium used in embodiments provided herein may include non-volatile and/or volatile memory. The nonvolatile memory can include Read Only Memory (ROM), programmable ROM (PROM), electrically Programmable ROM (EPROM), electrically Erasable Programmable ROM (EEPROM), or flash memory. Volatile memory can include Random Access Memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in a variety of forms such as Static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double Data Rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (SYNCHLINK) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), among others.
The technical features of the above embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.
The above examples illustrate only a few embodiments of the application, which are described in detail and are not to be construed as limiting the scope of the application. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the application, which are all within the scope of the application. Accordingly, the scope of protection of the present application is to be determined by the appended claims.

Claims (12)

1.一种启动控制方法,应用于中央处理器,所述中央处理器分别与系统控制模块、XIP模块连接,所述XIP模块与多片选模块连接,所述系统控制模块与所述多片选模块连接,所述XIP模块用于访问非易失性存储器以执行取指操作,其特征在于,所述方法包括:1. A boot control method applied to a central processing unit (CPU), wherein the CPU is connected to a system control module and an XIP module, the XIP module is connected to a multi-chip select (MCS) module, the system control module is connected to the MCS module, and the XIP module is used to access non-volatile memory to perform instruction fetch operations, characterized in that the method comprises: S10:响应于外部启动键操作生成的接收复位置位和释放信号,控制所述XIP模块开始访问所述非易失性存储器以执行取指操作;S10: In response to the receive reset and release signals generated by the external start key operation, control the XIP module to start accessing the non-volatile memory to perform an instruction fetch operation; S20:根据所述取指操作确定当前启动阶段,所述启动阶段包括预设的初始启动阶段和非初始启动阶段;通过所述系统控制模块控制所述多片选模块获取与当前启动阶段对应的超时阈值,其中当所述当前启动阶段为所述初始启动阶段时,所获取的超时阈值为第一超时,当所述当前启动阶段为所述非初始启动阶段时,所获取的超时阈值为第二超时;S20: Determine the current startup stage based on the instruction fetch operation. The startup stage includes a preset initial startup stage and a non-initial startup stage. Control the multi-chip select module through the system control module to obtain a timeout threshold corresponding to the current startup stage. When the current startup stage is the initial startup stage, the obtained timeout threshold is a first timeout. When the current startup stage is the non-initial startup stage, the obtained timeout threshold is a second timeout. S30:当所述启动阶段未正常运行时,接收所述多片选模块基于所述超时阈值生成的复位置位和释放信号,并基于所述复位置位和释放信号控制所述XIP模块重新访问所述非易失性存储器以执行取指操作,直至所有所述启动阶段均正常运行,完成启动。S30: When the startup phase does not run normally, the multi-chip select module receives the reset bit and release signal generated based on the timeout threshold, and controls the XIP module to re-access the non-volatile memory to perform instruction fetch operation based on the reset bit and release signal, until all startup phases run normally and the startup is completed. 2.根据权利要求1所述的方法,其特征在于,所述S20的步骤,包括:2. The method according to claim 1, wherein step S20 comprises: 当所述启动阶段为预设的初始启动阶段时,通过所述系统控制模块启用所述多片选模块中的切换功能使能,以得到所述切换功能预先配置的所述第一超时;When the startup phase is a preset initial startup phase, the switching function in the multi-chip select module is enabled by the system control module to obtain the first timeout pre-configured by the switching function; 当所述启动阶段为预设的非初始启动阶段时,通过所述系统控制模块关闭所述多片选模块中的切换功能使能,并向所述多片选模块发送对应于片选功能的所述第二超时。When the startup phase is a preset non-initial startup phase, the system control module disables the switching function enable in the multi-chip select module and sends the second timeout corresponding to the chip select function to the multi-chip select module. 3.根据权利要求1所述的方法,其特征在于,所述S20之前,包括:3. The method according to claim 1, characterized in that, before step S20, it includes: 根据所述取指操作预先划分启动流程中的多个启动阶段,所述多个启动阶段包括预设的初始启动阶段和非初始启动阶段。The startup process is pre-divided into multiple startup stages based on the instruction fetching operation. These multiple startup stages include a preset initial startup stage and a non-initial startup stage. 4.根据权利要求3所述的方法,其特征在于,所述多个启动阶段包括:4. The method according to claim 3, wherein the plurality of startup phases include: 直接从闪存中取指,并主动从闪存搬程序到内部静态存储器的BOOTROM阶段;The BOOTROM stage fetches instructions directly from flash memory and actively moves the program from flash memory to internal static memory. 对搬移的程序进行校验的UBOOT阶段;The U-Boot stage verifies the relocation process; 指针会跳到新地址执行搬移的程序的KERNEL阶段;The pointer will jump to the KERNEL stage of the relocation procedure at the new address; 其中,所述BOOTROM阶段作为所述初始启动阶段,所述UBOOT阶段和所述KERNEL阶段作为所述非初始启动阶段。The BOOTROM stage serves as the initial startup stage, while the UBOOT stage and the KERNEL stage serve as the non-initial startup stages. 5.一种启动控制方法,应用于多片选模块,所述多片选模块与系统控制模块、XIP模块连接,所述系统控制模块与中央处理器连接,所述XIP模块与所述中央处理器连接,所述XIP模块用于访问非易失性存储器以执行取指操作,其特征在于,所述方法包括:5. A startup control method applied to a multi-chip select module, wherein the multi-chip select module is connected to a system control module and an XIP module, the system control module is connected to a central processing unit (CPU), the XIP module is connected to the CPU, and the XIP module is used to access non-volatile memory to perform instruction fetch operations, characterized in that the method includes: S21,响应于由所述多片选模块生成的复位置位和释放信号,重新计时以获取计时数据,以及获取超时阈值,所述超时阈值包括用于控制切换功能获取片选数据的第一超时和用于控制片选功能获取片选数据的第二超时;S21, in response to the reset and release signals generated by the multi-chip select module, the timing is restarted to obtain timing data, and a timeout threshold is obtained, the timeout threshold including a first timeout for controlling the switching function to obtain chip select data and a second timeout for controlling the chip select function to obtain chip select data; S22,判断预设的切换功能是否使能,若启用切换功能使能,则将所述计时数据与所述第一超时进行比较,在所述计时数据大于所述第一超时时,按片选及配置顺序配置下一次所述XIP模块访问所述非易失性存储器以执行取指操作所需的片选数据,生成新的复位置位和释放信号且通过所述系统控制模块复位管理;和/或,若关闭切换功能使能,则将所述计时数据与所述第二超时进行比较,在所述计时数据大于所述第二超时时,按片选顺序配置下一次所述XIP模块访问所述非易失性存储器以执行取指操作的片选数据,生成新的复位置位和释放信号且通过所述系统控制模块复位管理,以便所述中央处理器控制所述XIP模块重新访问所述非易失性存储器以执行取指操作,直至完成取指操作。S22, determine whether the preset switching function is enabled. If the switching function is enabled, compare the timing data with the first timeout. If the timing data is greater than the first timeout, configure the chip select data required for the next XIP module to access the non-volatile memory to perform the instruction fetch operation according to the chip select and configuration order, generate a new reset bit and release signal, and reset the management through the system control module; and/or, if the switching function is disabled, compare the timing data with the second timeout. If the timing data is greater than the second timeout, configure the chip select data for the next XIP module to access the non-volatile memory to perform the instruction fetch operation according to the chip select order, generate a new reset bit and release signal, and reset the management through the system control module, so that the central processing unit controls the XIP module to re-access the non-volatile memory to perform the instruction fetch operation until the instruction fetch operation is completed. 6.根据权利要求5所述的方法,其特征在于,所述超时阈值包括第一超时、第二超时;所述获取超时阈值的步骤,包括:6. The method according to claim 5, wherein the timeout threshold includes a first timeout and a second timeout; the step of obtaining the timeout threshold includes: 基于所述系统控制模块启用所述多片选模块中的切换功能使能,以得到所述切换功能预先配置的第一超时;Based on the system control module enabling the switching function in the multi-chip select module, the first timeout pre-configured for the switching function is obtained; 基于所述系统控制模块关闭所述多片选模块中的切换功能使能,并接收所述中央处理器通过所述系统控制模块发送的所述第二超时。The system control module disables the switching function in the multi-chip select module and receives the second timeout sent by the central processing unit through the system control module. 7.根据权利要求5所述的方法,其特征在于,所述按片选顺序或者配置顺序配置下一次所述XIP模块访问所述非易失性存储器执行取指操作的片选数据的步骤,包括:7. The method according to claim 5, wherein the step of configuring the chip select data for the next instruction fetch operation performed by the XIP module when accessing the non-volatile memory according to the chip select order or configuration order includes: 确定当前所述取指操作的片选数据;Determine the chip select data for the current instruction fetch operation; 在所述切换功能使能,且所述计时数据大于所述第一超时时,确定下一次所述XIP模块访问所述非易失性存储器执行取指操作所需的所述片选数据的配置值和/或片选值;When the switching function is enabled and the timing data is greater than the first timeout, the configuration value and/or chip select value of the chip select data required for the next instruction fetch operation by the XIP module to access the non-volatile memory is determined. 或者,在所述切换功能禁能,且所述计时数据大于所述第二超时时,确定下一次所述XIP模块访问所述非易失性存储器执行取指操作所需的所述片选数据的片选值。Alternatively, when the switching function is disabled and the timing data is greater than the second timeout, determine the chip select value of the chip select data required for the next instruction fetch operation performed by the XIP module to access the non-volatile memory. 8.根据权利要求7所述的方法,其特征在于,所述确定下一次所述XIP模块访问所述非易失性存储器执行取指操作的所述片选数据的配置值和/或片选值的步骤,包括:8. The method according to claim 7, wherein the step of determining the configuration value and/or chip select value of the chip select data for the next instruction fetch operation performed by the XIP module on the non-volatile memory includes: 判断所述片选数据是否为当前片选的最后一个配置值,若是则继续判断所述片选数据是否为最后一个片选值,若是则通过所述系统控制模块读取所述多片选模块的异常状态;Determine whether the chip select data is the last configuration value of the current chip select. If so, continue to determine whether the chip select data is the last chip select value. If so, read the abnormal status of the multi-chip select module through the system control module. 若所述片选数据不是当前片选的最后一个配置值,则确定下一片选的配置值,并触发新的复位置位和释放信号;If the chip select data is not the last configuration value of the current chip select, then determine the configuration value of the next chip select and trigger a new reset and release signal; 若所述片选数据不是最后一个片选值,则确定下一片选的片选值,并触发新的复位置位和释放信号。If the chip select data is not the last chip select value, then determine the chip select value of the next chip select and trigger a new reset bit and release signal. 9.一种启动控制装置,应用于中央处理器,所述中央处理器分别与系统控制模块、XIP模块连接,所述XIP模块与多片选模块连接,所述系统控制模块与所述多片选模块连接,所述XIP模块用于访问非易失性存储器以执行取指操作,其特征在于,所述装置包括:9. A boot control device applied to a central processing unit (CPU), wherein the CPU is connected to a system control module and an XIP module, the XIP module is connected to a multi-chip select (MCS) module, the system control module is connected to the MCS module, and the XIP module is used to access non-volatile memory to perform instruction fetch operations, characterized in that the device comprises: 信号接收模块,用于响应于接收外部启动键操作生成的复位置位和释放信号,控制所述XIP模块开始访问所述非易失性存储器以执行取指操作;The signal receiving module is used to control the XIP module to start accessing the non-volatile memory to perform an instruction fetch operation in response to receiving a reset and release signal generated by an external start key operation; 阈值发送模块,用于根据所述取指操作确定当前启动阶段,所述启动阶段包括预设的初始启动阶段和非初始启动阶段;通过所述系统控制模块控制所述多片选模块获取与当前启动阶段对应的超时阈值,其中,当所述当前启动阶段为所述初始启动阶段时,所获取的超时阈值为第一超时,当所述当前启动阶段为所述非初始启动阶段时,所获取的超时阈值为第二超时;A threshold sending module is used to determine the current startup stage based on the instruction fetch operation. The startup stage includes a preset initial startup stage and a non-initial startup stage. The system control module controls the multi-chip select module to obtain a timeout threshold corresponding to the current startup stage. When the current startup stage is the initial startup stage, the obtained timeout threshold is a first timeout. When the current startup stage is the non-initial startup stage, the obtained timeout threshold is a second timeout. 取指控制模块,用于当所述启动阶段未正常运行时,获取所述多片选模块基于所述超时阈值生成的复位置位和释放信号,以便基于所述复位置位和释放信号控制所述XIP模块重新访问所述非易失性存储器以执行取指操作,直至所有所述启动阶段均正常运行。The instruction fetch control module is used to acquire the reset bit and release signal generated by the multi-chip select module based on the timeout threshold when the startup phase is not running normally, so as to control the XIP module to re-access the non-volatile memory to perform instruction fetch operation based on the reset bit and release signal until all the startup phases are running normally. 10.一种启动控制装置,应用于多片选模块,所述多片选模块与系统控制模块、XIP模块连接,所述系统控制模块与中央处理器连接,所述XIP模块与所述中央处理器连接,所述XIP模块用于访问非易失性存储器以执行取指操作,其特征在于,所述装置包括:10. A startup control device applied to a multi-chip select module, the multi-chip select module being connected to a system control module and an XIP module, the system control module being connected to a central processing unit (CPU), the XIP module being connected to the CPU, the XIP module being used to access non-volatile memory to perform instruction fetch operations, characterized in that the device comprises: 数据获取模块,用于响应于由所述多片选模块生成的复位置位和释放信号,重新计时以获取计时数据,并获取超时阈值,所述超时阈值包括用于控制切换功能获取片选数据的第一超时和用于控制片选功能获取片选数据的第二超时;The data acquisition module is used to respond to the reset and release signals generated by the multi-chip select module, re-time the system to acquire timing data, and acquire a timeout threshold, wherein the timeout threshold includes a first timeout for controlling the switching function to acquire chip select data and a second timeout for controlling the chip select function to acquire chip select data. 片选配置模块,用于判断预设的切换功能是否使能,若启用切换功能使能,则将所述计时数据与所述第一超时进行比较,在所述计时数据大于所述第一超时时,按片选及配置顺序配置下一次所述XIP模块访问所述非易失性存储器执行取指操作所需要的片选数据,生成新的复位置位和释放信号且通过所述系统控制模块复位管理;和/或,若关闭切换功能使能,则将所述计时数据与所述第二超时进行比较,在所述计时数据大于所述第二超时时,按片选顺序配置下一次所述XIP模块访问所述非易失性存储器以执行取指操作的片选数据,生成新的复位置位和释放信号且通过所述系统控制模块复位管理,以便所述中央处理器控制所述XIP模块重新访问所述非易失性存储器以执行取指操作,直至完成取指操作。The chip select configuration module is used to determine whether a preset switching function is enabled. If the switching function is enabled, the timing data is compared with the first timeout. If the timing data is greater than the first timeout, the chip select data required for the next instruction fetch operation by the XIP module to access the non-volatile memory is configured according to the chip select and configuration order. A new reset bit and release signal are generated and managed by the system control module. And/or, if the switching function is disabled, the timing data is compared with the second timeout. If the timing data is greater than the second timeout, the chip select data required for the next instruction fetch operation by the XIP module to access the non-volatile memory is configured according to the chip select order. A new reset bit and release signal are generated and managed by the system control module, so that the central processing unit controls the XIP module to re-access the non-volatile memory to perform the instruction fetch operation until the instruction fetch operation is completed. 11.一种计算机设备,包括存储器和处理器,所述存储器存储有计算机程序,其特征在于,所述处理器执行所述计算机程序时实现权利要求1至8中任一项所述方法的步骤。11. A computer device comprising a memory and a processor, the memory storing a computer program, characterized in that the processor, when executing the computer program, implements the steps of the method according to any one of claims 1 to 8. 12.一种计算机可读存储介质,其上存储有计算机程序,其特征在于,所述计算机程序被处理器执行时实现权利要求1至8中任一项所述的方法的步骤。12. A computer-readable storage medium having a computer program stored thereon, characterized in that, when the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 8.
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