CN118550758B

CN118550758B - Troubleshooting methods and computing devices

Info

Publication number: CN118550758B
Application number: CN202410533813.0A
Authority: CN
Inventors: 唐琳
Original assignee: Henan Kunlun Technology Co ltd
Current assignee: Henan Kunlun Technology Co ltd
Priority date: 2024-04-29
Filing date: 2024-04-29
Publication date: 2025-11-18
Anticipated expiration: 2044-04-29
Also published as: CN118550758A

Abstract

The embodiment of the application provides a fault processing method and computing equipment, which are used for triggering a restarting instruction when detecting that the computing equipment has multi-bit error checking and ECC fault correcting, calling a target callback function based on the restarting instruction, wherein the target callback function is used for acquiring fault information of the multi-bit ECC fault and storing the fault information into a target storage space, the target storage space is a nonvolatile storage space, restarting the computing equipment, and carrying out fault processing on the multi-bit ECC fault based on the fault information in the target storage space. According to the method, after the multi-bit ECC fault occurs to the computing equipment, the fault information of the multi-bit ECC fault is stored in the nonvolatile storage space, so that fault processing can be conducted according to the fault information in the nonvolatile storage space after the computing equipment is restarted, the positioning time of the multi-bit ECC fault is shortened, and the fault processing efficiency is improved.

Description

Fault processing method and computing device

Technical Field

The embodiment of the application relates to the technical field of computing equipment, in particular to a fault processing method and computing equipment.

Background

When a fault of the computing device is detected, the fault needs to be processed in time.

In the related art, faults in computing devices may be handled by Error CHECKING AND correction (ECC) techniques. For example, computing devices include hardware ECC, as well as random access Memory (Random Access Memory, RAM) and Flash Memory (Flash Memory), through which ECC errors in Memory can be detected and corrected to ensure the integrity and reliability of data and program code in these memories. In the process of data storage and transmission, when single bit (bit) in a memory is in error, the hardware ECC can calculate a correct value through redundant bit in the memory and write the correct value back into the corresponding memory, and when a plurality of bit in the memory is in error, the hardware ECC generally reports the error information to the computing device by triggering error interrupt so as to facilitate the computing device to perform fault processing on the error.

However, when multi-bit ECC failure processing is performed using ECC techniques, the computing device takes a significant amount of time to locate the multi-bit ECC failure, resulting in less efficient processing of the multi-bit ECC failure.

Disclosure of Invention

The embodiment of the application provides a fault processing method and a computing device, wherein after a multi-bit ECC fault occurs in the computing device, fault information of the multi-bit ECC fault is stored in a nonvolatile storage space, so that fault processing can be performed according to the fault information in the nonvolatile storage space after the computing device is restarted, the positioning time of the multi-bit ECC fault is shortened, and the fault processing efficiency is improved.

In a first aspect, an embodiment of the present application provides a fault handling method, including:

Triggering a restart instruction when detecting that the computing device has multi-bit error checking and correcting ECC faults;

Calling a target callback function based on the restarting instruction, wherein the target callback function is used for acquiring fault information of multi-bit ECC faults and storing the fault information into a target storage space, and the target storage space is a nonvolatile storage space;

Restarting the computing device, and performing fault processing on the multi-bit ECC fault based on the fault information in the target storage space.

In the technical scheme, after the multi-bit ECC fault occurs to the computing equipment, the fault information of the multi-bit ECC fault is stored in the nonvolatile storage space, so that fault processing can be performed according to the fault information in the nonvolatile storage space after the computing equipment is restarted, the positioning time of the multi-bit ECC fault is shortened, and the fault processing efficiency is improved.

In one possible implementation, determining the target callback function includes:

invoking a target notification chain based on the restart instruction;

determining a target callback function corresponding to the target notification chain, and executing the target callback function;

wherein the target notification chain and the target callback function are pre-registered.

According to the technical scheme, the target callback function can be queried based on the target notification chain corresponding to the restarting instruction, so that the fault information of the multi-bit ECC fault can be stored into the target storage space based on the target callback function before the computing equipment is restarted, the fault processing can be conveniently carried out according to the fault information in the nonvolatile storage space after the computing equipment is restarted, the positioning time of the multi-bit ECC fault is shortened, and the fault processing efficiency is improved.

In one possible implementation, executing the target callback function includes:

acquiring the fault information through an information recording code, wherein the information recording code is loaded to the computing equipment after the computing equipment is powered on;

and determining the target storage space, and storing the fault information into the target storage space.

According to the technical scheme, fault information can be obtained based on the information record code loaded after the computing equipment is powered on, and the fault information is stored in the target storage space, so that after the subsequent computing equipment is restarted, the fault cause of the multi-bit ECC fault can be rapidly positioned according to the fault information in the target storage space, and the fault processing efficiency of the multi-bit ECC fault can be accelerated.

In one possible implementation, determining the target storage space includes:

determining a storage space identifier based on the target callback function;

And determining the target storage space according to the storage space identification.

In the technical scheme, the target storage space can be rapidly determined based on the storage space identification in the target callback function, so that the speed of storing the fault information into the target storage space can be increased.

In one possible implementation, performing fault handling on the multi-bit ECC fault based on the fault information in the target storage space includes:

acquiring the fault information in the target storage space;

performing fault positioning processing on the multi-bit ECC fault according to the fault information to obtain a fault reason of the multi-bit ECC fault;

and performing fault processing on the multi-bit ECC fault based on the fault cause.

In the above technical solution, after the computing device is restarted, the failure cause of the multi-bit ECC failure may be rapidly located according to the failure information in the target storage space, so as to accelerate the failure processing efficiency of the multi-bit ECC failure.

In one possible implementation, before the target callback function is called based on the restart instruction, the method further includes:

Loading information record code in response to a power-on instruction of the computing device;

and executing the information record code to register a target notification chain and the target callback function corresponding to the target notification chain.

In the technical scheme, after the computing device is electrified, the information recording code can be loaded and executed to register the target notification chain and the target callback function, so that after the computing device fails in multi-bit ECC, the computing device can store the failure information of the multi-bit ECC failure into the target storage space based on the target callback function, and the computing device can perform failure processing according to the failure information in the nonvolatile storage space after restarting, thereby shortening the positioning time of the multi-bit ECC failure and improving the failure processing efficiency.

In one possible implementation, the method further includes:

loading the information record code in a cancel mode based on an unloading instruction;

and deleting the target notification chain and the target callback function in the registration information.

In the technical scheme, the information record code can be canceled to be loaded based on the unloading instruction, and the target notification chain and the target callback function are deleted from the registration information, so that the information record code can be loaded more flexibly.

In one possible implementation, the method further includes:

When detecting that the computing equipment has single-bit ECC faults, determining the fault times corresponding to the single-bit ECC faults;

And when the fault times are greater than or equal to a preset threshold, generating alarm information, wherein the alarm information is used for prompting the single-bit ECC fault to be processed.

In the technical scheme, whether the single-bit ECC fault exists in the computing equipment can be detected, and the single-bit ECC fault which occurs for many times is alarmed, so that maintenance personnel can process the single-bit ECC fault in time.

In a second aspect, an embodiment of the present application provides a fault handling apparatus, including:

the triggering module is used for triggering a restarting instruction when detecting that the computing equipment has multi-bit error checking and correcting ECC faults;

The calling module is used for calling a target callback function based on the restarting instruction, wherein the target callback function is used for acquiring fault information of multi-bit ECC faults and storing the fault information into a target storage space, and the target storage space is a nonvolatile storage space;

A restarting module, configured to restart the computing device;

And the fault processing module is used for performing fault processing on the multi-bit ECC fault based on the fault information in the target storage space.

In one possible implementation manner, the calling module is specifically configured to:

invoking a target notification chain based on the restart instruction;

In a possible implementation manner, the calling module is specifically further configured to:

determining a storage space identifier based on the target callback function;

In one possible implementation manner, the fault handling module is specifically configured to:

acquiring the fault information in the target storage space;

In one possible implementation, the fault handling apparatus further comprises a loading module and an executing module, wherein the loading module is used for responding to a power-on instruction of the computing device and loading information record codes before a target callback function is called based on the restarting instruction;

and the execution module is used for executing the information record code to register a target notification chain and the target callback function corresponding to the target notification chain.

In one possible implementation manner, the fault processing device further comprises an unloading module and a deleting module, wherein:

the unloading module is used for unloading the information record code based on an unloading instruction;

And the deleting module is used for deleting the target notification chain and the target callback function in the registration information.

In one possible implementation manner, the fault processing device further comprises a determining module and a generating module, wherein:

The determining module is used for determining the fault times corresponding to the single-bit ECC faults when the single-bit ECC faults exist in the computing equipment;

The generating module is used for generating alarm information when the fault times are larger than or equal to a preset threshold value, wherein the alarm information is used for prompting the single-bit ECC fault to be processed.

In a third aspect, embodiments of the present application provide a computing device comprising a processor and a memory, the processor and the memory coupled;

The memory is used for storing computer instructions;

The processor is configured to execute the computer instructions stored by the memory to perform the method according to any one of the first aspects.

In a fourth aspect, embodiments of the present application provide a chip for performing the method according to any one of the first aspects.

In a fifth aspect, an embodiment of the present application provides a computer-readable storage medium having stored therein computer-executable instructions that, when executed by a computer, implement the method according to any of the first aspects.

In a sixth aspect, an embodiment of the application provides a computer program product comprising a computer program which, when executed by a processor, implements the method according to any of the first aspects.

The fault processing method and the computing device provided by the embodiment of the application can trigger a restarting instruction when the computing device detects that the computing device has a multi-bit ECC fault, call a target callback function based on the restarting instruction to acquire the fault information of the multi-bit ECC fault and store the fault information into a target storage space, restart the computing device and process the multi-bit ECC fault based on the fault information in the target storage space. The target storage space is a nonvolatile storage space, so that the fault processing of the multi-bit ECC fault can be rapidly performed based on the fault information in the target storage space after the computing equipment is restarted, the fault positioning speed of the multi-bit ECC fault can be increased based on the fault information, and the processing efficiency of the multi-bit ECC fault can be improved.

Drawings

In order to more clearly illustrate the embodiments of the application or the technical solutions of the prior art, the drawings which are required in the embodiments or the description of the prior art will be briefly described, it being obvious that the drawings in the following description are only some embodiments of the application, and that other drawings can be obtained according to these drawings without inventive faculty for a person skilled in the art.

FIG. 1 is a schematic diagram of a software architecture of a computing device according to an embodiment of the present application;

fig. 2 is a schematic flow chart of a fault handling method according to an embodiment of the present application;

FIG. 3 is a schematic flow chart of another fault handling method according to an embodiment of the present application;

FIG. 4 is a schematic diagram illustrating an implementation process of an ECC information recording module according to an embodiment of the present application;

fig. 5 is a schematic structural diagram of a fault handling apparatus according to an embodiment of the present application;

FIG. 6 is a schematic diagram of another fault handling apparatus according to an embodiment of the present application;

Fig. 7 is a schematic hardware structure of a computing device according to an embodiment of the present application.

Detailed Description

Reference will now be made in detail to exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, the same numbers in different drawings refer to the same or similar elements, unless otherwise indicated. The implementations described in the following exemplary embodiments do not represent all implementations consistent with embodiments of the application. Rather, they are merely examples of apparatus and methods consistent with aspects of embodiments of the application as detailed in the accompanying claims.

First, related terms related to the embodiments of the present application will be explained.

In the field of computers, data are stored in various memories (such as a RAM, a Flash and the like), and the integrity and reliability of the data in the memories can be ensured by the ECC technology on hardware so as to avoid the data damage when the memories are subjected to various external interferences (such as electromagnetic interference, electric noise, circuit short circuit and the like).

Hardware ECC-hardware with ECC error correction capability is represented. The hardware ECC can additionally increase a storage unit in an area outside the memory which is opened for a user to store an ECC calculation result, so that the ECC generally does not occupy extra RAM space, the hardware ECC can check the correctness of data to be read in real time when the data is read, and the hardware ECC can automatically correct the data to be read in time when an ECC error is detected, or an ECC error notification is generated and a corresponding safety mechanism is implemented.

Typically, ECC errors are typically caused by bit flipping or corruption in the memory or cache of the chip, which typically has hardware ECC support to protect data integrity.

Cache (cache), a storage medium, may have ECC errors. For example, a cache in a processor chip is divided into L1/L2/L3 stages, each of which may generate ECC errors. In some scenarios (e.g., multi-bit errors), ECC errors may not be repaired, resulting in data corruption or system crashes in the cache. In view of this, measures are required to regularly backup and monitor the data in the cache to minimize the problem of data corruption.

In some implementations, faults in the computing device may be handled by ECC techniques. For example, a computing device includes hardware ECC and memory, through which ECC errors in the memory may be detected and corrected to ensure the integrity and reliability of data and program code in the memory. Specifically, during data storage and transmission, when a single bit (bit) in the memory is in error, the hardware ECC can automatically calculate a correct value through the redundant bit in the memory and write the correct value back to the corresponding memory, and when a plurality of bits in the memory are in error, the hardware ECC generally reports the error information to the computing device by triggering an error interrupt so as to facilitate the computing device to perform fault processing on the error. However, when multi-bit ECC failure processing is performed using ECC techniques, the computing device takes a significant amount of time to locate the multi-bit ECC failure, resulting in less efficient processing of the multi-bit ECC failure.

In view of the above, an embodiment of the present application provides a fault handling method, which may trigger a restart instruction when detecting that a computing device has a multi-bit ECC fault, call a target callback function based on the restart instruction to store fault information of the multi-bit ECC fault into a target storage space through the target callback function, restart the computing device, and perform fault handling on the multi-bit ECC fault based on the fault information in the target storage space. The target storage space is a nonvolatile storage space, so that the fault processing of the multi-bit ECC fault can be rapidly performed based on the fault information in the target storage space after the computing equipment is restarted, the fault positioning speed of the multi-bit ECC fault can be increased based on the fault information, and the processing efficiency of the multi-bit ECC fault can be improved.

In order to facilitate understanding, a software architecture of a computing device according to an embodiment of the present application is described below with reference to fig. 1.

Fig. 1 is a schematic software architecture of a computing device according to an embodiment of the present application. Referring to fig. 1, a core reset module and an ECC information recording module are provided in a computing device, wherein,

The kernel reset module is used for performing restarting processing on the computing device, wherein the restarting processing comprises normal restarting (reboot) processing, restarting (panic and oops) processing under abnormal conditions and watchdog restarting processing.

In one scenario, the fault detection process may be performed on the computing device, and when a multi-bit ECC fault is detected in the computing device, a restart instruction may be triggered to control the kernel reset module to perform the restart process on the computing device under an abnormal condition based on the restart instruction.

The kernel reset module can provide a registration interface of a callback function externally, and a notification chain corresponding to the module and a callback function corresponding to the notification chain can be registered in the kernel reset module through the registration interface aiming at any one of other modules in the kernel. In response to a restart instruction of the computing device, the kernel reset module may call a callback function corresponding to each notification chain, so that each module executes the callback function.

The ECC information recording module is used for responding to a restarting instruction of the computing equipment, determining a target notification chain corresponding to the restarting instruction, executing a target callback function corresponding to the target notification chain, acquiring fault information of multi-bit ECC faults through the target callback function, and storing the fault information into a target storage space.

It should be noted that, in some examples, the "callback function" in the embodiments of the present application may also be referred to as a "hook function".

For example, in fig. 1, the ECC information recording module may register the notification chain 1 and the callback function 1 corresponding to the notification chain 1 in the kernel reset module through the registration interface. And calling a notification chain 1 corresponding to the ECC information recording module and a callback function 1 corresponding to the notification chain 1 according to a restarting instruction of the kernel resetting module.

The ECC information recording module is a flexibly registered kernel module, and can be flexibly loaded when the computing device is powered on and started based on different service requirements of users. For example, if the ECC information recording module is loaded based on the service requirement of the user, a notification chain corresponding to the ECC information recording module and a callback function corresponding to the notification chain may be registered in the kernel reset module, and if it is determined that the ECC information recording module does not need to be loaded based on the service requirement of the user, the corresponding notification chain and the callback function corresponding to the notification chain do not need to be registered in the kernel reset module.

In one example, the unloading operation of the ECC information recording module may also be performed based on the requirement of the user, and after the unloading operation is performed, the notification chain corresponding to the ECC information recording module and the callback function corresponding to the notification chain are deleted in the kernel reset module.

The callback functions corresponding to the ECC information recording module can be realized based on the ECC information recording module, the ECC information recording module can be used for receiving a plurality of callback functions input by a user, and the callback functions can correspond to different service requirements so as to realize various functions through the callback functions. When the callback function is executed by the ECC information recording module, fault information (e.g., ECC information) in the computing device may be recorded and the recorded fault information may be stored into a target storage space, which is a nonvolatile storage space.

The technical scheme of the embodiment of the application is described in detail below by using specific embodiments. The following embodiments may be combined with each other, and some embodiments may not be repeated for the same or similar concepts or processes.

Fig. 2 is a schematic flow chart of a fault handling method according to an embodiment of the present application. Referring to fig. 2, the method specifically includes:

S201, triggering a restarting instruction when detecting that the computing device has a multi-bit ECC fault.

The subject of execution of the method may be the computing device of fig. 1, and in particular, may be executed by a processor in the computing device of fig. 1.

The computing device includes, but is not limited to, a stand-alone physical server or server node, a server cluster of multiple physical servers, a smart phone, a tablet, a laptop, a desktop, a laptop, etc.

Upon detecting that a multi-bit ECC failure exists with the computing device, an error interrupt may be triggered, based on which the computing device may trigger a restart instruction (e.g., panic instruction) in the event of an exception.

S202, calling a target callback function based on the restarting instruction.

The target callback function is used for acquiring fault information of the multi-bit ECC fault and storing the fault information into the target storage space.

The failure information of the multi-bit ECC failure may include that each stage (e.g., L1, L2, and L3) of the processor buffers corresponding register values upon the multi-bit ECC failure.

In some scenarios, the computing device may also have a single-bit ECC failure, and in the process of calling the target callback function, failure information of the single-bit ECC failure may also be obtained based on the target callback function.

The failure information of the single-bit ECC failure may include a plurality of types of single-bit ECC failures, and the number of occurrences of each type of single-bit ECC failure and failure information.

The failure information of the multi-bit ECC failure and the failure information of the single-bit ECC failure may be acquired based on the ECC information recording module in the embodiment of fig. 1. The ECC information recording module can provide configuration service of fault information for users, so that the users can configure different information recording methods corresponding to different types of ECC faults in the ECC information recording module based on the configuration service. By way of example, different types of ECC failures may include single bit ECC failures, multi-bit ECC failures, and other types of ECC failures.

For example, for multi-bit ECC faults, a user needs to know register values corresponding to each level of cache of a processor when the multi-bit ECC faults occur, and the user can configure an information recording method of the multi-bit ECC faults in the ECC information recording module as follows, wherein for different types of single-bit ECC faults, the user needs to know the occurrence times of each type of single-bit ECC faults of a computing device, and the user can configure the information recording method of the single-bit ECC faults in the ECC information recording module as follows, and the occurrence times and fault information of each type of single-bit ECC faults are recorded.

The target storage space is a nonvolatile storage space, and fault information in the target storage space is used for carrying out fault processing on the computing equipment after the computing equipment is restarted.

Optionally, an association relationship between the restart instruction and the target callback function may be established, and when the computing device is restarted (including normal restart, restart under abnormal conditions, and watchdog reset restart, etc.), the target callback function may be called to obtain fault information corresponding to various types of ECC faults, so that after each restart of the computing device, the health state of the hardware ECC may be monitored in time. For example, after normal restart processing, the computing device may perform alarm processing based on the number of failures of different types of single-bit ECC failures acquired by the target callback function, and when the number of failures is greater than or equal to a preset threshold.

S203, restarting the computing equipment, and performing fault processing on the multi-bit ECC faults based on the fault information in the target storage space.

The computing device may be restarted based on the kernel reset module in the embodiment of fig. 1.

It can be understood that after the computing device is restarted, the computing device can read the fault information in the target storage space, and can quickly locate a fault reason corresponding to the multi-bit fault based on the fault information read by the computing device, and perform fault processing on the multi-bit ECC fault based on the fault reason.

The fault processing method provided by the embodiment of the application can trigger a restarting instruction when the multi-bit ECC fault of the computing equipment is detected, call a target callback function based on restarting quality so as to store the fault information of the multi-bit ECC fault into a target storage space through the target callback function, restart the computing equipment and perform fault processing on the multi-bit ECC fault based on the fault information in the target storage space. The target storage space is a nonvolatile storage space, so that the computing equipment can still find the fault information in the target storage space after restarting the computing equipment, quickly locate the cause of the multi-bit ECC fault based on the fault information, and process the multi-bit ECC fault, thereby being beneficial to accelerating the speed of multi-bit ECC fault location and further being beneficial to improving the processing efficiency of the multi-bit ECC fault.

Fig. 3 is a flow chart of another fault handling method according to an embodiment of the present application. Referring to fig. 3, the method specifically may include:

s301, performing fault detection processing on the computing equipment.

In one example, a hardware ECC may be provided in a computing device that may be used to detect whether the computing device has an ECC failure, which may include a multi-bit ECC failure and a single-bit ECC failure.

For example, when the hardware ECC detects a multi-bit ECC failure caused by a multi-bit error in a cache (cache), an error interrupt may be triggered, and failure information of the multi-bit ECC failure may be reported to a kernel of the computing device, so as to remind the computing device to take corresponding failure handling measures.

S302, triggering a restarting instruction when detecting a multi-bit ECC fault.

It should be noted that, the specific execution process of step S302 may refer to the specific execution process of step S201, and will not be described herein.

S303, calling a target notification chain based on a restarting instruction.

S304, determining a target callback function corresponding to the target notification chain.

Referring to fig. 1, a kernel reset module in a computing device may provide a registration interface of a callback function to other modules in the computing device, and the other modules may register a corresponding notification chain and callback function based on the registration interface. The kernel reset module may record notification chains and callback functions corresponding to each module in the computing device based on the registration information. The kernel reset module can query the target callback function corresponding to the target notification chain in the registration information based on the target notification chain.

In one implementation, before determining the target callback function, the target callback function may be registered by loading information recording code in response to a power-on instruction of the computing device, and executing the information recording code to register the target notification chain and the target callback function.

In another implementation, the information record code can be unloaded based on the unloading instruction, and the target notification chain and the target callback function are deleted in the registration information.

The information recording code may be flexibly loaded at power-up of the computing device based on different business needs of the user. It will be appreciated that the information recording code is validated when it is loaded successfully.

The information recording code may be provided in the form of a kernel ko, for example, in fig. 1, the information recording code may be provided in the form of an ECC information recording module (cache_ecc.ko).

The ECC information recording module (cache_ecc. Ko) can be flexibly loaded or unloaded. For example, configuration parameters of the computing device may be configured based on configuration instructions entered by a user so that the computing device may load the ECC information recording module (cache_ecc. Ko) after power-on. The function corresponding to the ECC information recording module (cache_ecc.ko) may be deleted by unloading the ECC information recording module (cache_ecc.ko) based on an unloading instruction input by a user, and the notification chain corresponding to the ECC information recording module and the callback function corresponding to the notification chain may be deleted in the registration information (for example, the notification chain list) of the kernel reset module, so as to implement flexible adjustment of the function.

The ECC information recording module can also register the association relation between the corresponding notification chain and the restarting instruction, so that the notification chain of the module can be called when the restarting instruction is triggered.

For example, the module is an ECC information recording module, the notification chain corresponding to the ECC information recording module is a target notification chain, and the callback function is a target callback function. The ECC information recording module can register the target notification chain, the target callback function and the association relation between the target notification chain and the restarting instruction to the kernel resetting module based on the registration interface, so that when the restarting instruction of the kernel resetting module is triggered, the target notification chain corresponding to the ECC information recording module can be called, and the target callback function corresponding to the target notification chain is determined based on the registration information.

And S305, acquiring fault information through the information recording code.

The information recording code may be loaded into the computing device after power-up of the computing device. In the kernel of the computing device, the information recording code may be in the form of a software module, for example, in fig. 1, the information recording code may be in the form of an ECC information recording module.

The information recording code may include a method for acquiring fault information of different types of faults. When a multi-bit ECC failure is detected, a target acquisition method of failure information of the multi-bit ECC failure can be determined according to the information recording code, and the failure information of the multi-bit ECC failure can be acquired according to the target acquisition method.

S306, determining a target storage space, and storing fault information into the target storage space.

In one implementation, the storage space identification may be determined based on a target callback function, and the target storage space may be determined based on the storage space identification.

The target callback function may include a storage space identification, which in one example may be quickly determined in the target callback function based on keyword retrieval or the like.

In one example, the storage space identification may be stored as a name or address of the storage space.

According to different types of ECC faults, fault information corresponding to each type of ECC faults can be classified and stored in the target storage space. For example, failure information corresponding to a multi-bit ECC failure and failure information corresponding to a single-bit ECC failure may be stored separately.

S307, restarting the computing device.

The reboot operation of the computing device may be performed by the kernel reset module of fig. 1.

S308, acquiring fault information in the target storage space.

Optionally, after the computing device is restarted, the computing device may receive a control instruction input by a maintainer, where the control instruction is used to obtain fault information in the target storage space.

S309, performing fault location processing on the multi-bit ECC fault according to the fault information to obtain a fault reason of the multi-bit ECC fault.

The fault information of the multi-bit ECC fault may include register values corresponding to each level of cache of the multi-bit ECC pre-fault cache. For example, caches (caches) typically include an L1 level cache, an L2 level cache, and an L3 level cache, each of which may include a tag (tag) and data (data). When a multi-bit ECC failure occurs in a cache (cache) in a processor, failure information of the multi-bit ECC failure may include a register value 1 corresponding to an L1 level cache, a register value 2 corresponding to an L2 level cache, and a register value 3 corresponding to an L3 level cache.

The fault information of the multi-bit ECC fault can be used for rapidly positioning whether the cache (cache) has the data interrupt (CACHE DATA abort) abnormality, if the cache (cache) has the data interrupt (CACHE DATA abort) abnormality, judging whether the L1 level cache in the cache (cache) is abnormal according to the register value 1 and judging whether the L2 level cache is abnormal according to the register value 2, and adopting corresponding measures to carry out fault treatment after any level cache abnormality in the two levels of caches is found.

When the multi-bit ECC interrupt of the L3 level cache in the computing device is in an open state, if the computing device detects the multi-bit ECC interrupt, the multi-bit ECC fault of the L3 level cache can be recorded in a log form, and a restarting operation of the computing device is executed.

And S310, performing fault processing on the multi-bit ECC fault based on the fault reason.

The corresponding fault handling method can be determined based on the fault cause, and fault handling is performed on the multi-bit ECC fault based on the fault handling method.

In one implementation, the method may include the steps of:

s311, when detecting that the computing equipment has single-bit ECC faults, determining the fault times corresponding to the single-bit ECC faults.

Fault information of various types of single-bit ECC faults can be recorded through the ECC information recording module, and the fault times corresponding to the various types of single-bit ECC faults are determined according to the fault information of the single-bit ECC faults.

The failure information of the single-bit ECC failure may include a plurality of types of single-bit ECC failures, and the number of occurrences of each type of single-bit ECC failure and the cause of the failure.

S312, when the number of faults is larger than or equal to a preset threshold, alarm information is generated.

The alarm information is used for prompting the processing of the single-bit ECC fault.

Based on the fault information of the single-bit ECC fault recorded by the ECC information recording module, the computing equipment can monitor the health condition of the computing equipment in time and perform early warning. For example, when the number of faults of a single-bit ECC fault of a certain type is found to be greater than or equal to a preset threshold, a processor (or a processing system running on the processor) in the computing device may be alerted to facilitate timely processing of the single-bit ECC fault of the certain type to ensure the health of the computing device.

The computing device may record fault information for each ECC fault in the form of a log. For example, the computing device may discover the parity and ECC errors of single bit (bit) bits of each level of cache (L1, L2, or L3 levels) in a timed poll (e.g., 1 second frequency) manner and record the parity and ECC errors in the form of a log.

The fault processing method provided by the embodiment of the application can be used for carrying out fault detection processing on the computing equipment, triggering a restarting instruction when a multi-bit ECC fault is detected, calling a target notification chain according to the restarting instruction, executing a target callback function corresponding to the target notification chain to store fault information into a target storage space through the target callback function, acquiring the fault information in the target storage space after the restarting of the computing equipment is completed, and carrying out fault positioning processing on the multi-bit ECC fault according to the fault information so as to quickly position the fault cause of the multi-bit ECC fault, thereby being beneficial to improving the fault processing efficiency.

Next, the implementation process of the ECC information recording module will be described with reference to fig. 4.

Fig. 4 is a schematic diagram illustrating an implementation process of an ECC information recording module according to an embodiment of the present application. Referring to fig. 4, the process may include:

s401, an ECC information recording module is newly added in the computing device.

S402, configuring a target notification chain corresponding to the ECC information recording module and a target callback function corresponding to the target notification chain.

The callback function can comprise the type of fault information to be acquired and a storage space identifier, wherein the storage space identifier is used for indicating a target storage space corresponding to the fault information.

S403, calling a registration interface of a callback function in the kernel reset module, and registering a target notification chain of the ECC information recording module and a target callback function corresponding to the target notification chain to the kernel reset module through the registration interface.

After the notification chain corresponding to the ECC information recording module and the callback function corresponding to the notification chain are configured, the computing device may receive an instruction input by a developer, so that the computing device invokes a registration interface (please refer to fig. 1) of the notification chain in the kernel reset module, and registers the notification chain of the ECC information recording module and the callback function corresponding to the notification chain with the kernel reset module through the registration interface.

S404, responding to a power-on instruction of the computing equipment, and loading an ECC information recording module.

By loading the ECC information recording module, the kernel reset module can conveniently call the ECC information recording module through a registered callback function.

In the implementation process of the ECC information recording module provided by the embodiment of the application, various functions (such as a notification chain, a callback function, a type and a mode for acquiring fault information and the like) of the ECC information recording module can be flexibly configured based on information input by a user, so that different service requirements of the user can be met based on the callback function, and the loading state of the ECC information recording module can be flexibly adjusted.

Fig. 5 is a schematic structural diagram of a fault handling apparatus according to an embodiment of the present application. Referring to fig. 5, the fault handling apparatus 10 may include:

a triggering module 11, configured to trigger a restart instruction when detecting that the computing device has a multi-bit error checking and correcting ECC failure;

The calling module 12 is configured to call a target callback function based on the restart instruction, where the target callback function is configured to obtain failure information of a multi-bit ECC failure, and store the failure information in a target storage space, where the target storage space is a nonvolatile storage space;

A restart module 13, configured to restart the computing device;

and a fault processing module 14, configured to perform fault processing on the multi-bit ECC fault based on the fault information in the target storage space.

In one possible implementation, the calling module 12 is specifically configured to:

invoking a target notification chain based on the restart instruction;

In one possible implementation, the calling module 12 is specifically further configured to:

determining a storage space identifier based on the target callback function;

In one possible implementation, the fault handling module 14 is specifically configured to:

acquiring the fault information in the target storage space;

The fault processing device provided by the embodiment of the application can realize the fault processing method described in the embodiment of the method, and the implementation principle and the technical effect are similar, and are not repeated here.

Fig. 6 is a schematic structural diagram of another fault handling apparatus according to an embodiment of the present application. Referring to fig. 6, on the basis of the structure of the fault handling apparatus 10 shown in fig. 5, the fault handling apparatus 10 may further include a loading module 15, an executing module 16, an unloading module 17, a deleting module 18, a determining module 19, and a generating module 20, wherein:

Before invoking a target callback function based on the restart instruction, the loading module 15 is configured to load information record code in response to a power-on instruction of the computing device;

the execution module 16 is configured to execute the information record code to register a target notification chain and the target callback function corresponding to the target notification chain.

In a possible implementation, the unloading module 17 is configured to cancel loading the information record code based on an unloading instruction;

The deleting module 18 is configured to delete the target notification chain and the target callback function in the registration information.

In a possible implementation manner, the determining module 19 is configured to determine, when detecting that a single-bit ECC fault exists in the computing device, a number of faults corresponding to the single-bit ECC fault;

The generating module 20 is configured to generate, when it is determined that the number of faults is greater than or equal to a preset threshold, alarm information, where the alarm information is used to prompt processing of the single-bit ECC fault.

Fig. 7 is a schematic hardware structure of a computing device according to an embodiment of the present application. Referring to fig. 7, the computing device 20 may include a processor 21 and a memory 22, the processor 21 and the memory 22 being coupled. Wherein the processor 21 and the memory 22 may communicate, and wherein, by way of example, the processor 21 and the memory 22 may communicate via a communication bus 23.

The memory 22 is used for storing computer instructions;

The processor 21 is configured to execute the computer instructions stored in the memory 22, so as to execute the technical solution as shown in the foregoing method embodiment.

Optionally, the computing device 20 may also include a communication interface, which may include a transmitter and/or a receiver.

Alternatively, the Processor may be a central processing unit (Central Processing Unit, CPU), other general purpose Processor, digital signal Processor (DIGITAL SIGNAL Processor, DSP), application SPECIFIC INTEGRATED Circuit (ASIC), etc. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like. The steps of a method disclosed in connection with the embodiments of the present application may be embodied directly in a hardware processor for execution, or in a combination of hardware and software modules in the processor for execution.

The embodiment of the application provides a computer readable storage medium, wherein computer executable instructions are stored on the computer readable storage medium, and the computer executable instructions are used for realizing the fault processing method according to the embodiment when being executed by a processor.

An embodiment of the present application provides a computer program product, which includes a computer program, which when executed by a processor, causes the computer to perform the fault handling method described in the above embodiment.

All or part of the steps for implementing the method embodiments described above may be performed by hardware associated with program instructions. The aforementioned program may be stored in a readable memory. The program, when executed, performs the steps comprising the method embodiments described above, and the aforementioned memory (storage medium) comprises read-only memory (ROM), RAM, flash memory, hard disk, solid state disk, magnetic tape (english: MAGNETIC TAPE), floppy disk (english: floppy disk), optical disk (english: optical disk), and any combination thereof.

Embodiments of the present application are described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flowchart illustrations and/or block diagrams, and combinations of flows and/or blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processing unit of a general purpose computer, special purpose computer, embedded processor, or other programmable terminal device to produce a machine, such that the instructions, which execute via the processing unit of the computer or other programmable terminal device, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable terminal device to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.

These computer program instructions may also be loaded onto a computer or other programmable terminal device to cause a series of operational steps to be performed on the computer or other programmable device to produce a computer implemented process such that the instructions which execute on the computer or other programmable device provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

In embodiments of the present application, the term "include" and variations thereof may refer to non-limiting inclusion, and the term "or" and variations thereof may refer to "and/or". The terms "first," "second," and the like in embodiments of the present application are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. In the embodiments of the present application, "a plurality" means two or more. "and/or" describes an association relationship of an association object, and indicates that there may be three relationships, for example, a and/or B, and may indicate that there are three cases of a alone, a and B together, and B alone. The character "/" generally indicates that the context-dependent object is an "or" relationship.

Finally, it should be noted that the foregoing embodiments are merely illustrative of and not limiting on the technical solutions of the embodiments of the present application, and although the embodiments of the present application have been described in detail with reference to the foregoing embodiments, it should be understood by those skilled in the art that the technical solutions described in the foregoing embodiments may be modified or some or all of the technical features may be equivalently replaced, and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A method of fault handling comprising:

Triggering a restarting instruction when detecting that multi-bit error checking and ECC fault correction exist in a processor cache of the computing device, wherein the restarting instruction is used for restarting the computing device, and the restarting process comprises at least one of normal restarting process, restarting process under abnormal conditions and watchdog restarting process;

The callback function is also used for acquiring fault information of single-bit ECC faults, wherein the fault information of the single-bit ECC faults comprises a plurality of types of single-bit ECC faults, and the occurrence times and the fault information of each type of single-bit ECC faults;

2. The method of claim 1, wherein invoking the target callback function based on the restart instruction comprises:

invoking a target notification chain based on the restart instruction;

3. The method of claim 2, wherein executing the target callback function comprises:

4. The method of claim 3, wherein determining the target storage space comprises:

determining a storage space identifier based on the target callback function;

5. The method of any of claims 1-4, wherein performing fault handling on the multi-bit ECC fault based on the fault information in the target storage space comprises:

acquiring the fault information in the target storage space;

6. The method of any of claims 1-5, further comprising, prior to invoking the target callback function based on the restart instruction:

7. The method of claim 6, wherein the method further comprises:

8. The method according to any one of claims 1-7, further comprising:

9. A computing device includes a processor and a memory, the processor and the memory coupled;

The memory is used for storing computer instructions;

The processor is configured to execute computer instructions stored in the memory to perform the method of any one of claims 1 to 8.

10. A computer program product comprising a computer program which, when executed by a processor, implements the method of any of claims 1 to 8.