CN117177350A - Clock cycle determination method, device, equipment and storage medium - Google Patents
Clock cycle determination method, device, equipment and storage medium Download PDFInfo
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Abstract
The application provides a clock period determining method, a device, equipment and a storage medium, wherein the method comprises the following steps: calculating the number of first clock works and the number of third clock works in the working time of the first clock to respectively obtain the first number of the first clock and the first number of the third clock; calculating the number of second clock works and the number of third clock works in the working time of the second clock to respectively obtain the second number of the second clock and the second number of the third clock; the period of the third clock is obtained by calculation according to the first clock number, the period of the first clock, the second clock number, the period of the second clock, the first number of the third clock and the second number of the third clock, and the period of the first clock and the period of the second clock are preset, so that the method is simple and easy to implement, and the accuracy is high, and measurement equipment is not needed.
Description
Technical Field
The present application relates to the field of communications, and in particular, to a clock period determining method, apparatus, device, and storage medium.
Background
The wireless receiving and transmitting system is widely applied to various scenes such as intelligent home, internet of things, wireless earphone and the like. The wireless connection is typically in frames, each connection being agreed to have a certain time interval per protocol. The transmitting device needs to transmit signals at a defined time and the receiving device needs to window the signal at a defined time, which is commonly referred to as an anchor point. Inaccuracy of the anchor points can result in communication failure, and how to determine the exact anchor points is critical to wireless communication success.
In the dormant state, in order to take low power consumption into consideration, a low power consumption clock is provided for calculating an anchor point, in the prior art, the clock period of the low power consumption clock is usually measured through measuring equipment, the method is complex and time-consuming, the measured low power consumption clock precision can not meet the requirement of wireless connection on clock precision, and the standard receiving and transmitting can not be ensured due to overlarge deviation of the anchor point calculated by the clock.
Disclosure of Invention
The embodiment of the application aims to provide a clock period determining method, a clock period determining device, clock period determining equipment and a storage medium, which are used for simply and conveniently obtaining a high-precision clock period.
The first aspect of the present application provides a clock period determining method, the method comprising: calculating the number of first clock works and the number of third clock works in the working time of the first clock to respectively obtain the first number of the first clock and the first number of the third clock; calculating the number of second clock works and the number of third clock works in the working time of the second clock to respectively obtain the second number of the second clock and the second number of the third clock; and calculating according to the first clock number, the period of the first clock, the second clock number, the period of the second clock, the first number of the third clock and the second number of the third clock to obtain the period of the third clock, wherein the period of the first clock and the period of the second clock are preset.
According to the clock period determining method, the period of the third clock is obtained through calculation according to the first clock number, the period of the first clock, the second clock number, the period of the second clock, the first number of the third clock and the second number of the third clock, and the period of the third clock is calibrated through the first clock and the second clock in the working state, so that the clock period determining method is simple and easy to operate, high in accuracy degree and free of using measuring equipment.
In an optional embodiment of the present application, the calculating the number of operations of the third clock in the operation time of the first clock, to obtain the first number includes: starting counting the first clock and the third clock at the first rising edge of the third clock after the first clock starts working; and stopping counting the last rising edge of the third clock before the first clock stops working to obtain the first clock number and the first number of the third clock.
In the above embodiment, a method for counting the first clock and the third clock is provided, where counting is started at the first rising edge of the third clock after the first clock starts to work, so that the number of the third clocks in the working time of the first clock can be accurately counted.
In an optional embodiment of the present application, the calculating the number of the third clocks in the working time of the second clock to obtain the second number includes: starting to count the second clock and the third clock at the first rising edge of the third clock after the second clock starts to work; and stopping counting the last rising edge of the third clock before the second clock stops working to obtain the second clock number and the second number of the third clock.
In the above embodiment, a method for counting the second clock and the third clock is provided, where counting is started at the first rising edge of the third clock after the second clock starts to work, so that the number of the third clocks in the working time of the second clock can be accurately counted.
In an optional embodiment of the present application, the calculating according to the first clock number, the period of the first clock, the second clock number, the period of the second clock, the first number of third clocks, and the second number of third clocks to obtain the period of the third clock includes: according to the first clock number and the first clock period, calculating to obtain the working time of the first clock; calculating according to the working time of the first clock and the first number to obtain a first period; calculating working time of the second clock according to the second clock number and the second clock period; calculating the working time of the second clock and the second number to obtain a second period; and obtaining the period of the third clock according to the first period and the second period.
In the above embodiment, the working time of the first clock and the working time of the second clock are used to calculate the period of the third clock, the period of the third clock is obtained through the two calculation results, and the two clocks are used to calculate, so that the error can be reduced, and a more accurate calculation result can be obtained.
In an alternative embodiment of the present application, the obtaining the period of the third clock according to the first period and the second period includes: respectively calculating errors of the first period and the second period to obtain a first error and a second error; comparing the first error with the second error to obtain a comparison value; and determining one period from the first period and the second period as the period of the third clock according to the comparison value.
In the above embodiment, the errors of the first period and the second period are calculated respectively, and the accuracy of the periods is judged by the difference value of the errors of the first period and the second period, so that the period with smaller error can be selected, and the accuracy of the third period is improved.
In an alternative embodiment of the present application, determining a period from the first period and the second period as the period of the third clock according to the comparison value includes: acquiring the magnitude relation between the comparison value and a preset threshold value; and if the magnitude relation indicates that the comparison value is larger than a preset threshold value, determining the second period as the period of the third clock.
In the above embodiment, the comparison value of the first error and the second error is obtained, and the period to be selected is determined according to the magnitude relation between the comparison value and the threshold value, so that the method is simple and easy to implement, the calculation time can be reduced, and the calculation frequency is increased.
In an alternative embodiment of the application, the method further comprises: calculating to obtain a third number according to the sleep time and the period of the third clock; and determining an anchor point according to the third number.
The above embodiment provides an example of anchor point calculation, and the calculated anchor point has high accuracy, so that the problem that in a low-power consumption wireless transceiver system, clock accuracy is insufficient in a dormant state, an anchor point cannot be accurately selected, and communication fails can be solved. Moreover, the method adopts double-clock calibration, and the algorithm of the low-precision clock can be calibrated through the clock in the working state, so that the method is simple and easy to implement, and measurement equipment is not needed.
A second aspect of the present application provides a clock cycle determining apparatus, the apparatus comprising: the first counting module is used for calculating the number of first clock works and the number of third clock works in the working time of the first clock to respectively obtain the first number of the first clock and the first number of the third clock;
the second counting module is used for calculating the number of second clock works and the number of third clock works in the working time of the second clock to respectively obtain the second number of the second clock and the second number of the third clock;
the calculating module is used for calculating the period of the third clock according to the first clock number, the period of the first clock, the second clock number, the period of the second clock, the first number of the third clock and the second number of the third clock, and the period of the first clock and the period of the second clock are preset.
A third aspect of the present application provides an electronic apparatus, comprising: a processor, a communication interface, a memory, and a bus; the processor and the memory complete communication with each other through the bus; the communication interface is used for communicating signaling or data with other node equipment; the memory stores program instructions executable by the processor, the processor invoking the program instructions to enable execution of the clock cycle determination method of any of the first aspects.
A fourth aspect of the present application provides a computer-readable storage medium having stored thereon computer program instructions which, when read and executed by a computer, perform the clock cycle determination method according to any one of the first aspects.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the embodiments of the present application will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and should not be considered as limiting the scope, and other related drawings can be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of communication interactions between wireless transceiver devices according to an embodiment of the present application;
FIG. 2 is a flow chart of a method for determining clock cycles according to an embodiment of the present application;
FIG. 3 is a schematic diagram of clock operation provided by one embodiment of the present application;
FIG. 4 is a schematic block diagram of a clock cycle determining apparatus according to one embodiment of the present application;
fig. 5 is a schematic block diagram of an electronic device according to an embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be described below with reference to the accompanying drawings in the embodiments of the present application.
As shown in fig. 1, fig. 1 is a schematic diagram of communication interaction of a wireless transceiver device according to an embodiment of the present application, where the wireless transceiver device is in a working state when performing communication interaction, and the rest is in a dormant state, and the transceiver device needs to accurately calculate an anchor point after a long-time dormant state, and enter the working state at the anchor point to perform communication. Inaccuracy of the anchor points can result in communication failure, and how to determine the exact anchor points is critical to wireless communication success.
In an operating state, in order to perform wireless transceiving and processing of communication data, a high-precision clock is generally provided in a system, and a 24MHz crystal clock (CLK 1) and a 288MHz system clock (CLK 2) are provided in the system by way of example. The 288MHz system clock is generated by a phase-locked loop circuit with CLK1 as a reference. In the sleep state, for low power consumption, the clock is not provided, but only a low power consumption clock (CLK 3) is provided, and CLK3 is usually characterized by low power consumption, low precision, low frequency, etc. This clock frequency is, for example, approximately 500KHz.
The sleep state is typically long in duration and small deviations in the CLK3 clock frequency can result in inaccurate anchor points. In the prior art, the clock period of the CLK3 clock is usually measured through measuring equipment, the method is complex and time-consuming, the measured precision of the CLK3 clock cannot meet the requirement of wireless connection on the precision of the clock, and the deviation of an anchor point calculated directly through the clock is too large to ensure normal transceiving.
Based on the above, the application provides a clock period determining method, which calculates the period of the third clock according to the first clock number, the period of the first clock, the second clock number, the period of the second clock, the first number of the third clock and the second number of the third clock, and calibrates the period of the third clock by the first clock and the second clock in working state, so that the method is simple and easy to implement, has high accuracy degree, and does not need to use measuring equipment.
Fig. 2 is a block diagram of a clock period determining method according to an embodiment of the present application, as shown in fig. 2, the method includes steps S210 to S230:
s210, calculating the number of first clock works and the number of third clock works in the working time of the first clock to obtain the first number of the first clock and the first number of the third clock respectively.
And counting the number of the first clock and the third clock in the working time of the first clock to obtain the number of the first clock, namely the first number of the first clock and the number of the third clock, namely the first number of the third clock.
In one embodiment of the present application, the step S210 may include: starting counting the first clock and the third clock at the first rising edge of the third clock after the first clock starts working; and stopping counting the last rising edge of the third clock before the first clock stops working to obtain the first clock number and the first number of the third clock.
For example, as shown in FIG. 3, FIG. 3 shows a schematic diagram of clock operation, the third clock CLK3 is clocked in both an active state and a sleep state, the first clock CLK1 is clocked in the active state, the clock of CLK1 is denoted as CLK1 ready, the second clock CLK2 is a phase-locked loop output with an additional locking process, so CLK2 is T later than CLK1 delay After a time there is a clock, CLK2 hasThe time of the clock is denoted as CLK2 ready time.
After the first clock starts to operate, that is, after the CLK1 ready time, at the first rising edge of the third clock after the time, the first COUNTER1 is used to start counting CLK3 and CLK1 respectively, the last rising edge of the third clock before the first clock stops operating stops counting, and the operating time of the COUNTER1 is represented as COUNTER1 work in fig. 3, and the COUNTER1 counts to obtain a first clock number K1 and a first number k3_1 of the third clock.
In the above embodiment, a method for counting the first clock and the third clock is provided, where counting is started at the first rising edge of the third clock after the first clock starts to work, so that the number of the third clocks in the working time of the first clock can be accurately counted.
S220, calculating the number of second clock works and the number of third clock works in the working time of the second clock to obtain the second number of the second clock and the second number of the third clock respectively.
And counting the number of second clock and third clock works in the working time of the second clock to obtain the number of second clock works, namely the second clock number K2, and the number of third clock works, namely the second number K3_2 of the third clock.
In one embodiment of the present application, the step S220 includes: starting to count the second clock and the third clock at the first rising edge of the third clock after the second clock starts to work; and stopping counting the last rising edge of the third clock before the second clock stops working to obtain the second clock number and the second number of the third clock.
As shown in fig. 3, after the second clock starts to operate, i.e., at the timing of CLK2 ready, at the first rising edge of CLK3 after that timing, counting CLK3 and CLK2 is started using the second COUNTER2, respectively, and the last rising edge of CLK3 by COUNTER2 before the end of the second clock stops counting CLK3 and CLK 2. The working time of COUNTER2 is denoted as COUNTER2 work in fig. 3, and COUNTER2 counts to obtain a second number of clocks and a second number of said third clocks.
In the above embodiment, a method for counting the second clock and the third clock is provided, where counting is started at the first rising edge of the third clock after the second clock starts to work, so that the number of the third clocks in the working time of the second clock can be accurately counted.
S230, calculating to obtain the period of the third clock according to the first clock number, the period of the first clock, the second clock number, the period of the second clock, the first number of the third clock and the second number of the third clock, wherein the period of the first clock and the period of the second clock are preset.
The period T1 of the first clock and the period T2 of the second clock are obtained, and the period of the high-precision clock in the radio transceiver system is generally known and can be accurately measured.
The time difference between the third clock and the first clock and the time difference between the third clock and the second clock can be calculated through the data, the period of the third clock can be calculated through the time difference, the working time of the first clock can be calculated through the period T1 of the first clock and the first clock number K1, the working time of the second clock can be calculated through the period T2 of the second clock and the first clock number K2, the Tdelay is calculated through the difference between the first clock number K3_1 and the second clock number K3_2, and the period of the third clock can be calculated through the difference and the Tdelay.
In one embodiment of the present application, the step S230 includes: according to the first clock number and the first clock period, calculating to obtain the working time of the first clock; calculating according to the working time of the first clock and the first number to obtain a first period; calculating working time of the second clock according to the second clock number and the second clock period; calculating the working time of the second clock and the second number to obtain a second period; and obtaining the period of the third clock according to the first period and the second period.
The period of the third clock may be estimated using the working time of the first clock, and the calculated clock period of CLK3 is: t3_1= (k1×t1)/(k3_1), since the period T1 of CLK1 is determined, k3_1 is also a determined integer, since the period of the first clock and the period of the third clock are not identical, and when they cannot start to operate on the Ji Ru first clock, the third clock may not be operated or has already operated for half a period, in which case the t3_1 error mainly originates from K1, which is a maximum of ±1 CLK1 clock period. The period t3_1 of the third clock estimated by the first clock is referred to as a first period.
Similarly, if the period of the third clock is estimated by using the operating time of the second clock, the calculated clock period of CLK3 is t3_2= (k2×t2)/(k3_2). Similarly, T2 and k3_2 are both defined, the period of the second clock and the period of the third clock are not exactly the same, they are not aligned, the error mainly originates from K2, and the error is up to ±1 CLK2 clock period. The period t3_2 of the third clock estimated by the second clock is referred to as a second period.
And calculating the period of the third clock according to the first period and the second period, for example, taking the average value of the first period and the second period, and taking the average value as the period of the third clock.
In the above embodiment, the working time of the first clock and the working time of the second clock are used to calculate the period of the third clock, the period of the third clock is obtained through the two calculation results, and the two clocks are used to calculate, so that the error can be reduced, and a more accurate calculation result can be obtained.
In one embodiment of the present application, the obtaining the period of the third clock according to the first period and the second period includes: respectively calculating errors of the first period and the second period to obtain a first error and a second error; comparing the first error with the second error to obtain a comparison value; and determining one period from the first period and the second period as the period of the third clock according to the comparison value.
The CLK3 period T3_1 calculated for CLK1 is up to + -1 CLK1 clock cycles, which error may be expressed as: |Δt3_1|=t1/(k3_1). CLK3 period t3_2 calculated by CLK2 is up to ±1 CLK2 clock period, which error can be expressed as: |Δt3_2|=t2/(k3_2).
Since CLK2 clocks faster than CLK1, the period T2 is smaller than T1, which may make Δt3_2 smaller than Δt3_1.
However, since the CLK2 clock is output later than CLK1 by Tdelay, the time for counting the third clock is shorter than the time for counting CLK1, and as shown in fig. 3, the time of COUNTER2 work is shorter than that of COUNTER1 work, and it can be found by the above error formula that the number of calculated times becomes smaller due to the shorter time, thereby increasing the error.
Therefore, the specific scenes of the first clock and the second clock need to be combined for judgment, and the working time, the dormant state duration time and the like of the COUNTER1 and the COUNTER2 in the working states of different scenes are different, so that the calculated period precision of the third clock is affected.
Tracking errors of T3_1 and T3_2, calculatingI.e. the comparison value of the first error DeltaT3_1 and the second error DeltaT3_2.
And judging which clock in the first clock and the second clock has smaller calculated error according to the comparison value, so that the period with smaller error is determined to be the period of the third clock in the first period and the second period.
In the above embodiment, the errors of the first period and the second period are calculated respectively, and the accuracy of the periods is judged by the difference value of the errors of the first period and the second period, so that the period with smaller error can be selected, and the accuracy of the third period is improved.
In one embodiment of the present application, said determining a period from said first period and said second period as a period of said third clock according to said comparison value includes: acquiring the magnitude relation between the comparison value and a preset threshold value; and if the magnitude relation indicates that the comparison value is larger than a preset threshold value, determining the second period as the period of the third clock.
A threshold value can be set according to the requirement, and the first period or the second period can be determined by calculating the magnitude relation between the comparison value and the threshold value, such as settingIf the result is less than 1, then T3=T3_1 is selected, if +.>Greater than 1, t3=t3_2 is selected.
In the above embodiment, the comparison value of the first error and the second error is obtained, and the period to be selected is determined according to the magnitude relation between the comparison value and the threshold value, so that the method is simple and easy to implement, the calculation time can be reduced, and the calculation frequency is increased.
In one embodiment of the application, the method further comprises: calculating to obtain a third number according to the sleep time and the period of the third clock; and determining an anchor point according to the third number.
After the period of the third clock is calculated, the anchor point can be further calculated by the sleep time. Illustratively, the CLK3 timing of FIG. 3 is used during sleep state to obtain sleep state duration T Dormancy method And determining the number of the CLK3 counts in the sleep state according to the calculated actual clock period T3 of the CLK3, thereby accurately determining the anchor point.
The cycle error calculated by the method is extremely small, taking COUNTER1 working time 1ms and COUNTER2 working time 0.9ms as an example, and the duration of the sleep state is 1s, and the maximum anchor point deviation calculated by the algorithm is only +/-3.86 us.
The above embodiment provides an example of anchor point calculation, and the calculated anchor point has high accuracy, so that the problem that in a low-power consumption wireless transceiver system, clock accuracy is insufficient in a dormant state, an anchor point cannot be accurately selected, and communication fails can be solved. Moreover, the method adopts double-clock calibration, and the algorithm of the low-precision clock can be calibrated through the clock in the working state, so that the method is simple and easy to implement, and measurement equipment is not needed.
According to the clock period determining method, the period of the third clock is obtained through calculation according to the first clock number, the period of the first clock, the second clock number, the period of the second clock, the first number of the third clock and the second number of the third clock, and the period of the third clock is calibrated through the first clock and the second clock in the working state, so that the clock period determining method is simple and easy to operate, high in accuracy degree and free of using measuring equipment.
Fig. 4 is a schematic diagram of a clock period determining apparatus 400 according to an embodiment of the present application, as shown in fig. 4, where the apparatus includes:
the first counting module 410 is configured to calculate the number of first clock operations and the number of third clock operations in the working time of the first clock, so as to obtain the first number of the first clock and the first number of the third clock respectively;
the second counting module 420 is configured to calculate the number of second clock operations and the number of third clock operations in the working time of the second clock, so as to obtain the second number of second clocks and the second number of third clocks respectively;
the calculating module 430 is configured to calculate the period of the third clock according to the first clock number, the period of the first clock, the second clock number, the period of the second clock, the first number of the third clock, and the second number of the third clock, where the period of the first clock and the period of the second clock are preset.
Fig. 5 is a schematic diagram of an electronic device 500 according to an embodiment of the present application, as shown in fig. 5, where the electronic device includes: a processor 510, communication interfaces, a memory 520, and a bus; the processor 510 and the memory 520 communicate with each other through the bus; the communication interface is used for communicating signaling or data with other node equipment; the memory 520 stores program instructions executable by the processor, and the processor 510 invokes the program instructions to perform the clock cycle determination method of any of the embodiments.
The embodiment of the application also provides a computer readable storage medium, wherein the computer readable storage medium stores computer program instructions, and when the computer program instructions are read and run by a computer, the clock period determining method of any embodiment is executed.
In the embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other manners. The above-described apparatus embodiments are merely illustrative, for example, the division of the units is merely a logical function division, and there may be other manners of division in actual implementation, and for example, multiple units or components may be combined or integrated into another system, or some features may be omitted, or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be through some communication interface, device or unit indirect coupling or communication connection, which may be in electrical, mechanical or other form.
Further, the units described as separate units may or may not be physically separate, and units displayed as units may or may not be physical units, may be located in one place, or may be distributed over a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
Furthermore, functional modules in various embodiments of the present application may be integrated together to form a single portion, or each module may exist alone, or two or more modules may be integrated to form a single portion.
It should be noted that the functions, if implemented in the form of software functional modules and sold or used as a stand-alone product, may be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application may be embodied essentially or in a part contributing to the prior art or in a part of the technical solution, in the form of a software product stored in a storage medium, comprising several instructions for causing a computer device (which may be a personal computer, a server, a network device, etc.) to perform all or part of the steps of the method according to the embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM) random access Memory (Random Access Memory, RAM), a magnetic disk, or an optical disk, or other various media capable of storing program codes.
In this document, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions.
The above description is only an example of the present application and is not intended to limit the scope of the present application, and various modifications and variations will be apparent to those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included in the protection scope of the present application.
Claims (10)
1. A method of clock cycle determination, the method comprising:
calculating the number of first clock works and the number of third clock works in the working time of the first clock to respectively obtain the first number of the first clock and the first number of the third clock;
calculating the number of second clock works and the number of third clock works in the working time of the second clock to respectively obtain the second number of the second clock and the second number of the third clock;
and calculating according to the first clock number, the period of the first clock, the second clock number, the period of the second clock, the first number of the third clock and the second number of the third clock to obtain the period of the third clock, wherein the period of the first clock and the period of the second clock are preset.
2. The method of claim 1, wherein the calculating the number of third clock operations during the operation time of the first clock to obtain the first number includes:
starting counting the first clock and the third clock at the first rising edge of the third clock after the first clock starts working;
and stopping counting the last rising edge of the third clock before the first clock stops working to obtain the first clock number and the first number of the third clock.
3. The method of claim 1, wherein the counting the number of the third clocks in the operation time of the second clock to obtain the second number includes:
starting to count the second clock and the third clock at the first rising edge of the third clock after the second clock starts to work;
and stopping counting the last rising edge of the third clock before the second clock stops working to obtain the second clock number and the second number of the third clock.
4. The method of claim 1, wherein the calculating the period of the third clock based on the first number of clocks, the period of the first clock, the second number of clocks, the period of the second clock, the first number of third clocks, the second number of third clocks, comprises:
according to the first clock number and the first clock period, calculating to obtain the working time of the first clock;
calculating according to the working time of the first clock and the first number to obtain a first period;
calculating working time of the second clock according to the second clock number and the second clock period;
calculating the working time of the second clock and the second number to obtain a second period;
and obtaining the period of the third clock according to the first period and the second period.
5. The method of claim 4, wherein the deriving the period of the third clock from the first period and the second period comprises:
respectively calculating errors of the first period and the second period to obtain a first error and a second error;
comparing the first error with the second error to obtain a comparison value;
and determining one period from the first period and the second period as the period of the third clock according to the comparison value.
6. The method of claim 5, wherein determining one period from the first period and the second period as the period of the third clock based on the comparison value comprises:
acquiring the magnitude relation between the comparison value and a preset threshold value;
and if the magnitude relation indicates that the comparison value is larger than a preset threshold value, determining the second period as the period of the third clock.
7. The method according to claim 1, wherein the method further comprises:
calculating to obtain a third number according to the sleep time and the period of the third clock;
and determining an anchor point according to the third number.
8. A clock cycle determining apparatus, the apparatus comprising:
the first counting module is used for calculating the number of first clock works and the number of third clock works in the working time of the first clock to respectively obtain the first number of the first clock and the first number of the third clock;
the second counting module is used for calculating the number of second clock works and the number of third clock works in the working time of the second clock to respectively obtain the second number of the second clock and the second number of the third clock;
the calculating module is used for calculating the period of the third clock according to the first clock number, the period of the first clock, the second clock number, the period of the second clock, the first number of the third clock and the second number of the third clock, and the period of the first clock and the period of the second clock are preset.
9. An electronic device, comprising: a processor, a communication interface, a memory, and a bus; the processor and the memory complete communication with each other through the bus; the communication interface is used for communicating signaling or data with other node equipment; the memory stores program instructions executable by the processor, the processor invoking the program instructions to perform the clock cycle determination method of any of claims 1-7.
10. A computer readable storage medium, having stored thereon computer program instructions which, when read and executed by a computer, perform the clock cycle determination method of any one of claims 1-7.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202311132342.4A CN117177350A (en) | 2023-09-04 | 2023-09-04 | Clock cycle determination method, device, equipment and storage medium |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202311132342.4A CN117177350A (en) | 2023-09-04 | 2023-09-04 | Clock cycle determination method, device, equipment and storage medium |
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