CN116782700A - A display panel and its preparation method and display device - Google Patents

A display panel and its preparation method and display device Download PDF

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Publication number
CN116782700A
CN116782700A CN202310954025.4A CN202310954025A CN116782700A CN 116782700 A CN116782700 A CN 116782700A CN 202310954025 A CN202310954025 A CN 202310954025A CN 116782700 A CN116782700 A CN 116782700A
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China
Prior art keywords
layer
anode
pixel
substrate
display panel
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CN202310954025.4A
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Chinese (zh)
Inventor
李晓南
邹建明
黄寅虎
冯兵明
张福爽
严俊凯
蜂伟雄
张大成
王继兴
苏冬冬
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BOE Technology Group Co Ltd
Beijing BOE Technology Development Co Ltd
Yunnan Chuangshijie Optoelectronics Technology Co Ltd
Original Assignee
BOE Technology Group Co Ltd
Beijing BOE Technology Development Co Ltd
Yunnan Chuangshijie Optoelectronics Technology Co Ltd
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Priority to CN202310954025.4A priority Critical patent/CN116782700A/en
Publication of CN116782700A publication Critical patent/CN116782700A/en
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/805—Electrodes
    • H10K59/8052—Cathodes

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Electroluminescent Light Sources (AREA)

Abstract

The embodiment of the application provides a display panel, a preparation method thereof and a display device. The display panel comprises a substrate, and an anode layer, a flat layer, a pixel limiting layer, a light-emitting layer and a cathode layer which are sequentially arranged along the direction far away from the substrate; the pixel limiting layer is provided with a plurality of pixel openings, and the pixel openings limit a plurality of pixel units; the anode layer comprises a plurality of anodes which are arranged at intervals, and the anodes are arranged in one-to-one correspondence with the pixel units; the flat layer is positioned between two adjacent anodes; the top surface of the flat layer is higher than the top surface of the anode; a pixel defining layer located at a portion between two adjacent pixel units, formed with a break area exposing a portion of the flat layer; the light emitting layer covers the anode layer, the pixel defining layer and the flat layer; the light-emitting layer includes a first light-emitting sub-layer, a charge generation layer, and a second light-emitting sub-layer that are sequentially disposed in a direction away from the substrate, and the cathode layer covers the light-emitting layer. Therefore, the occurrence of cathode puncture is reduced, and the quality of the display panel is improved.

Description

Display panel, preparation method thereof and display device
Technical Field
The application relates to the technical field of display, in particular to a display panel, a preparation method thereof and a display device.
Background
An Organic Light-Emitting Diode (OLED) is a micro display developed in recent years, and a mature silicon-based semiconductor process is used to manufacture an OLED display with high PPI (pixel density) and high refresh frequency, and the OLED display is applied in VR (Virtual Reality) and AR (Augmented Reality) fields. The silicon-based OLED realizes the colorization of display by adopting a mode of white light and three-color filtering, and can realize the effect of light emission superposition by adopting a mode of connecting a plurality of light emitting layers in series by adopting a charge generating layer (charge generation layer, CGL). The display panel in the related art comprises a plurality of pixel units, wherein the area where the pixel units are positioned is a pixel area of the display panel, and the area between the pixel units is a non-pixel area; each pixel unit is correspondingly provided with an anode, and a non-pixel area film layer is filled between the adjacent anodes.
However, due to the influence of the process, the filling effect of the film layer in the non-pixel region between adjacent anodes is not ideal, so that the shape of the distorted and bent part of the cathode layer above the anode layer is uneven, and under severe conditions, the situation of cathode puncture, namely the short-circuit leakage of the distorted part cathode and the charge generation layer below the distorted part cathode, is easy to cause, and the leakage is not easy to control and has adverse effects on the service life of the device.
Disclosure of Invention
The embodiment of the application aims to provide a display panel, a preparation method thereof and a display device, so as to reduce the occurrence of cathode puncture. The specific technical scheme is as follows:
an embodiment of a first aspect of the present application provides a display panel including a substrate, and an anode layer, a flat layer, a pixel defining layer, a light emitting layer, and a cathode layer sequentially disposed in a direction away from the substrate; the pixel defining layer has a plurality of pixel openings defining a plurality of pixel cells; the anode layer comprises a plurality of anodes which are arranged at intervals, and the anodes are arranged in one-to-one correspondence with the pixel units; the flat layer is positioned between two adjacent anodes; the top surface of the flat layer is higher than the top surface of the anode; an orthographic projection of the pixel defining layer on the substrate having an overlap region with an orthographic projection of the anode on the substrate; the pixel defining layer is disposed in contact with the anode and the planarization layer; the pixel defining layer is positioned at a part between two adjacent pixel units, and a disconnection area exposing the flat layer is formed; the light emitting layer covers the anode layer, the pixel defining layer, and the planarization layer; the light emitting layer includes a first light emitting sub-layer, a charge generating layer, and a second light emitting sub-layer sequentially disposed in a direction away from the substrate, and the cathode layer covers the light emitting layer.
In some embodiments of the application, the ratio of the vertical distance between the cathode layer and the anode layer above the planar layer to the vertical distance between the cathode layer and the anode layer above the anode layer is in the range of: 1.5-3.
In some embodiments of the application, a portion of the pixel defining layer adjacent to the substrate is recessed a first distance from an inner side of the break-away region to an outer side of the break-away region to form an undercut structure;
the undercut structure forms a blank space between at least a portion of the light emitting layer located in the break-off region and a sidewall of the pixel defining layer.
In some embodiments of the application, a gap exists between an orthographic projection of the empty space on the substrate and an orthographic projection of the anode on the substrate;
the bottom of the empty space is flush with the top surface of the flat layer.
In some embodiments of the application, the pixel defining layer includes: the first sub-layer, the second sub-layer and the third sub-layer are sequentially stacked along the direction away from the substrate;
the undercut structure is formed by the first and second sub-layers being recessed a first distance from the inner side of the break-away region to the outer side of the break-away region, or the undercut structure is formed by the second sub-layer being recessed a first distance from the inner side of the break-away region to the outer side of the break-away region.
In some embodiments of the present application, the distance between the second sub-layers located on both sides of the same breaking area has a value ranging from:
the first distance has a value ranging from:
the first distance is not more than one tenth of the distance between the second sub-layers on both sides of the same break area.
In some embodiments of the present application, the flat layer and the first sub-layer are made of the same material and are formed as a unitary structure.
In some embodiments of the application, the anode comprises: sequentially stacking a titanium layer, a titanium nitride layer, an aluminum layer, a titanium nitride layer and an indium tin oxide layer along the direction away from the substrate;
the indium tin oxide layer is partially formed between the sidewalls of the titanium layer, the titanium nitride layer, the aluminum layer, and the titanium nitride layer, which are provided in the stack, and the planarization layer.
In some embodiments of the present application, the portion of the indium tin oxide layer between the sidewalls of the titanium layer, titanium nitride layer, aluminum layer, and titanium nitride layer and the planar layer in the stacked arrangement forms a bevel such that the orthographic projection of the boundary of the planar layer on the substrate has an overlap region with the orthographic projection of the indium tin oxide layer on the substrate.
An embodiment of a second aspect of the present application provides a method for manufacturing a display panel, for manufacturing the display panel of any one of the embodiments of the first aspect, including:
providing a substrate;
preparing an anode layer on a substrate; the anode layer comprises a plurality of anodes arranged at intervals;
preparing a flat layer on the anode layer; the flat layer is positioned between two adjacent anodes, and the top surface of the flat layer is higher than the top surface of each anode;
preparing a pixel defining layer on the planarization layer; the pixel limiting layer is provided with a plurality of pixel openings, and the pixel openings limit a plurality of pixel units; the anodes are arranged in one-to-one correspondence with the pixel units; the pixel defining layer is positioned at a part between two adjacent pixel units, and a disconnection area exposing the flat layer is formed;
preparing a light emitting layer on the pixel defining layer;
a cathode layer is prepared on the light emitting layer.
In some embodiments of the application, the preparing a planar layer on the anode layer includes:
preparing a first inorganic layer on the anode layer;
coating photoresist on the first inorganic layer, and carrying out patterning treatment on the photoresist;
etching the first inorganic layer to form a flat layer;
the preparing a pixel defining layer on a planarization layer includes:
preparing a second inorganic layer on the planarization layer;
coating photoresist on the second inorganic layer, and carrying out patterning treatment on the photoresist;
the second inorganic layer is etched to form a pixel defining layer.
In some embodiments of the present application, after the etching the second inorganic layer to form the pixel defining layer, the method further includes:
coating photoresist on the pixel limiting layer, and carrying out patterning treatment on the photoresist;
the pixel defining layer is etched to form an undercut structure.
In some embodiments of the application, the preparing an anode layer on a substrate includes:
sequentially preparing a titanium layer, a titanium nitride layer, an aluminum layer, a titanium nitride layer and an indium tin oxide layer on a substrate;
the preparing a second inorganic layer on the planarization layer includes:
and sequentially preparing a first inorganic sub-layer, a second inorganic sub-layer and a third inorganic sub-layer on the flat layer.
An embodiment of a third aspect of the application provides a display device comprising the display panel of any of the embodiments of the first aspect.
The embodiment of the application has the beneficial effects that:
the display panel comprises a substrate, and an anode layer, a flat layer, a pixel limiting layer, a light-emitting layer and a cathode layer which are sequentially arranged along the direction far away from the substrate; the light-emitting layer comprises a first light-emitting sub-layer, a charge generation layer and a second light-emitting sub-layer which are sequentially arranged; the flat layer is positioned between two adjacent anodes, namely the flat layer is positioned in a non-pixel area between two adjacent pixel units; the top surface of the flat layer is higher than the top surface of the anode, and under the heightening effect of the flat layer, the pixel limiting layer is lifted, so that the cathode layer above the pixel limiting layer is flatter, the distance between the cathode layer and the anode layer between two adjacent pixel units is increased, the distortion of the cathode layer between the two adjacent pixel units is reduced, the overlap joint condition of the cathode layer and the charge generating layer is reduced, the occurrence of cathode puncture is reduced, and the quality of the display panel is improved.
According to the display panel prepared by the preparation method of the display panel, the top surface of the flat layer is higher than the top surface of the anode, and the pixel limiting layer is lifted under the heightening action of the flat layer, so that the cathode layer positioned above the flat layer is flatter, the distance between the cathode layer and the anode layer positioned between two adjacent pixel units is increased, the distortion of the cathode layer positioned between the two adjacent pixel units is reduced, the lap joint condition of the cathode layer and the charge generating layer is reduced, the occurrence of the cathode puncture condition is further reduced, and the quality of the display panel is improved.
In other embodiments of the present application, the first sub-layer in the breaking area may be etched completely or may be left to be part of the planarization layer, and the planarization layer may be further raised when the undercut structure is formed.
Drawings
In order to more clearly illustrate the embodiments of the application or the technical solutions in the prior art, the drawings used in the embodiments or the description of the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the application, and other embodiments may be obtained according to these drawings to those skilled in the art.
Fig. 1A is a schematic structural diagram of a display panel according to an embodiment of the application;
FIG. 1B is a dimension drawing of FIG. 1A;
FIG. 2 is a flowchart of a method for manufacturing a display panel according to an embodiment of the application;
fig. 3A is a diagram illustrating a process of manufacturing a display panel according to an embodiment of the application (including steps a to E);
FIG. 3B is a diagram showing a process of manufacturing a display panel according to an embodiment of the present application (including steps F to I);
fig. 3C is a top view of fig. 3A after step D is completed.
Reference numerals illustrate:
a substrate 100; tungsten holes 101; an anode layer 200; a titanium layer 210; a titanium nitride layer 220; an aluminum layer 230; an indium tin oxide layer 240; an anode 201; a planarization layer 300; a pixel defining layer 400; a disconnection region 401; undercut structure 402; a first sub-layer 410; a second sub-layer 420; a third sub-layer 430; a light emitting layer 500; a first emissive sub-layer 510; a charge generation layer 520; a second light emitting sub-layer 530; a cathode layer 600; a first inorganic layer 700; photoresist 800; a second inorganic layer 900; a first inorganic sub-layer 910; a second inorganic sub-layer 920; a third inorganic sub-layer 930; a pixel opening H; a distance L1 between the top surface of the planar layer and the top surface of the anode; a distance L2 between the top surface of the pixel defining layer and the top surface of the anode; a distance L3 between the top surface of the pixel defining layer and the cathode layer; a distance L4 between the second sublayers; a vertical distance L5 between the cathode layer and the anode above the anode; a vertical distance L6 between the cathode layer and the anode above the planar layer; a first distance L7.
Detailed Description
The following description of the embodiments of the present application will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present application, but not all embodiments. Based on the embodiments of the present application, all other embodiments obtained by the person skilled in the art based on the present application are included in the scope of protection of the present application.
The silicon-based OLED realizes the colorization of display by adopting a mode of white light and three-color filtering, and can realize the effect of light emission superposition by adopting a mode of connecting a plurality of light emitting layers in series by adopting a charge generating layer (charge generation layer, CGL). In the related art, the filling effect of the film layer in the non-pixel area between adjacent anodes is not ideal, so that the shape of the distorted and bent part of the cathode layer above the anode layer is uneven, under severe conditions, short-circuit electric leakage between the cathode of the distorted part and the charge generation layer below the cathode is easy to cause, namely, a cathode puncture phenomenon is generated, and the electric leakage is not easy to control and has adverse effects on the service life of the device.
In order to reduce the occurrence of cathode puncture of a display panel, the embodiment of the application provides a display panel, a preparation method thereof and a display device.
As shown in fig. 1A and fig. 1B, fig. 1A is a schematic structural diagram of a display panel according to an embodiment of the application; fig. 1B is a dimension drawing of fig. 1A, and an embodiment of the first aspect of the present application proposes a display panel, which includes a substrate 100, and an anode layer 200, a planarization layer 300, a pixel defining layer 400, a light emitting layer 500, and a cathode layer 600 sequentially disposed in a direction away from the substrate 100; the pixel defining layer 400 has a plurality of pixel openings H, and the plurality of pixel openings H define a plurality of pixel units; the anode layer 200 includes a plurality of anodes 201 arranged at intervals, and the plurality of anodes 201 are arranged in one-to-one correspondence with the plurality of pixel units; the flat layer 300 is located between two adjacent anodes 201; the top surface of the planar layer 300 is higher than the top surface of the anode 201; an orthographic projection of the pixel defining layer 400 onto the substrate 100 has an overlap area with an orthographic projection of the anode 201 onto the substrate 100; the pixel defining layer 400 is disposed in contact with the anode 201 and the flat layer 300; the pixel defining layer 400 is formed with a break area 401 exposing a portion of the planarization layer 300 at a portion between two adjacent pixel units; the light emitting layer 500 covers the anode layer 200, the pixel defining layer 400, and the planarization layer 300; the light emitting layer 500 includes a first light emitting sub-layer 510, a charge generating layer 520, and a second light emitting sub-layer 530 sequentially disposed in a direction away from the substrate 100, and the cathode layer 600 covers the light emitting layer 500.
The display panel of the present application includes a substrate 100, an anode layer 200, a planarization layer 300, a pixel defining layer 400, a light emitting layer 500, and a cathode layer 600 sequentially disposed in a direction away from the substrate 100; the light emitting layer 500 includes a first light emitting sub-layer 510, a charge generating layer 520, and a second light emitting sub-layer 530, which are sequentially disposed; the flat layer 300 is located between two adjacent anodes 201, i.e., the flat layer 300 is located in a non-pixel region between two adjacent pixel units; the top surface of the planarization layer 300 is higher than the top surface of the anode 201, and under the heightening effect of the planarization layer 300, the pixel defining layer 400 is lifted up, so that the cathode layer 600 above the planarization layer is flatter, the distance between the cathode layer 600 and the anode layer 200 between two adjacent pixel units is increased, distortion of the cathode layer 600 between two adjacent pixel units is reduced, overlap of the cathode layer 600 and the charge generating layer 520 is reduced, occurrence of cathode penetration is reduced, and quality of the display panel is improved.
In some embodiments of the present application, as shown in fig. 1A and 1B, the distance L1 between the top surface of the flat layer 300 and the top surface of the anode 201 has a value ranging from:
in some embodiments of the present application, as shown in fig. 1A and 1B, the distance L2 between the top surface of the pixel defining layer 400 and the top surface of the anode 201 has a value ranging from:
in some embodiments of the present application, as shown in fig. 1A and 1B, the distance L3 between the top surface of the pixel defining layer 400 and the cathode layer 600 has a value ranging from:
in some embodiments of the present application, as shown in fig. 1A and 1B, the ratio of the vertical distance L6 between the cathode layer 600 and the anode 201 above the flat layer 300 to the vertical distance L5 between the cathode layer 600 and the anode 201 above the anode 201 ranges from: 1.5-3. In this ratio range, the blocking effect of the charge generation layer 520 can be sufficiently ensured, the cathode layer 600 can be leveled to the greatest extent, and the morphology of the cathode layer 600 can be optimized.
In some embodiments of the present application, as shown in fig. 1A and 1B, a portion of the pixel defining layer 400 near the substrate 100 is recessed from the inside of the break-out region 401 toward the outside of the break-out region 401 by a first distance L7, forming an undercut structure 402, the undercut structure 402 forming a blank space between at least a portion of the light emitting layer 500 located within the break-out region 401 and the sidewall of the pixel defining layer 400. In particular, at least a portion of the light emitting layer 500 located within the break-off region 401 may include a first light emitting sub-layer 510 and a charge generating layer 520. Because the charge generation layer 520 has higher carrier transmission efficiency, lateral crosstalk and leakage between pixel units are more likely to occur at low voltage, and the Undercut structure 402 (Undercut structure) is designed between pixel units, so that the occurrence of lateral crosstalk and leakage can be effectively reduced. Meanwhile, as the top surface of the flat layer 300 is higher than the top surface of the anode 201, the undercut structure 402 is lifted, so that the distance from the cathode layer 600 above the undercut structure to the anode 201 is increased, the light-emitting layer 500 is flatter, the shape of the cathode layer 600 is optimized, the electric leakage problem caused by cathode puncture is reduced, and the service life of the device is prolonged.
In some embodiments of the present application, as shown in FIG. 1A, there is a gap between the orthographic projection of the empty space on the substrate 100 and the orthographic projection of the anode 201 on the substrate 100; the bottom of the empty space is flush with the top surface of the flat layer 300.
In some embodiments of the present application, as shown in fig. 1A, the pixel defining layer 400 includes a first sub-layer 410, a second sub-layer 420, and a third sub-layer 430 sequentially stacked in a direction away from the substrate 100; the undercut structure 402 is formed by a first sub-layer 410 and a second sub-layer 420, which are recessed a first distance L7 from the inside of the break-away region 401 to the outside of the break-away region 401, or the undercut structure 402 is formed by a second sub-layer 420, which is recessed a first distance L7 from the inside of the break-away region 401 to the outside of the break-away region 401. The undercut structure 402 is flexible in preparation and facilitates production.
In some embodiments of the present application, the material of the planarization layer 300 and the first sub-layer 410 may be the same and formed as a unitary structure. Specifically, the material of the first sub-layer 410 and the third sub-layer 430 may be silicon oxide (SiO), and the material of the second sub-layer 420 may be silicon nitride (SiN); the material of the planarization layer 300 may be silicon oxide (SiO).
In some embodiments of the present application, as shown in fig. 1A, the distance L4 between the second sub-layers 420 located on both sides of the same break-off region 401 is in the range of:the first distance L7 has a value in the range:The first distance L7 does not exceed a value of one tenth of the distance L4 between the second sub-layers 420 located on both sides of the same break area 401. In this range of values, cross talk caused by blocking the charge generation layer 520 can be reduced more.
In some embodiments of the present application, as shown in fig. 1A, an anode 201 includes a titanium layer 210, a titanium nitride layer 220, an aluminum layer 230, a titanium nitride layer 220, and an indium tin oxide layer 240 (ITO) stacked in this order in a direction away from a substrate 100; the indium tin oxide layer 240 is partially formed between the sidewalls of the titanium layer 210, the titanium nitride layer 220, the aluminum layer 230, and the titanium nitride layer 220, which are stacked, and the planarization layer 300.
In some embodiments of the present application, the portion of the indium tin oxide layer 240 between the sidewalls of the titanium layer 210, the titanium nitride layer 220, the aluminum layer 230, and the titanium nitride layer 220, which are stacked, and the planarization layer 300 forms a bevel such that the orthographic projection of the boundary of the planarization layer 300 onto the substrate 100 has an overlapping area with the orthographic projection of the indium tin oxide layer 240 onto the substrate 100. To ensure that the planarizing layer 300 fills the space between adjacent anodes 201, facilitating planarization and elevation of the film layer above the planarizing layer 300.
Fig. 2 is a flowchart of a method for manufacturing a display panel according to an embodiment of the application, as shown in fig. 2 to 3B; fig. 3A is a diagram illustrating a process of manufacturing a display panel according to an embodiment of the application (including steps a to E); fig. 3B is a diagram of a process for manufacturing a display panel according to an embodiment of the present application (including steps F to I), and an embodiment of a second aspect of the present application provides a method for manufacturing a display panel according to any one of the embodiments of the first aspect, including:
s1, providing a substrate 100;
specifically, the substrate 100 may be a silicon Wafer (Wafer) with a tungsten hole 101 disposed thereon for connecting with the anode 201;
s2, preparing an anode layer 200 on the substrate 100 (step A shown in FIG. 3A);
the anode layer 200 includes a plurality of anodes 201 disposed at intervals; the anode 201 includes a titanium layer 210, a titanium nitride layer 220, an aluminum layer 230, a titanium nitride layer 220, and an indium tin oxide layer 240, which are sequentially stacked in a direction away from the substrate 100; the indium tin oxide layer 240 is partially formed between the sidewalls of the titanium layer 210, the titanium nitride layer 220, the aluminum layer 230, and the titanium nitride layer 220, which are stacked, and the planarization layer 300.
S3, preparing a flat layer 300 on the anode layer 200 (steps B to D shown in FIG. 3A);
the flat layer 300 is located between two adjacent anodes 201, and the top surface of the flat layer 300 is higher than the top surface of the anode 201; as shown in step D of fig. 3A, the front projection of the boundary of the flat layer 300 on the substrate 100 has an overlapping area with the front projection of the indium tin oxide layer 240 on the substrate 100; as shown in fig. 3C, fig. 3C is a top view of fig. 3A after the completion of step D, wherein the flat layer 300 is located between adjacent anodes 201;
s4, preparing a pixel defining layer 400 on the flat layer 300 (step E shown in FIG. 3A and steps F to I shown in FIG. 3B);
the pixel defining layer 400 has a plurality of pixel openings H, and the plurality of pixel openings H define a plurality of pixel units; the plurality of anodes 201 are arranged in one-to-one correspondence with the plurality of pixel units;
s5, preparing a light emitting layer 500 on the pixel defining layer 400;
the light emitting layer 500 includes a first light emitting sub-layer 510, a charge generating layer 520, and a second light emitting sub-layer 530, which are sequentially disposed;
s6, preparing a cathode layer 600 on the light-emitting layer 500;
the cathode layer 600 covers the light emitting layer 500.
In the display panel prepared by the preparation method of the display panel, the top surface of the flat layer 300 is higher than the top surface of the anode 201, and the pixel limiting layer 400 is lifted under the heightening action of the flat layer 300, so that the cathode layer 600 positioned above the flat layer is flatter, the distance between the cathode layer 600 and the anode layer 200 positioned between two adjacent pixel units is increased, the distortion of the cathode layer 600 positioned between the two adjacent pixel units is reduced, the overlap condition of the cathode layer 600 and the charge generating layer 520 is reduced, the occurrence of cathode puncture is reduced, and the quality of the display panel is improved.
In some embodiments of the present application, as shown in fig. 3A and 3B, a planarization layer 300 is prepared on the anode layer 200, including:
preparing (Dep) a first inorganic layer 700 on the anode layer 200 (step B as shown in fig. 3A);
coating a photoresist 800 on the first inorganic layer 700, and performing a patterning (Mask) process on the photoresist 800 (step C shown in fig. 3A);
etching the first inorganic layer 700 to form an orthographic projection of the boundary of the planarization layer 300 on the substrate 100 (step D shown in fig. 3A), with an overlapping area with the orthographic projection of the indium tin oxide layer 240 on the substrate 100; as shown in fig. 3C, a planar layer 300 is located between adjacent anodes 201;
preparing the pixel defining layer 400 on the planarization layer 300 includes:
preparing a second inorganic layer 900 on the planarization layer 300 (step E shown in fig. 3A);
the second inorganic layer 900 may include a first inorganic sub-layer 910, a second inorganic sub-layer 920, and a third inorganic sub-layer 930 sequentially disposed in a direction away from the substrate 100; the first inorganic sub-layer 910 and the third inorganic sub-layer 930 may be made of silicon oxide, and the second inorganic sub-layer 920 may be made of silicon nitride; to ensure the accuracy of the thickness of the first sub-layer 410, the preparation of the planarization layer 300 and the first inorganic sub-layer 910 is performed in two steps; if the requirement on the thickness precision of the first sub-layer 410 is not high, when the material of the first sub-layer 410 is the same as that of the flat layer 300, the first sub-layer may be prepared by a single process, that is, a part of the first inorganic layer 700 is reserved as the first inorganic sub-layer 910 in the step D;
coating a photoresist 800 on the second inorganic layer 900, and patterning the photoresist 800 (step F shown in fig. 3B);
the second inorganic layer 900 is etched (Etch) to form the pixel defining layer 400 (step G shown in fig. 3B).
In other embodiments of the present application, the first sub-layer 410 in the disconnected region 401 may be etched clean or may be left as part of the planarization layer 300 when the undercut structure 402 is formed, and the planarization layer 300 is further raised, which is not limited in this application.
In some embodiments of the present application, as shown in fig. 3A and 3B, after etching the second inorganic layer 900 to form the pixel defining layer 400, further includes:
coating a photoresist 800 on the pixel defining layer 400, and patterning the photoresist 800 (step H shown in fig. 3B);
etching the pixel defining layer 400 to form an undercut structure 402 (step I shown in fig. 3B); the pixel defining layer 400 is formed with a break area 401 exposing a portion of the planarization layer 300 at a portion between two adjacent pixel units; the light emitting layer 500 covers the anode layer 200, the pixel defining layer 400, and the planarization layer 300.
In some embodiments of the present application, as shown in fig. 3A, an anode layer 200 is prepared on a substrate 100, comprising:
sequentially preparing a titanium layer 210, a titanium nitride layer 220, an aluminum layer 230, a titanium nitride layer 220, and an indium tin oxide layer 240 on a substrate 100;
a second inorganic layer 900 is prepared on the planarization layer 300, including:
a first inorganic sub-layer 910, a second inorganic sub-layer 920, and a third inorganic sub-layer 930 are sequentially prepared on the planarization layer 300.
An embodiment of a third aspect of the application provides a display device comprising the display panel of any embodiment of the first aspect.
The display panel device of the present application includes the display panel of any one of the embodiments of the first aspect, the top surface of the flat layer 300 of the display panel is higher than the top surface of the anode 201, and the pixel defining layer 400 is raised under the heightening action of the flat layer 300, so that the cathode layer 600 located above the flat layer is flatter, the distance between the cathode layer 600 and the anode layer 200 located between two adjacent pixel units is increased, thereby reducing the distortion of the cathode layer 600 located between two adjacent pixel units, reducing the overlap condition of the cathode layer 600 and the charge generating layer 520, further reducing the occurrence of the cathode penetration condition, and improving the quality of the display device.
It is noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
In this specification, each embodiment is described in a related manner, and identical and similar parts of each embodiment are all referred to each other, and each embodiment mainly describes differences from other embodiments. In particular, for system embodiments, since they are substantially similar to method embodiments, the description is relatively simple, as relevant to see a section of the description of method embodiments.
The foregoing description is only of the preferred embodiments of the present application and is not intended to limit the scope of the present application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application are included in the protection scope of the present application.

Claims (14)

1.一种显示面板，其特征在于，包括：衬底以及沿远离所述衬底的方向依次设置的阳极层、平坦层、像素限定层、发光层和阴极层；1. A display panel, characterized in that it comprises: a substrate and an anode layer, a planarization layer, a pixel defining layer, a light-emitting layer and a cathode layer disposed sequentially along a direction away from the substrate; 所述像素限定层具有多个像素开口，所述多个像素开口限定出多个像素单元；The pixel defining layer has multiple pixel openings, which define multiple pixel units; 所述阳极层包括多个间隔设置的阳极，所述多个阳极与所述多个像素单元一一对应设置；The anode layer includes a plurality of anodes spaced apart, and the plurality of anodes are configured in one-to-one correspondence with the plurality of pixel units; 所述平坦层位于相邻的两个所述阳极之间；所述平坦层的顶面高于所述阳极的顶面；The planarization layer is located between two adjacent anodes; the top surface of the planarization layer is higher than the top surface of the anode. 所述像素限定层在所述衬底上的正投影，与所述阳极在所述衬底上的正投影具有交叠区域；所述像素限定层与所述阳极和所述平坦层接触设置；所述像素限定层位于相邻两个所述像素单元之间的部分，形成有使得所述平坦层部分暴露的断开区域；The orthographic projection of the pixel defining layer on the substrate overlaps with the orthographic projection of the anode on the substrate; the pixel defining layer is disposed in contact with the anode and the planarization layer; the portion of the pixel defining layer located between two adjacent pixel units forms a disconnected region that exposes a portion of the planarization layer. 所述发光层覆盖所述阳极层、所述像素限定层和所述平坦层；所述发光层包括沿远离所述衬底的方向依次设置的第一发光子层、电荷产生层和第二发光子层，所述阴极层覆盖所述发光层。The light-emitting layer covers the anode layer, the pixel defining layer, and the planarization layer; the light-emitting layer includes a first light-emitting sublayer, a charge generating layer, and a second light-emitting sublayer sequentially disposed along a direction away from the substrate, and the cathode layer covers the light-emitting layer. 2.根据权利要求1所述的显示面板，其特征在于，位于所述平坦层上方的所述阴极层与所述阳极之间的垂直距离，与位于所述阳极上方的所述阴极层与所述阳极之间的垂直距离的比值范围为：1.5-3。2. The display panel according to claim 1, wherein the ratio of the vertical distance between the cathode layer above the planarization layer and the anode to the vertical distance between the cathode layer above the anode and the anode is in the range of 1.5-3. 3.根据权利要求1所述的显示面板，其特征在于，所述像素限定层靠近所述衬底的部分，从所述断开区域的内侧向所述断开区域的外侧缩进第一距离，形成底切结构；3. The display panel according to claim 1, wherein the portion of the pixel defining layer near the substrate is recessed from the inside of the disconnected region to the outside of the disconnected region by a first distance to form an undercut structure; 所述底切结构使得位于所述断开区域内的至少部分所述发光层，与所述像素限定层的侧壁之间形成有空白空间。The undercut structure creates a blank space between at least a portion of the light-emitting layer located within the disconnected region and the sidewall of the pixel defining layer. 4.根据权利要求3所述的显示面板，其特征在于，所述空白空间在所述衬底上的正投影与所述阳极在所述衬底上的正投影之间存在间隙；4. The display panel according to claim 3, wherein a gap exists between the orthographic projection of the blank space onto the substrate and the orthographic projection of the anode onto the substrate; 所述空白空间的底部与所述平坦层的顶面平齐。The bottom of the blank space is flush with the top surface of the flat layer. 5.根据权利要求3所述的显示面板，其特征在于，所述像素限定层包括：沿远离所述衬底的方向，依次层叠设置的第一子层、第二子层和第三子层；5. The display panel according to claim 3, wherein the pixel defining layer comprises: a first sub-layer, a second sub-layer, and a third sub-layer sequentially stacked along a direction away from the substrate; 所述底切结构由所述第一子层和所述第二子层，从所述断开区域的内侧向所述断开区域的外侧缩进第一距离形成，或所述底切结构由所述第二子层，从所述断开区域的内侧向所述断开区域的外侧缩进第一距离形成。The undercut structure is formed by the first sub-layer and the second sub-layer, recessed a first distance from the inside of the disconnected region to the outside of the disconnected region, or the undercut structure is formed by the second sub-layer, recessed a first distance from the inside of the disconnected region to the outside of the disconnected region. 6.根据权利要求5所述的显示面板，其特征在于，位于所述同一断开区域两侧的，所述第二子层之间的距离的数值范围为： 6. The display panel according to claim 5, wherein the numerical range of the distance between the second sub-layers located on both sides of the same break area is: 所述第一距离的数值范围为： The numerical range of the first distance is: 所述第一距离的数值不超过，位于所述同一断开区域两侧的，所述第二子层之间的距离的数值的十分之一。The value of the first distance does not exceed one-tenth of the value of the distance between the second sub-layers located on both sides of the same disconnected area. 7.根据权利要求5所述的显示面板，其特征在于，所述平坦层和所述第一子层的材质相同，并形成为一体结构。7. The display panel according to claim 5, wherein the planarization layer and the first sub-layer are made of the same material and are formed as an integral structure. 8.根据权利要求1所述的显示面板，其特征在于，所述阳极包括：沿远离所述基板的方向，依次层叠设置的钛层、氮化钛层、铝层、氮化钛层和氧化铟锡层；8. The display panel according to claim 1, wherein the anode comprises: a titanium layer, a titanium nitride layer, an aluminum layer, a titanium nitride layer, and an indium tin oxide layer sequentially stacked along a direction away from the substrate; 所述氧化铟锡层部分形成在所述层叠设置的钛层、氮化钛层、铝层和氮化钛层的侧壁和所述平坦层之间。The indium tin oxide layer is partially formed between the sidewalls of the stacked titanium layer, titanium nitride layer, aluminum layer, and titanium nitride layer and the planarization layer. 9.根据权利要求8所述的显示面板，其特征在于，所述氧化铟锡层位于所述层叠设置的钛层、氮化钛层、铝层和氮化钛层的侧壁和所述平坦层之间的部分，形成一个斜面，使得所述平坦层的边界在所述衬底上的正投影，与所述氧化铟锡层在所述衬底上的正投影具有交叠区域。9. The display panel according to claim 8, wherein the indium tin oxide layer is located between the sidewalls of the stacked titanium layer, titanium nitride layer, aluminum layer and titanium nitride layer and the planarization layer, forming a slope such that the orthographic projection of the boundary of the planarization layer on the substrate overlaps with the orthographic projection of the indium tin oxide layer on the substrate. 10.一种显示面板的制备方法，其特征在于，用以制备权利要求1至9任一项所述的显示面板，包括：10. A method for manufacturing a display panel, characterized in that the method for manufacturing the display panel according to any one of claims 1 to 9 comprises: 提供衬底；Provide substrate; 在衬底上制备阳极层；阳极层包括多个间隔设置的阳极；An anode layer is fabricated on a substrate; the anode layer includes a plurality of spaced-apart anodes; 在阳极层上制备平坦层；平坦层位于相邻的两个阳极之间，平坦层的顶面高于阳极的顶面；A planarization layer is prepared on the anode layer; the planarization layer is located between two adjacent anodes, and the top surface of the planarization layer is higher than the top surface of the anode; 在平坦层上制备像素限定层；像素限定层具有多个像素开口，多个像素开口限定出多个像素单元；多个阳极与多个像素单元一一对应设置；所述像素限定层位于相邻两个所述像素单元之间的部分，形成有使得所述平坦层部分暴露的断开区域；A pixel defining layer is prepared on a planarization layer; the pixel defining layer has multiple pixel openings, which define multiple pixel units; multiple anodes are disposed in a one-to-one correspondence with the multiple pixel units; the portion of the pixel defining layer between two adjacent pixel units forms a disconnected region that exposes a portion of the planarization layer. 在像素限定层上制备发光层；A light-emitting layer is fabricated on the pixel-defining layer; 在发光层上制备阴极层。A cathode layer is fabricated on the light-emitting layer. 11.根据权利要求10所述的显示面板的制备方法，其特征在于，所述在阳极层上制备平坦层，包括：11. The method for preparing a display panel according to claim 10, characterized in that, preparing a planarization layer on the anode layer comprises: 在阳极层上制备第一无机层；A first inorganic layer is prepared on the anode layer; 在第一无机层上涂覆光刻胶，并对光刻胶进行图案化处理；Photoresist is coated on the first inorganic layer and then patterned. 刻蚀第一无机层，形成平坦层；The first inorganic layer is etched to form a planar layer; 所述在平坦层上制备像素限定层，包括：The step of fabricating a pixel-defining layer on a planar layer includes: 在平坦层上制备第二无机层；A second inorganic layer is prepared on the planarization layer; 在第二无机层上涂覆光刻胶，并对光刻胶进行图案化处理；Photoresist is coated on the second inorganic layer and then patterned. 刻蚀第二无机层，形成像素限定层。The second inorganic layer is etched to form a pixel-defining layer. 12.根据权利要求11所述的显示面板的制备方法，其特征在于，在所述刻蚀第二无机层，形成像素限定层之后，还包括：12. The method for manufacturing a display panel according to claim 11, characterized in that, after etching the second inorganic layer to form the pixel defining layer, it further includes: 在像素限定层上涂覆光刻胶，并对光刻胶进行图案化处理；Photoresist is coated on the pixel-defining layer and then patterned. 刻蚀像素限定层形成底切结构。The pixel-defining layer is etched to form an undercut structure. 13.根据权利要求11所述的显示面板的制备方法，其特征在于，所述在衬底上制备阳极层，包括：13. The method for preparing a display panel according to claim 11, characterized in that, preparing the anode layer on the substrate comprises: 在衬底上依次制备钛层、氮化钛层、铝层、氮化钛层和氧化铟锡层；A titanium layer, a titanium nitride layer, an aluminum layer, a titanium nitride layer, and an indium tin oxide layer are sequentially fabricated on a substrate. 所述在平坦层上制备第二无机层，包括：The preparation of the second inorganic layer on the planarization layer includes: 在平坦层上依次制备第一无机子层、第二无机子层和第三无机子层。The first inorganic sublayer, the second inorganic sublayer, and the third inorganic sublayer were sequentially prepared on the planarized layer. 14.一种显示装置，其特征在于，包括：权利要求1至9任一项所述的显示面板。14. A display device, characterized in that it comprises: a display panel as described in any one of claims 1 to 9.
CN202310954025.4A 2023-07-31 2023-07-31 A display panel and its preparation method and display device Pending CN116782700A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN119486510A (en) * 2024-11-12 2025-02-18 京东方科技集团股份有限公司 Display panel, method for manufacturing display panel, and display device

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