CN1155151C - Synchronous rectifier - Google Patents

Abstract

The present invention relates to a synchronous rectification circuit. A traditional synchronous rectification circuit has the problem of the rectification MOS pipes of insufficient conduction or simultaneous conduction. The synchronous rectification circuit comprises a transformer, a pair of synchronous rectification MOS pipes, an auxiliary MOS pipe and a drive winding, wherein the positive homonymous terminal of the drive winding and the positive homonymous terminal of a primary side winding have the same polarity, and the positive homonymous terminal is provided with a tap; a gate electrode of the auxiliary MOS pipe is connected with a gate electrode of one (S1) of the pair of synchronous rectification MOS pipes and is connected to the positive homonymous terminal of the drive winding; a source electrode of the auxiliary MOS pipe is connected to the negative homonymous terminal of the drive winding; a source electrode of the other one (S2) of the pair of synchronous rectification MOS pipes is connected to the tap of the drive winding.

Description

A synchronous rectification circuit

The invention relates to a synchronous rectification circuit, in particular to a synchronous rectification circuit of a charge self-sustaining drive circuit.

Synchronous rectification technology has been widely used in low-voltage, high-current DC-to-DC converters. Since the turn-on voltage drop of the low-voltage power MOSFET tube (hereinafter referred to as the MOS tube) is much smaller than the forward voltage drop of the diode, the efficiency of the converter can be greatly improved by using the synchronous rectification technology. Since the MOS tube has no reverse blocking ability, a control signal must be added to its gate to control its on-off. In the commonly used forward DC-to-DC converter, for the sake of simplicity, the secondary winding of the transformer is generally used to directly drive the MOS tube. At this time, when the duty cycle is relatively small, there will be a problem of insufficient conduction of the freewheeling synchronous MOS transistor. In this case, the load current will flow through the body diode of the MOS transistor, causing a large loss. In order to solve this problem, International Rectifier (IR) developed a dedicated chip, using a phase-locked loop method to generate a driving signal with a delay on the secondary side to solve this problem, and applied for a US patent in 1998 ( US6026005). However, because this technology needs to use a dedicated chip and requires certain peripheral circuits, the application of this method is limited. Recently, XIE Xuefei of the University of Hong Kong and others proposed a method for synchronous rectification MOS transistor gate charge self-sustainment and secondary current drive. Since the current driving method of the secondary side needs to use a current transformer, it is not suitable for a miniaturized power supply, and it will bring additional loss in the case of a large current output. The circuit of the gate charge self-sustaining method is relatively simple, but it has certain shortcomings in the driving effect. Since the present invention is related to the above method, the gate charge self-sustaining circuit proposed by the University of Hong Kong will be described in more detail below.

Figure 1 is the basic principle of the charge self-sustaining circuit proposed by the University of Hong Kong. FIG. 1A is a schematic circuit diagram of the self-sustaining circuit. In the figure, the capacitor C is the gate parasitic capacitance of the synchronous rectification MOS tube, the switch Sa is an auxiliary MOS tube or transistor, and V1 is the driving signal. Figure 1B is its working waveform diagram, as shown in the figure, before the time t0, the switch Sa is disconnected, the initial voltage of the capacitor C is zero, the input signal V1 is positive at the time t0, and the forward current charges the capacitor C through the diode D1 , and reach the amplitude of V1; at the time t1, the input signal V1 becomes zero, and the diode D1 is reverse-biased and cut off. The charge stored on capacitor C will maintain the voltage of V2 constant. At t2, the switch Sa starts to conduct, the charge on the capacitor C is discharged through the switch Sa, and the voltage of V2 drops to zero. It can be seen from the waveform in FIG. 1B that even though the driving signal V1 has disappeared from time t1 to t2 , the synchronous rectification MOS transistor can still maintain conduction.

Figure 2A and Figure 2B are the specific circuit and working waveform diagrams of the forward DC-to-DC converter with the charge self-sustaining circuit proposed by the University of Hong Kong, respectively. In Figure 2, S is the main switch of the forward converter, S1 and S2 are synchronous rectification MOS transistors, Sa is an auxiliary MOS transistor, which is used together with diode D1 to realize the charge self-sustaining function of synchronous rectification MOS transistor S2 gate drive. As shown in Figure 2B, the specific working process is as follows:

From t0 to t1, the main switch S is turned on, and the secondary voltage is positively applied to the synchronous rectification MOS transistor S1 and the auxiliary MOS transistor Sa to make them conduct, and the auxiliary MOS transistor Sa is turned on to short-circuit the gate of the synchronous rectification MOS transistor S2 , the MOS transistor S2 is cut off, and the output current flows through the MOS transistor S1.

At time t1, the main switch S is turned off, and the excitation current flows to the magnetic reset circuit MR. The synchronous rectification MOS transistor S1 and the auxiliary MOS transistor Sa are cut off due to the reverse bias of the gate, and the secondary voltage of the transformer T reversely charges the gate of the MOS transistor S2 through the diode D1 to make it conduct, so that the output current is diverted from the MOS transistor S1 MOS tube S2 circulates.

At time t2, the reset process of the transformer T ends, the secondary side voltage becomes zero, and the auxiliary MOS transistor Sa is still in the cut-off state. Since the diode D1 is reverse-biased, the gate charge of the MOS transistor S2 remains unchanged, and the MOS transistor S2 continues to be turned on.

At time t0', the voltage on the secondary side of the transformer T becomes positive, the auxiliary MOS transistor Sa is turned on to discharge the gate capacitance of the MOS transistor S2, and the MOS transistor S2 is turned off, and the MOS transistor S1 is turned on due to the forward voltage of the secondary side, and the new The switching cycle starts and the above process is repeated.

The main problem of the above circuit lies in the turn-off process of the synchronous rectification MOS transistor S2. When the voltage on the secondary side of the transformer T is positive and negative, the MOS transistor S1 and the auxiliary MOS transistor Sa are turned on at the same time, and the turn-off of the MOS transistor S2 has to wait until the gate voltage of the auxiliary MOS transistor Sa is discharged below the turn-on threshold voltage, that is The turn-off of the MOS transistor S2 lags behind the turn-on of the MOS transistor S1, and the MOS transistors S1 and S2 have a common conduction time, resulting in an increase in conduction loss. In addition, when the MOS transistor S2 is turned off, the gate goes to zero potential through the auxiliary MOS transistor Sa, and the gate conduction voltage of the synchronous rectification MOS transistor is generally relatively low (2-3V), so it is easily affected by external interference, and it will also cause common state conduction. common problem.

Therefore, the object of the present invention is to provide a synchronous rectification circuit with a charge self-sustaining circuit, which can overcome the above-mentioned shortcoming that the synchronous rectifiers are turned on at the same time, and has a simpler circuit structure.

According to the above-mentioned purpose of the present invention, the synchronous rectification circuit provided by the present invention includes:

A transformer consisting of a primary winding and a secondary winding is used to transform the input voltage;

A pair of synchronous rectification MOS tubes are used to rectify the output of the transformer;

Wherein, the source of one synchronous rectification MOS transistor (S1) is connected to the source of another synchronous rectification MOS transistor (S2); the drain of another synchronous rectification MOS transistor (S2) is connected to the transformer The secondary winding is connected;

It is characterized in that it also includes an auxiliary MOS transistor, the gate of the auxiliary MOS transistor is connected to the gate of the synchronous rectification MOS transistor (S1) of one of the pair of synchronous rectification MOS transistors, and is connected to the secondary side The positive terminal of the winding, the source of the auxiliary MOS transistor is connected to the drain of the synchronous rectification MOS transistor (S1) of one of the pair of synchronous rectification MOS transistors, and is connected to the negative terminal of the secondary winding , the drain of the auxiliary MOS transistor is connected to the gate of the other synchronous rectification MOS transistor (S2) of the pair of synchronous rectification MOS transistors.

In another embodiment provided by the present invention, the synchronous rectification circuit of the present invention includes:

A transformer composed of a primary winding, a secondary winding, and a driving winding is used to transform the input voltage. The positive terminal of the driving winding has the same polarity as the positive terminal of the primary winding, and has a tap;

A pair of synchronous rectification MOS tubes are used to rectify the output of the transformer;

Wherein, the gate of one synchronous rectification MOS transistor (S1) is connected to the positive terminal of the drive winding; the drain of one synchronous rectification MOS transistor (S1) is connected to the negative terminal of the secondary winding; The drain of another synchronous rectification MOS transistor (S2) is connected to the positive terminal of the secondary winding; the source of another synchronous rectification MOS transistor (S2) is connected to the middle tap of the drive winding;

It is characterized in that the synchronous rectification circuit also includes an auxiliary MOS transistor, the gate of the auxiliary MOS transistor is connected to the gate of the synchronous rectification MOS transistor (S1) of one of the pair of synchronous rectification MOS transistors, and connected to To the positive terminal of the drive winding, the source of the auxiliary MOS transistor is connected to the drain of the synchronous rectification MOS transistor (S1) of one of the pair of synchronous rectification MOS transistors, and connected to the drive winding Negative terminal of the same name, the drain of the auxiliary MOS transistor is connected to the gate of the other synchronous rectification MOS transistor (S2) of the pair of synchronous rectification MOS transistors.

Other objects, effects and advantages of the present invention will become more apparent through the following description of the preferred embodiments, in the accompanying drawings:

Figure 1 is the basic principle of the charge self-sustaining circuit proposed by the University of Hong Kong, wherein Figure 1A is a schematic circuit diagram of the self-sustaining circuit, and Figure 1B is its working waveform;

Fig. 2A and Fig. 2B are respectively the specific circuit and working waveform diagram of the forward DC-to-DC converter with the charge self-sustaining circuit proposed by the University of Hong Kong;

Fig. 3 shows the basic principle of the charge self-sustaining circuit contained in the synchronous rectification circuit of the present invention; wherein Fig. 3A is a circuit schematic diagram of the charge self-sustaining circuit, and Fig. 3B is its working waveform diagram;

Fig. 4 has shown the circuit diagram that comprises the forward converter of synchronous rectification circuit of the present invention, wherein, Fig. 4A is the circuit structural diagram of the forward converter that comprises synchronous rectification circuit of the present invention; Fig. 4B is the circuit diagram of the present invention Working waveform diagram of synchronous rectification circuit;

Fig. 5 shows the circuit diagram that comprises the forward converter of another embodiment of the synchronous rectification circuit of the present invention;

Fig. 6 shows a special case of the synchronous rectification circuit of the present invention;

Figure 7 shows an improvement on the special case shown in Figure 6;

8 to 10 show the circuit structure of the dual-transistor forward converter with the synchronous rectification circuit of the present invention.

FIG. 3 shows the basic principle of the charge self-sustaining circuit included in the synchronous rectification circuit of the present invention. 3A is a schematic circuit diagram of the charge self-sustaining circuit, and FIG. 3B is a working waveform diagram thereof. Before the time t0, the switch Sa is turned off, and the initial voltage of the capacitor C is the low level value of V1; at the time t0, the input signal V1 becomes high level, and the forward current charges the capacitor C through the diode D1, and reaches the value of V1 High-level amplitude; at time t1, the input signal V1 becomes low-level, and the diode D1 is reverse-biased and cut off. The charge stored on capacitor C will maintain the voltage of V2 constant. At time t2, the switch Sa is turned on, the charge on the capacitor C is discharged through the switch Sa, and the voltage of V2 drops to the low level value of V1. If the capacitor C is the parasitic capacitance of the gate of the synchronous rectification MOS transistor, Sa is an auxiliary MOS tube or transistor, and V1 is the driving signal, it can be seen from the waveform of Figure 3B that although the driving signal has disappeared from time t1 to t2, the synchronous rectification The MOS tube can still maintain conduction. If the low level of V1 is a negative value, the turn-off process of the synchronous MOS tube can be accelerated. Reduce or avoid common-state turn-on problems.

An embodiment of the synchronous rectification circuit of the present invention is described below with reference to FIG. 4 . To facilitate description of its working principle, FIG. 4 shows a circuit diagram of a forward converter including a synchronous rectification circuit of the present invention. In FIG. 4, FIG. 4A is a circuit structure diagram of a forward converter including the synchronous rectification circuit of the present invention; FIG. 4B is a working waveform diagram of the synchronous rectification circuit of the present invention.

As shown in FIG. 4A , the transformer T is composed of a primary winding Tin, a secondary winding Tout and a driving winding Tdrout, and the driving winding Tdrout has a tap. The positive terminal of the primary winding Tin is connected to the positive pole of the power supply, and the positive terminal of the secondary winding Tout and the drive winding Tdrout have the same polarity as the positive terminal of the primary winding Tin. S1 and S2 are synchronous rectification MOS transistors. The sources (s poles) of the rectification MOS transistors S1 and S2 are connected to each other and to the tap of the drive winding Tdrout. The drain (d pole) of the rectification MOS transistor S1 is connected to the secondary winding Tout The negative end of the rectifier MOS transistor S1 (g pole) is connected to the positive end of the drive winding Tdrout, the drain (d pole) of the rectifier MOS transistor S2 is connected to the positive end of the secondary winding Tout, and the rectification The gate (g pole) of the MOS transistor S2 is connected to the drain (d pole) of the auxiliary MOS transistor Sa, the source (s pole) of the auxiliary MOS transistor Sa is connected to the negative terminal of the drive winding Tdrout, and the auxiliary MOS transistor Sa The gate (d pole) is connected to the positive terminal of the drive winding Tdrout. The working process of the drive circuit is as follows:

From t0 to t1, the main switch S is turned on, and the voltage of the drive winding Tdrout is positively applied to the gates of the rectifier MOS transistor S1 and the auxiliary MOS transistor Sa to turn them on, and the auxiliary MOS transistor Sa is turned on to make the rectifier MOS transistor S2 The gate of the drive winding Tdrout is connected to the negative terminal of the same name, and the reverse voltage is applied to the gate of the rectifier MOS transistor S2, the rectifier MOS transistor S2 is in the cut-off state, and the output current flows through the rectifier MOS transistor S1.

At time t1, the main switch S is turned off, and the excitation current flows to the magnetic reset circuit MR. The gate voltages of the rectifier MOS transistor S1 and the auxiliary MOS transistor Sa are reversed, and the rectifier MOS transistor S1 and the auxiliary MOS transistor Sa are cut off. The negative terminal of the drive winding Tdrout becomes a positive voltage, and charges the gate of the rectifier MOS transistor S2 through the body diode of the auxiliary MOS transistor Sa to make it conductive, so that the rectifier MOS transistor S2 is turned on, and the output current is diverted from the rectifier MOS transistor S1 Rectifier MOS tube S2.

At time t2, the reset process of the transformer T ends, and the voltage of the drive winding Tdrout becomes zero. Since the auxiliary MOS transistor Sa is cut off, and the body diode of the auxiliary MOS transistor Sa is reverse-biased, there is no discharge circuit for the gate charge of the rectifier MOS transistor S2, and the voltage remains stable. change, the rectifier MOS tube S2 continues to conduct.

At time t0', the main switch S is turned on, and the voltage of the drive winding Tdrout is positively applied to the rectifier MOS transistor S1 and the auxiliary MOS transistor Sa to make them turn on, and the auxiliary MOS transistor Sa is turned on so that the negative voltage of the drive winding Tdrout is applied When the gate of the rectifier MOS transistor S2 is turned off, a new switching cycle begins, and the above process is repeated.

Since a negative voltage is applied to the gate of the rectifier MOS transistor S2, the turn-off process of the rectifier MOS transistor S2 is accelerated, thereby reducing the common-state conduction time of the rectifier MOS transistors S1 and S2. Also, because the negative voltage is added to the gate of the rectifier MOS transistor S2, the anti-interference ability of the rectifier MOS transistor S2 is increased, making the driving circuit more stable and reliable.

Since there is always a certain delay in turning off the synchronous rectification MOS transistor S2, there may be a certain common-state conduction time of the rectification MOS transistors S1 and S2. In order to avoid the additional loss caused by the common state conduction of the rectifier MOS transistors S1 and S2, in another embodiment of the present invention, a saturated inductor Ls can be connected in series on the secondary winding Tout of the transformer T to limit the common state The current peak caused by the conduction reduces the conduction loss. The specific circuit structure is shown in Figure 5.

Fig. 6 shows a special example of the synchronous rectification circuit of the present invention. When the voltage of the secondary winding Tout of the transformer T in the synchronous rectification circuit shown in FIG. 4 is relatively close to the driving circuit of the MOS transistor, the output of the secondary winding Tout can be directly used to drive the synchronous rectifying MOS transistors S1 and S2. This saves the drive winding Tdrout. Among them, the gate (g pole) of the rectifier MOS transistor S1 and the auxiliary MOS transistor Sa is connected to the positive terminal of the secondary winding Tout, and the source (s pole) of the auxiliary MOS transistor Sa is connected to the negative terminal of the secondary winding Tout , and other connections remain unchanged. Its working process is basically similar to the circuit in Figure 4.

In the same way as above, in the special case shown in Figure 6, a saturated inductor Ls can also be connected in series with the secondary winding Tout of the transformer T to limit the current peak caused by the common state conduction, as shown in Figure 7 .

The embodiments shown in FIGS. 4 to 7 take a single-transistor forward converter as an example to describe the synchronous rectification circuit of the present invention. Likewise, the synchronous rectification circuit of the present invention can also be applied to a dual-transistor forward converter. Figures 8 to 10 show the circuit structure of the dual-transistor forward converter with the synchronous rectification circuit of the present invention, wherein Figures 8 to 10 correspond to Figures 4, 5 and 7 respectively.

Various preferred embodiments of the present invention have been described in detail above, but it should be understood that the above does not limit the scope of the present invention. Various changes can be made by those skilled in the art without departing from the spirit of the invention. Accordingly, the scope of the invention should be determined by the appended claims.

Claims (4)

1. A synchronous rectification circuit, comprising: A transformer consisting of a primary winding and a secondary winding is used to transform the input voltage; A pair of synchronous rectification MOS tubes are used to rectify the output of the transformer; Wherein, the source of one synchronous rectification MOS transistor (S1) is connected to the source of another synchronous rectification MOS transistor (S2); the drain of another synchronous rectification MOS transistor (S2) is connected to the transformer The secondary winding is connected; It is characterized in that it also includes an auxiliary MOS transistor, the gate of the auxiliary MOS transistor is connected to the gate of the synchronous rectification MOS transistor (S1) of one of the pair of synchronous rectification MOS transistors, and is connected to the secondary side The positive terminal of the winding, the source of the auxiliary MOS transistor is connected to the drain of the synchronous rectification MOS transistor (S1) of one of the pair of synchronous rectification MOS transistors, and is connected to the negative terminal of the secondary winding , the drain of the auxiliary MOS transistor is connected to the gate of the other synchronous rectification MOS transistor (S2) of the pair of synchronous rectification MOS transistors. 2. The synchronous rectification circuit according to claim 1, wherein a saturated inductor is connected in series with the secondary winding. 3. A synchronous rectification circuit, comprising: A transformer composed of a primary winding, a secondary winding, and a drive winding is used to transform the input voltage, the positive terminal of the drive winding has the same polarity as the positive terminal of the primary winding, and has a tap; A pair of synchronous rectification MOS tubes are used to rectify the output of the transformer; Wherein, the gate of one synchronous rectification MOS transistor (S1) is connected to the positive terminal of the drive winding; the drain of one synchronous rectification MOS transistor (S1) is connected to the negative terminal of the secondary winding; The drain of another synchronous rectification MOS transistor (S2) is connected to the positive terminal of the secondary winding; the source of another synchronous rectification MOS transistor (S2) is connected to the middle tap of the drive winding; It is characterized in that the synchronous rectification circuit also includes an auxiliary MOS transistor, the gate of the auxiliary MOS transistor is connected to the gate of the synchronous rectification MOS transistor (S1) of one of the pair of synchronous rectification MOS transistors, and connected to To the positive terminal of the drive winding, the source of the auxiliary MOS transistor is connected to the drain of the synchronous rectification MOS transistor (S1) of one of the pair of synchronous rectification MOS transistors, and connected to the drive winding Negative terminal of the same name, the drain of the auxiliary MOS transistor is connected to the gate of the other synchronous rectification MOS transistor (S2) of the pair of synchronous rectification MOS transistors. 4. The synchronous rectification circuit according to claim 3, wherein a saturated inductor is connected in series with the secondary winding.

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