CN114899233A - Mg diffusion enhanced GaN-based HEMT device and preparation method and application thereof - Google Patents

Mg diffusion enhanced GaN-based HEMT device and preparation method and application thereof Download PDF

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CN114899233A
CN114899233A CN202210461239.3A CN202210461239A CN114899233A CN 114899233 A CN114899233 A CN 114899233A CN 202210461239 A CN202210461239 A CN 202210461239A CN 114899233 A CN114899233 A CN 114899233A
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metal electrode
gan
diffusion
hemt device
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李国强
邢志恒
吴能滔
李善杰
罗玲
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South China University of Technology SCUT
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/40—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels
    • H10D30/47—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having two-dimensional [2D] charge carrier gas channels, e.g. nanoribbon FETs or high electron mobility transistors [HEMT]
    • H10D30/471—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT]
    • H10D30/475—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT] having wider bandgap layer formed on top of lower bandgap active layer, e.g. undoped barrier HEMTs such as i-AlGaN/GaN HEMTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/015—Manufacture or treatment of FETs having heterojunction interface channels or heterojunction gate electrodes, e.g. HEMT
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/81—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials of structures exhibiting quantum-confinement effects, e.g. single quantum wells; of structures having periodic or quasi-periodic potential variation
    • H10D62/815—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials of structures exhibiting quantum-confinement effects, e.g. single quantum wells; of structures having periodic or quasi-periodic potential variation of structures having periodic or quasi-periodic potential variation, e.g. superlattices or multiple quantum wells [MQW]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/81—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials of structures exhibiting quantum-confinement effects, e.g. single quantum wells; of structures having periodic or quasi-periodic potential variation
    • H10D62/815—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials of structures exhibiting quantum-confinement effects, e.g. single quantum wells; of structures having periodic or quasi-periodic potential variation of structures having periodic or quasi-periodic potential variation, e.g. superlattices or multiple quantum wells [MQW]
    • H10D62/8161—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials of structures exhibiting quantum-confinement effects, e.g. single quantum wells; of structures having periodic or quasi-periodic potential variation of structures having periodic or quasi-periodic potential variation, e.g. superlattices or multiple quantum wells [MQW] potential variation due to variations in composition or crystallinity, e.g. heterojunction superlattices

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Abstract

The invention discloses an Mg diffusion enhanced GaN-based HEMT device and a preparation method and application thereof. The Mg diffusion enhancement type GaN-based HEMT device comprises a substrate, a GaN channel layer, a superlattice structure layer, a P-type Mg ion diffusion barrier layer, and SiO 2 A gate insulating layer, a source metal electrode, a drain metal electrode and a gate metal electrode, wherein the superlattice structure layer is composed of at least 2 Al x Ga 1‑x N layer and at least 2 Al y Ga 1‑y N layers alternately laminated, 0<x≤0.1，0.1≤y<1, and x ≠ y. The Mg diffusion enhancement type GaN-based HEMT device has the advantages of strong grid control capability, high threshold voltage, small grid leakage and the like, is low in Mg ion doping difficulty, and is suitable for large-scale industrial application.

Description

Mg diffusion enhanced GaN-based HEMT device and preparation method and application thereof
Technical Field
The invention relates to the technical field of semiconductor devices, in particular to an Mg diffusion enhanced GaN-based HEMT device and a preparation method and application thereof.
Background
The GaN-based High Electron Mobility Transistor (HEMT) prepared from the GaN-based high electron mobility transistor has excellent high frequency, voltage resistance, high temperature resistance and stability, and is widely applied to the fields of radio frequency microwave, power switches and the like.
The traditional depletion type GaN-based HEMT device can not realize the circuit false-start prevention protection function in the application of radio frequency and power circuits, so that an enhanced GaN-based HEMT device needs to be developed to simplify the circuit design and improve the circuit safety. Currently, the enhancement technology of the commercial GaN-based HEMT device is a p-type gate technology, and p-type gate enhancement is realized by growing p-type nitride between a gate and a barrier layer to raise the conduction band bottom of a heterojunction above the fermi level and exhaust a 2DEG area under the gate. The p-type gate enhancement device does not need to carry out an additional processing process on the gate, does not have the problem of gate instability, has high reliability and becomes the first choice for commercialization of the GaN power device. However, the p-type gate enhancement device still faces the problems of etching damage, high p-type doping difficulty, weak gate control capability, low threshold voltage, large gate leakage and the like, and further popularization and application of the enhancement device are restricted.
Therefore, it is of great significance to develop an enhancement mode GaN-based HEMT device with strong gate control capability, high threshold voltage and small gate leakage.
Disclosure of Invention
The invention aims to provide an Mg diffusion enhancement type GaN-based HEMT device and a preparation method and application thereof.
The technical scheme adopted by the invention is as follows:
a Mg diffusion enhancement type GaN-based HEMT device comprises a substrate, a GaN channel layer, a superlattice structure layer, a P-type Mg ion diffusion barrier layer, and SiO 2 A gate insulating layer, a source metal electrode, a drain metal electrode and a gate metal electrode; the substrate, the GaN channel layer and the superlattice structure layer are sequentially stacked; the superlattice structure layer is composed of at least 2 Al x Ga 1-x N layer and at least 2 Al y Ga 1-y N layers are alternately stacked to form 0<x≤0.1，0.1≤y<1, and x is not equal to y; the P-type Mg ion diffusion barrier layer is completely embedded into the superlattice structure layer; the SiO 2 The gate insulating layer is attached to the P-type Mg ion diffusion barrier layer; the source metal electrode and the drain metal electrode are arranged on the surface of the superlattice structure layer far away from the GaN channel layer; the gate metal electrode is arranged on SiO 2 The side of the gate insulating layer away from the P-type Mg ion diffusion barrier layer.
Preferably, the substrate is one of a SiC substrate and a Si substrate.
Preferably, the thickness of the GaN channel layer is 0.1 to 5 μm.
Preferably, the thickness of the superlattice structure layer is 20nm to 30 nm.
Preferably, the Al is x Ga 1-x The thickness of the N layer is 3 nm-6 nm.
Preferably, the Al is y Ga 1-y The thickness of the N layer is 3 nm-6 nm.
Preferably, the thickness of the P-type Mg ion diffusion barrier layer is 5nm to 25nm, and the diffusion concentration of Mg ions is 1.0 x 10 18 cm -3 ～1.0×10 21 cm -3 。
Preferably, the SiO 2 The thickness of the gate insulating layer is 20nm to 100 nm.
Preferably, the source metal electrode is composed of four metal layers of Ti, Al, Ni and Au.
Preferably, the leakage metal electrode is composed of four metal layers of Ti, Al, Ni and Au.
Preferably, the gate metal electrode is composed of two metal layers of Ni and Au.
The preparation method of the Mg diffusion enhancement type GaN-based HEMT device comprises the following steps:
1) sequentially epitaxially growing a GaN channel layer and a superlattice structure layer on a substrate;
2) photoetching is carried out to enable the superlattice structure layer to expose a gate metal electrode area, grooves are etched, Mg ion diffusion is carried out, stripping and annealing are carried out, and a P-type Mg ion diffusion barrier layer is formed;
3) SiO is carried out 2 Deposited in P typeSiO is formed on the surface of the Mg ion diffusion barrier layer 2 A gate insulating layer;
4) performing vapor deposition and stripping on SiO 2 Forming a gate metal electrode on the gate insulating layer;
5) and photoetching is carried out, so that the source metal electrode region and the drain metal electrode region are exposed on the superlattice structure layer, evaporation and stripping are carried out, and the source metal electrode and the drain metal electrode are formed, so that the Mg diffusion enhanced GaN-based HEMT device is obtained.
Preferably, the epitaxial growth in step 1) adopts an organic metal chemical vapor deposition method, and the growth temperature is 850-1200 ℃.
Preferably, the etching in step 2) is ICP dry etching.
Preferably, the annealing in the step 2) is carried out at the temperature of 300-800 ℃, and the annealing time is 30-120 s.
An electronic device is composed of the above GaN-based HEMT device.
The invention has the beneficial effects that: the Mg diffusion enhancement type GaN-based HEMT device has the advantages of strong grid control capability, high threshold voltage, small grid leakage and the like, is low in Mg ion doping difficulty, and is suitable for large-scale industrial application.
Specifically, the method comprises the following steps:
1) the Mg diffusion enhanced GaN-based HEMT device contains Al x Ga 1-x N layer and Al y Ga 1-y The superlattice structure layer (i.e. alternating Al component superlattice barrier layer) formed by alternately laminating N layers can play a microstrip effect, and multiple layers of interfaces can reduce the activation energy of an acceptor and then carry out Mg ion diffusion, so that the material repair can be realized while the hole concentration is improved, and the defect density can be reduced;
2) according to the invention, surface defects are introduced by etching the superlattice structure layer, so that the diffusion efficiency of Mg ions under the gate can be increased, the diffusion area of the Mg ions under the gate can be accurate, and the successful preparation of an enhancement device is finally ensured;
3) the invention combines the annealing process with SiO 2 The gate insulating layer is combined to suppress gate leakage current from the material side.
Drawings
Fig. 1 is a schematic structural view of the Mg diffusion-enhanced GaN-based HEMT device of example 1.
The attached drawings indicate the following: 10. a Si substrate; 20. a GaN channel layer; 30. a superlattice structure layer; 301. al (Al) 0.05 Ga 0.95 N layers; 302. al (Al) 0.15 Ga 0.85 N layers; 40. a P-type Mg ion diffusion barrier layer; 50. SiO 2 2 A gate insulating layer; 60. a source metal electrode; 70. a drain metal electrode; 80. and a gate metal electrode.
Detailed Description
The invention will be further explained and illustrated with reference to specific examples.
Example 1:
an Mg diffusion enhanced GaN-based HEMT device (the structure diagram is shown in figure 1) comprises a Si substrate 10, a GaN channel layer 20, a superlattice structure layer 30, a P-type Mg ion diffusion barrier layer 40, and SiO 2 A gate insulating layer 50, a source metal electrode 60, a drain metal electrode 70, and a gate metal electrode 80; the Si substrate 10, the GaN channel layer 20 and the superlattice structure layer 30 are sequentially stacked; the superlattice structure layer 30 is composed of 2 Al 0.05 Ga 0.95 N layer 301 and 2 Al 0.15 Ga 0.85 N layers 302 are alternately stacked; the P-type Mg ion diffusion barrier layer 40 is completely embedded in the superlattice structure layer 30; SiO 2 2 The gate insulating layer 50 is attached to the P-type Mg ion diffusion barrier layer 40; the source metal electrode 60 and the drain metal electrode 70 are disposed on the side of the superlattice structure layer 30 away from the GaN channel layer 20; the gate metal electrode 80 is disposed on SiO 2 The gate insulating layer 50 is away from the side of the P-type Mg ion diffusion barrier layer 40.
The preparation method of the Mg diffusion enhancement type GaN-based HEMT device comprises the following steps:
1) sequentially epitaxially growing a GaN channel layer with the thickness of 0.4 mu m and a superlattice structure layer with the thickness of 12nm on a Si substrate by adopting an MOCVD method, and Al 0.05 Ga 0.95 The thickness of the N layer was 3nm, Al 0.15 Ga 0.85 The thickness of the N layer is 3nm, and the growth temperature is 850 ℃;
2) photoetching to expose the gate metal electrode region on the superlattice structure layer, and performing ICP dry methodEtching to form grooves, and performing Mg ion diffusion with diffusion thickness of 10nm and diffusion concentration of 1.0 × 10 18 cm -3 ～1.0×10 21 cm -3 Then stripping is carried out, and the substrate is placed in a vacuum degree of 1.0X 10 -3 Annealing at 600 ℃ for 120s in the annealing furnace with Pa to form a P-type Mg ion diffusion barrier layer;
3) SiO is carried out 2 Depositing to form SiO with thickness of 20nm on the surface of the P-type Mg ion diffusion barrier layer 2 A gate insulating layer;
4) performing vapor deposition and stripping on SiO 2 Forming a gate metal electrode consisting of two metal layers of Ni and Au on the gate insulating layer;
5) and photoetching is carried out, so that the source metal electrode area and the drain metal electrode area are exposed on the superlattice structure layer, evaporation and stripping are carried out, and a source metal electrode and a drain metal electrode which are composed of four metal layers of Ti, Al, Ni and Au are formed, so that the Mg diffusion enhanced GaN-based HEMT device is obtained.
Example 2:
an Mg diffusion-enhanced GaN-based HEMT device (the structure is the same as that of embodiment 1) comprises a Si substrate 10, a GaN channel layer 20, a superlattice structure layer 30, a P-type Mg ion diffusion barrier layer 40, and SiO 2 A gate insulating layer 50, a source metal electrode 60, a drain metal electrode 70, and a gate metal electrode 80; the Si substrate 10, the GaN channel layer 20 and the superlattice structure layer 30 are sequentially stacked; the superlattice structure layer 30 is composed of 3 Al 0.1 Ga 0.9 N layer 301 and 3 Al 0.2 Ga 0.8 N layers 302 are alternately stacked; the P-type Mg ion diffusion barrier layer 40 is completely embedded in the superlattice structure layer 30; SiO 2 2 The gate insulating layer 50 is attached to the P-type Mg ion diffusion barrier layer 40; the source metal electrode 60 and the drain metal electrode 70 are disposed on the side of the superlattice structure layer 30 away from the GaN channel layer 20; the gate metal electrode 80 is disposed on SiO 2 The gate insulating layer 50 is away from the side of the P-type Mg ion diffusion barrier layer 40.
The preparation method of the Mg diffusion enhancement type GaN-based HEMT device comprises the following steps:
1) sequentially epitaxially growing a GaN channel layer with a thickness of 0.5 μm and a GaN channel layer with a thickness of 21nm on a Si substrate by MOCVD methodSuperlattice structure layer of Al 0.1 Ga 0.9 The thickness of the N layer is 3nm, and Al 0.2 Ga 0.8 The thickness of the N layer is 4nm, and the growth temperature is 950 ℃;
2) photoetching is carried out to expose a gate metal electrode region on the superlattice structure layer, grooves are etched by an ICP dry method, and then Mg ions are diffused, wherein the diffusion thickness of the Mg ions is controlled to be 15nm, and the diffusion concentration of the Mg ions is controlled to be 1.0 multiplied by 10 18 cm -3 ～1.0×10 21 cm -3 Then stripping is carried out, and the substrate is placed in a vacuum degree of 1.0X 10 -3 Annealing at 700 ℃ for 90s in a Pa annealing furnace to form a P-type Mg ion diffusion barrier layer;
3) SiO is carried out 2 Depositing to form SiO 50nm thick on the surface of the P-type Mg ion diffusion barrier layer 2 A gate insulating layer;
4) performing vapor deposition and stripping on SiO 2 Forming a gate metal electrode consisting of two metal layers of Ni and Au on the gate insulating layer;
5) and photoetching is carried out, so that the source metal electrode area and the drain metal electrode area are exposed on the superlattice structure layer, evaporation and stripping are carried out, and a source metal electrode and a drain metal electrode which are composed of four metal layers of Ti, Al, Ni and Au are formed, so that the Mg diffusion enhanced GaN-based HEMT device is obtained.
Example 3:
an Mg diffusion-enhanced GaN-based HEMT device (the structure is the same as that of embodiment 1) comprises a Si substrate 10, a GaN channel layer 20, a superlattice structure layer 30, a P-type Mg ion diffusion barrier layer 40, and SiO 2 A gate insulating layer 50, a source metal electrode 60, a drain metal electrode 70, and a gate metal electrode 80; the Si substrate 10, the GaN channel layer 20 and the superlattice structure layer 30 are sequentially stacked; the superlattice structure layer 30 is composed of 5 Al 0.05 Ga 0.95 N layer 301 and 5 Al 0.1 Ga 0.9 N layers 302 are alternately stacked; the P-type Mg ion diffusion barrier layer 40 is completely embedded in the superlattice structure layer 30; SiO 2 2 The gate insulating layer 50 is attached to the P-type Mg ion diffusion barrier layer 40; the source metal electrode 60 and the drain metal electrode 70 are disposed on the side of the superlattice structure layer 30 away from the GaN channel layer 20; the gate metal electrode 80 is disposed on SiO 2 The gate insulating layer 50 is away from the P-type MgThe side of the ion diffusion barrier layer 40.
The preparation method of the Mg diffusion enhancement type GaN-based HEMT device comprises the following steps:
1) sequentially epitaxially growing a GaN channel layer with the thickness of 0.2 mu m and a superlattice structure layer with the thickness of 30nm on a Si substrate by adopting an MOCVD method, and Al 0.05 Ga 0.95 The thickness of the N layer is 3nm, and Al 0.1 Ga 0.9 The thickness of the N layer is 3nm, and the growth temperature is 1000 ℃;
2) photoetching to expose the gate metal electrode region on the superlattice structure layer, etching via ICP dry method to form groove, and diffusing Mg ions with diffusion thickness of 20nm and diffusion concentration of 1.0 × 10 18 cm -3 ～1.0×10 21 cm -3 Then stripping is carried out, and the substrate is placed in a vacuum degree of 3.0 x 10 -3 Annealing at 800 ℃ for 30s in a Pa annealing furnace to form a P-type Mg ion diffusion barrier layer;
3) SiO is carried out 2 Depositing to form SiO with a thickness of 100nm on the surface of the P-type Mg ion diffusion barrier layer 2 A gate insulating layer;
4) performing vapor deposition and stripping on SiO 2 Forming a gate metal electrode consisting of two metal layers of Ni and Au on the gate insulating layer;
5) and photoetching is carried out, so that the source metal electrode area and the drain metal electrode area are exposed on the superlattice structure layer, evaporation and stripping are carried out, and a source metal electrode and a drain metal electrode which are composed of four metal layers of Ti, Al, Ni and Au are formed, so that the Mg diffusion enhanced GaN-based HEMT device is obtained.
The above embodiments are preferred embodiments of the present invention, but the present invention is not limited to the above embodiments, and any other changes, modifications, substitutions, combinations, and simplifications which do not depart from the spirit and principle of the present invention should be construed as equivalents thereof, and all such modifications are intended to be included in the scope of the present invention.

Claims (10)

1. The Mg diffusion enhancement type GaN-based HEMT device is characterized by comprising a substrate, a GaN channel layer, a superlattice structure layer and a P-type Mg ionSub-diffusion barrier layer, SiO 2 A gate insulating layer, a source metal electrode, a drain metal electrode and a gate metal electrode; the substrate, the GaN channel layer and the superlattice structure layer are sequentially stacked; the superlattice structure layer is composed of at least 2 Al x Ga 1-x N layer and at least 2 Al y Ga 1-y N layers alternately laminated, 0<x≤0.1，0.1≤y<1, and x ≠ y; the P-type Mg ion diffusion barrier layer is completely embedded into the superlattice structure layer; the SiO 2 The gate insulating layer is attached to the P-type Mg ion diffusion barrier layer; the source metal electrode and the drain metal electrode are arranged on the surface of the superlattice structure layer far away from the GaN channel layer; the gate metal electrode is arranged on SiO 2 The side of the gate insulating layer away from the P-type Mg ion diffusion barrier layer.
2. The Mg diffusion-enhanced GaN-based HEMT device of claim 1, wherein: the substrate is one of a SiC substrate and a Si substrate.
3. The Mg diffusion-enhanced GaN-based HEMT device of claim 1, wherein: the thickness of the GaN channel layer is 0.1-5 microns.
4. The Mg diffusion enhancement type GaN-based HEMT device according to any one of claims 1 to 3, wherein: the thickness of the superlattice structure layer is 20 nm-30 nm.
5. The Mg diffusion enhanced GaN-based HEMT device according to claim 4, wherein: the Al is x Ga 1-x The thickness of the N layer is 3 nm-6 nm; the Al is y Ga 1-y The thickness of the N layer is 3 nm-6 nm.
6. The Mg diffusion enhancement type GaN-based HEMT device according to any one of claims 1 to 3, wherein: the thickness of the P-type Mg ion diffusion barrier layer is 5 nm-25 nm, and the diffusion concentration of Mg ions is 1.0 multiplied by 10 18 cm -3 ～1.0×10 21 cm -3 。
7. The Mg diffusion enhancement type GaN-based HEMT device according to any one of claims 1 to 3, wherein: the SiO 2 The thickness of the gate insulating layer is 20nm to 100 nm.
8. The method for manufacturing the Mg diffusion enhancement type GaN-based HEMT device as claimed in any one of claims 1 to 7, which is characterized by comprising the following steps:
1) sequentially epitaxially growing a GaN channel layer and a superlattice structure layer on a substrate;
2) photoetching is carried out to enable the superlattice structure layer to expose a gate metal electrode area, grooves are etched, Mg ion diffusion is carried out, stripping and annealing are carried out, and a P-type Mg ion diffusion barrier layer is formed;
3) SiO is carried out 2 Depositing to form SiO on the surface of the P-type Mg ion diffusion barrier layer 2 A gate insulating layer;
4) performing vapor deposition and stripping on SiO 2 Forming a gate metal electrode on the gate insulating layer;
5) and photoetching is carried out, so that the source metal electrode region and the drain metal electrode region are exposed on the superlattice structure layer, evaporation and stripping are carried out, and the source metal electrode and the drain metal electrode are formed, so that the Mg diffusion enhanced GaN-based HEMT device is obtained.
9. The method for manufacturing the Mg diffusion-enhanced GaN-based HEMT device of claim 8, wherein: step 1), the epitaxial growth adopts an organic metal chemical vapor deposition method, and the growth temperature is 850-1200 ℃; the annealing in the step 2) is carried out at the temperature of 300-800 ℃, and the annealing time is 30-120 s.
10. An electronic device characterized by comprising the Mg diffusion enhanced GaN-based HEMT device of any one of claims 1 to 7.
CN202210461239.3A 2022-04-28 2022-04-28 Mg diffusion enhanced GaN-based HEMT device and preparation method and application thereof Pending CN114899233A (en)

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Cited By (1)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
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Application publication date: 20220812