CN111563483B - Image recognition method and system based on compact lenet model - Google Patents
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Abstract
The invention relates to an image recognition method and system based on a compact lenet model, which greatly reduces the occupied resources of the compact lenet model compared with the existing lenet model, and improves the training speed due to the reduction of parameters in the training stage of a network; in the reasoning stage of the network, the operation amount is reduced, so that the chip can calculate the identification result more quickly; on the chip design level, the memory bit width of intermediate variables, weights and biases is reduced, meanwhile, the weights, biases and intermediate data memories are integrated, and the integrated memories occupy less resources and chip area; in the aspect of power consumption, the power consumption in practical application can be effectively reduced due to the reduction of the area of a memory for data storage and the reduction of data operation quantity; therefore, the design of the invention comprehensively improves the working efficiency of image recognition, and realizes lenet network on a chip.
Description
Technical Field
The invention relates to an image recognition method and system based on a compact lenet model, and belongs to the technical field of image recognition.
Background
Image recognition technology is an important field of artificial intelligence, and is to perform object recognition on images to obtain targets and objects in various modes. The image recognition technology is the basis of practical technologies such as stereoscopic vision, motion analysis, data fusion and the like, and has important application value in a plurality of fields such as navigation, map and terrain registration, natural resource analysis, weather forecast, environment monitoring, physiological lesion research and the like.
In the field of character recognition of images, a lenet convolutional neural network model is a more classical model, but lenet is too many in training parameters, so that intermediate data are too many, and in edge calculation which is sensitive to resources and power consumption, too many resources are occupied by implementation, the area is too large, and meanwhile, the operation amount and occupied on-chip resources are too much, so that the power consumption is too large.
Disclosure of Invention
The invention aims to solve the technical problem of providing an image recognition method based on a compact lenet model, which reduces the resource occupation amount, reduces the operation times and effectively improves the image recognition working efficiency while ensuring the image recognition accuracy.
The invention adopts the following technical scheme for solving the technical problems: the invention designs an image recognition method based on a compact lenet model, which is used for realizing feature recognition of a target image and comprises the following steps of:
Step A, based on three groups of convolution kernel groups with the size of 5*5, respectively carrying out convolution processing on a target image by applying each convolution kernel group, respectively adding offset data corresponding to each convolution kernel group to the convolution result data obtained by each convolution kernel group, so as to finish processing all pixels on the target image, obtaining 3 first convolution characteristic images corresponding to the target image, and then entering the step B;
Step B, carrying out maximum pooling treatment on each first convolution characteristic image by using pooling kernels with the size of 2 x 2 to obtain first pooling characteristic images corresponding to 3 first convolution characteristic images respectively, namely obtaining 3 first pooling characteristic images, and then entering the step C;
Step C, based on two groups of convolution kernel groups with the size of 5*5 convolution kernels, respectively carrying out convolution processing on 3 first pooling feature images by applying 3 convolution kernels in the convolution kernel groups, adding convolution results of the convolution kernels, obtaining the sum of the addition results and offset data corresponding to the convolution kernel groups, so as to finish processing all pixels on the first pooling feature images, obtaining second convolution feature images corresponding to the convolution kernel groups, further obtaining second convolution feature images corresponding to the two convolution kernel groups, namely obtaining 2 second convolution feature images, and then entering the step D;
step D, carrying out maximum pooling treatment on each second convolution characteristic image by using pooling kernels with the size of 2 x 2 to obtain second pooling characteristic images corresponding to the 2 second convolution characteristic images respectively, namely obtaining 2 second pooling characteristic images, and then entering the step E;
E, based on eleven groups of convolution kernel groups with the size of 5*5, respectively carrying out convolution processing on 2 second pooling feature images by using 2 convolution kernels in the convolution kernel groups, adding convolution results of the convolution kernels, obtaining the sum of the addition results and offset data corresponding to the convolution kernel groups, completing processing of all pixels on the second pooling feature images, obtaining feature data corresponding to the convolution kernel groups, further obtaining feature data corresponding to the eleven groups of convolution kernel groups, namely obtaining eleven feature data, and then entering step F;
And F, based on ten groups of convolution value groups respectively comprising 11 convolution values, respectively carrying out convolution processing on eleven pieces of characteristic data by applying 11 convolution values in the convolution value groups, adding convolution results of the convolution values, obtaining the sum of the addition result and offset data corresponding to the convolution value groups, obtaining characteristic data corresponding to the convolution value groups, and further obtaining result characteristic data corresponding to the ten groups of convolution value groups respectively, namely obtaining ten result characteristic data.
As a preferred technical scheme of the invention: step G is as follows, and step G is entered after step F is executed;
and G, comparing the sizes of the ten result characteristic data to obtain the maximum result characteristic data serving as the result characteristic corresponding to the target image, and outputting the index of the result characteristic, namely the characteristic corresponding to the target image.
As a preferred technical scheme of the invention: the execution of the steps a to F is implemented based on the Input layers, the first convolution layer C1, the first pooling layer S2, the second convolution layer C3, the second pooling layer S4, the third convolution layer C5, and the full connection layer FullLink, which are sequentially connected in series, wherein the first convolution layer C1 is used for executing the step a, the first pooling layer S2 is used for executing the step B, the second convolution layer C3 is used for executing the step C, the second pooling layer S4 is used for executing the step D, the third convolution layer C5 is used for executing the step E, and the full connection layer FullLink is used for executing the step F.
In view of the foregoing, the present invention aims to provide a system for executing an image recognition method based on a compact lenet model, which reduces the resource occupation amount, reduces the operation times, and effectively improves the image recognition working efficiency while ensuring the image recognition accuracy.
The invention adopts the following technical scheme for solving the technical problems: the invention designs the image recognition method based on the compact lenet model, which can optimally design the storage structure and the space while ensuring the accuracy of image recognition, and effectively improves the working efficiency of image recognition.
The invention adopts the following technical scheme for solving the technical problems: the invention designs a system for executing an image recognition method based on a compact lenet model, which comprises an input layer memory, an intermediate layer memory, a weight read-only memory, a bias read-only memory, a convolution module and a controller, wherein the input layer memory is used for storing weight data;
the input layer memory is used for storing a target image;
The middle layer memory is used for storing output results of all layers aiming at the first convolution layer C1, the first pooling layer S2, the second convolution layer C3, the second pooling layer S4, the third convolution layer C5 and the full connection layer FullLink;
The weight read-only memory is used for storing weights of all layers participating in convolution operation aiming at the first convolution layer C1, the second convolution layer C3, the third convolution layer C5 and the full connection layer FullLink;
The offset read-only memory is used for storing offset values which participate in addition operation after the convolution operation is executed by each layer aiming at the first convolution layer C1, the second convolution layer C3, the third convolution layer C5 and the full connection layer FullLink;
the convolution module is used for storing convolution operations of the first convolution layer C1, the second convolution layer C3, the third convolution layer C5 and the full connection layer FullLink;
The controller is used for controlling and coordinating the work among the Input layer memory, the middle layer memory, the weight read-only memory, the bias read-only memory and the convolution module, and realizing the execution of the Input layers, the first convolution layer C1, the first pooling layer S2, the second convolution layer C3, the second pooling layer S4, the third convolution layer C5 and the full connection layer FullLink according to the steps A to F.
As a preferred technical scheme of the invention: the device also comprises a comparator, wherein the comparator is used for comparing the sizes of the result characteristic data output by the full connection layer FullLink and outputting an index value corresponding to the maximum result characteristic data.
As a preferred technical scheme of the invention: the depth of the input layer memory is 1024 and the width is 8 bits.
As a preferred technical scheme of the invention: the depth of the intermediate layer memory is 3211, and the width is 32 bits.
As a preferred technical scheme of the invention: the weight read-only memory has a depth of 855 and a width of 17 bits.
As a preferred technical scheme of the invention: the bias ROM has a depth of 26 and a width of 17 bits.
Compared with the prior art, the image identification method and system based on the compact lenet model have the following technical effects:
The image recognition method and the system based on the compact lenet model are designed in a compact manner aiming at the existing lenet model, so that the image recognition accuracy is guaranteed to the maximum extent, meanwhile, the occupied resources of the compact lenet model are greatly reduced compared with those of the existing lenet model, and in the training stage of a network, the training speed is improved due to the reduction of parameters; in the reasoning stage of the network, the operation amount is reduced, so that the chip can calculate the identification result more quickly; on the aspect of chip design, the memory bit width of intermediate variables, weights and biases is reduced, and meanwhile, the weights, biases and intermediate data memories are integrated, so that compared with the discrete design of a general memory, the integrated memory occupies fewer resources and chip area; in the aspect of power consumption, the power consumption in practical application can be effectively reduced due to the reduction of the area of a memory for data storage and the reduction of data operation quantity; therefore, the design of the invention comprehensively improves the working efficiency of image recognition, and realizes lenet network on a chip.
Drawings
FIG. 1 is a network structure diagram of an image recognition method based on a compact lenet model designed in the present invention;
fig. 2 is a block diagram of a chip structure based on the compact lenet model according to the present invention.
Detailed Description
The following describes the embodiments of the present invention in further detail with reference to the drawings.
The invention designs an image recognition method based on a compact lenet model, which is used for realizing feature recognition of a target image, and in practical application, compaction is performed on the existing lenet model, and as shown in fig. 1, a compact lenet model is obtained, wherein the compact lenet model comprises an Input layer, a first convolution layer C1, a first pooling layer S2, a second convolution layer C3, a second pooling layer S4, a third convolution layer C5 and a full connection layer FullLink which are sequentially connected in series; as shown in fig. 1, the following steps a to F are specifically executed based on the reduced lenet model, and the embodiment is implemented by combining a target image with 32×32,8bit gray scale pixels.
Step a is first performed by the first convolutional layer C1 as follows.
And A, carrying out convolution processing on the target image by applying each convolution kernel group based on three convolution kernel groups with the size of 5*5 convolution kernels, respectively adding offset data corresponding to the convolution kernel groups to the convolution result data obtained by each convolution kernel group, so as to finish processing all pixels on the target image, obtaining 3 first convolution characteristic images corresponding to the target image, and then entering the step B.
In the embodiment described above, in the specific implementation application of step a, the pixels of each obtained first convolution feature image are 28×28.
The first pooling layer S2 is applied to perform the following step B.
And B, carrying out maximum pooling treatment on each first convolution characteristic image by using pooling kernels with the size of 2 x 2 to obtain first pooled characteristic images corresponding to 3 first convolution characteristic images respectively, namely obtaining 3 first pooled characteristic images, and then entering the step C.
In the embodiment described above, in the implementation application of step B, the pixels of each obtained first pooled feature image are 14×14.
The second convolution layer C3 is applied to perform the following step C.
And C, based on two groups of convolution kernel groups with the size of 5*5 convolution kernels, respectively carrying out convolution processing on 3 first pooling feature images by applying 3 convolution kernels in the convolution kernel groups, adding convolution results of the convolution kernels, obtaining the sum of the addition results and offset data corresponding to the convolution kernel groups, completing processing of all pixels on the first pooling feature images, obtaining second convolution feature images corresponding to the convolution kernel groups, further obtaining second convolution feature images corresponding to the two convolution kernel groups, namely obtaining 2 second convolution feature images, and then entering the step D.
In the embodiment described above, in the specific implementation application of step C, the pixels of each obtained second convolution feature image are 10×10.
The second pooling layer S4 is applied to perform the following step D.
And D, carrying out maximum pooling treatment on each second convolution characteristic image by using pooling kernels with the size of 2 x 2 to obtain second pooled characteristic images corresponding to the 2 second convolution characteristic images respectively, namely obtaining 2 second pooled characteristic images, and then entering the step E.
In the embodiment, under the specific implementation application of step D, the pixels of each obtained second pooled feature image are 5*5.
The third convolution layer C5 is applied to perform the following step E.
And E, based on eleven convolution kernel groups with the size of 5*5 convolution kernels, respectively carrying out convolution processing on 2 second pooled feature images by applying 2 convolution kernels in the convolution kernel groups, adding convolution results of the convolution kernels, obtaining the sum of the addition results and offset data corresponding to the convolution kernel groups, completing processing of all pixels on the second pooled feature images, obtaining feature data corresponding to the convolution kernel groups, further obtaining feature data corresponding to the eleven convolution kernel groups, namely obtaining eleven feature data, and then entering step F.
The full connection layer FullLink is applied to perform the following step F.
And F, based on ten groups of convolution value groups respectively comprising 11 convolution values, respectively carrying out convolution processing on eleven pieces of characteristic data by applying 11 convolution values in the convolution value groups, adding convolution results of the convolution values, obtaining the sum of the addition result and offset data corresponding to the convolution value groups, obtaining characteristic data corresponding to the convolution value groups, further obtaining result characteristic data corresponding to the ten groups of convolution value groups respectively, namely obtaining ten result characteristic data, and then entering the step G.
And G, comparing the sizes of the ten result characteristic data to obtain the maximum result characteristic data serving as the result characteristic corresponding to the target image, and outputting the index of the result characteristic, namely the characteristic corresponding to the target image.
In practical application, the image recognition method based on the compact lenet model is designed, and a system for executing the image recognition method is specifically designed, as shown in fig. 2, a specific input layer Memory (Input Layer Memory), an intermediate layer Memory (Layers Memory), a weight read-only Memory (Weights ROM), a Bias read-only Memory (Bias ROM), a convolution module, a controller and a comparator.
The input layer memory (Input Layer Memory) is used for storing a target image, in practical application, the depth of the input layer memory (Input Layer Memory) is 1024, the width is 8 bits, and compared with the memory bit width of 32 bits in the general convolutional neural network chip design, the resource and the area occupation of the input layer memory (Input Layer Memory) designed by the invention are only one fourth of the original lenet5 model; for the above embodiment, the target image is 32 pixels long and wide each, each pixel occupying 8bit memory space.
The middle layer Memory (Layers Memory) is used for storing output results of each layer for the first convolution layer C1, the first pooling layer S2, the second convolution layer C3, the second pooling layer S4, the third convolution layer C5 and the full connection layer FullLink, and in practical application, the depth of the middle layer Memory (Layers Memory) is 3211, the width is 32 bits, and data of the middle layer and the output layer are integrated into one Memory.
Area optimization of the middle layer based on the reduced model: the intermediate result storage of C1, S2, C3, S4, C5 and FullLink in the original lenet model requires 8010X32bit space, and the intermediate result storage of C1, S2, C3, S4, C5 and FullLink in the reduced lenet model requires 3211X32bit space, which is equivalent to 40% of the resources occupied by the original lenet model. The middle layer is based on area optimization of memory integration, and in conventional designs, it is generally necessary to separate the memories of different layers because the latter layer of the convolutional neural network comes from the input of the former layer of data and the calculation of weights. In the design of the invention, different layers are integrated together by adopting a time division multiplexing method, wherein addresses 0-2351 are the result storage space of the first convolution layer C1; addresses 2352-2939 are the result storage space of the first pooling layer S2; addresses 2940-3139 are the result storage space of the second convolutional layer C3; addresses 3140-3589 are layer result storage spaces of the second pooled layer S4; addresses 3590-3200 are the result storage space of the third convolutional layer C5; addresses 3201-3211 are the result storage space of full connectivity layer FullLink. In one convolution operation, when the data of the previous layer is read, the address generator gives out a read address, and after the convolution operation is completed, the address generator generates a write address, and the integrated middle layer memory shares a group of memory peripheral circuits, so that the occupied resources and the occupied area are reduced.
The weight read-only memory (Weights ROM) is used for storing the weights of all the layers participating in the convolution operation aiming at the first convolution layer C1, the second convolution layer C3, the third convolution layer C5 and the full connection layer FullLink, and in practical application, the depth of the specific design weight read-only memory (Weights ROM) is 855, the width is 17 bits, and the weights of all the layers of convolution operation are integrated into one memory.
Compared with the 32bit memory bit width in the general convolutional neural network chip design, the resource and the area occupation of the weight read-only memory (Weights ROM) designed by the invention are almost one half of those of the memory, and the weight read-only memory (Weights ROM) stores the weight data required by a plurality of layers into one memory, wherein the addresses 0-74 are the weights of the first convolutional layer C1; addresses 75-224 are weights of the second convolutional layer C3; addresses 225-774 are weights of the third convolutional layer C5; addresses 775-884 are weights of full connection layer FullLink, and integrated weight read-only memory (Weights ROM) only needs one peripheral control circuit, so that chip resources and area are saved.
The Bias read-only memory (Bias ROM) is used for storing Bias values which participate in addition operation after the convolution operation is executed for the first convolution layer C1, the second convolution layer C3, the third convolution layer C5 and the full connection layer FullLink, and in practical application, the Bias read-only memory (Bias ROM) is specifically designed to have the depth of 26 and the width of 17 bits, and Bias values after all layers of convolution operation are integrated into one memory, wherein the addresses 0-2 are Bias of the first convolution layer C1; addresses 3-4 are offsets of the second convolutional layer C3; addresses 5-15 are offsets of the third convolutional layer C5; 16-25 are offsets of fully connected layer FullLink. The integrated Bias read-only memory (Bias ROM) only needs one peripheral control circuit, so that the chip resources and the area are saved.
The convolution module is used for storing convolution operations of all the layers aiming at the first convolution layer C1, the second convolution layer C3, the third convolution layer C5 and the full connection layer FullLink, wherein the inside of the convolution module is composed of a group of multipliers and accumulators, and the weights and the data are accumulated after being multiplied.
The controller is used for controlling and coordinating the work among an Input layer Memory (Input Layer Memory), an intermediate layer Memory (Layers Memory), a weight read-only Memory (Weights ROM), a Bias read-only Memory (Bias ROM) and a convolution module, and implementing the execution of the Input layer Input Layers, the first convolution layer C1, the first pooling layer S2, the second convolution layer C3, the second pooling layer S4, the third convolution layer C5 and the full connection layer FullLink according to the steps A to F. Meanwhile, the controller comprises a counter for recording operation steps, the state machine is used for controlling the work of the modules and the assignment basis of each module, and the address generator generates a memory access address according to the state and the output of the counter.
The comparator is used for comparing the sizes of the result characteristic data output by the full connection layer FullLink and outputting an index value corresponding to the maximum result characteristic data.
The image recognition method and the system based on the compact lenet model, which are designed by the invention, are applied to the practice, and for a target image to be recognized, the number of the first convolution characteristic images is reduced from 6 to 3 by the first convolution layer C1 compared with the original convolution layer C1 in the application; the first pooling layer S2 is compared with the original pooling layer S2, and the number of the first pooling characteristic images is reduced from 6 to 3; the second convolution layer C3 is compared with the original convolution layer C3, and the number of the second convolution characteristic images is reduced from 16 to 2; the second pooling layer S4 is compared with the original pooling layer S4, and the number of the second pooling characteristic images is reduced from 16 to 2; the third convolution layer C5 reduces the feature data from 120 to 11 compared to the original convolution layer C5, and as a result, the number of feature data remains unchanged, still ten.
In application, the problem that lenet model occupies excessive resources when designed as a chip is solved, and the chip design method for simplifying lenet model has higher practicability and ensures higher identification accuracy. The data quantity and the operation quantity of the middle layer are greatly reduced through the compact lenet model, and the middle layer and the data memory of the output layer are integrated into one memory, so that the memory resources occupied by the chip implementation are only 6.4% of those of the original model, and the memory resources are reduced by more than 90%; the simplified lenet network identification accuracy reaches 97.05%, and the image identification accuracy is ensured to the maximum extent; and the calculation amount is reduced from 51750 times of original lenet to 885 times of calculation due to the reduction of weight and bias, the calculation amount is only about 1.7% of the original lenet network, the calculation is more block, and specific parameters are compared as shown in the following table 1.
| Layer(s) | Original lenet model | Compact lenet model |
| Input Layers | 1024*32 | 1024*8 |
| C1 | 4704*32 | 2352*32 |
| S2 | 1176*32 | 588*32 |
| C3 | 1600*32 | 200*32 |
| S4 | 400*32 | 50*32 |
| C5 | 120*32 | 11*32 |
| FullLink | 10*32 | 10*32 |
| Weight1 | 150*32 | 75*17 |
| Weight3 | 2400*32 | 150*17 |
| Weight5 | 48000*32 | 550*17 |
| Weight6 | 1200*32 | 110*17 |
| Bias1 | 6*32 | 3*17 |
| Bias3 | 16*32 | 2*17 |
| Bias5 | 120*32 | 11*17 |
| Bias6 | 10*32 | 10*17 |
| Totals to | 1949952 | 126431 |
TABLE 1
The image recognition method and the system based on the simplified lenet model designed by the technical scheme are designed in a simplified manner aiming at the existing lenet model, so that the resources occupied by the simplified lenet model are greatly reduced compared with the existing lenet model while the image recognition accuracy is ensured to the maximum extent, and the training speed is improved due to the reduction of parameters in the training stage of the network; in the reasoning stage of the network, the operation amount is reduced, so that the chip can calculate the identification result more quickly; on the aspect of chip design, the memory bit width of intermediate variables, weights and biases is reduced, and meanwhile, the weights, biases and intermediate data memories are integrated, so that compared with the discrete design of a general memory, the integrated memory occupies fewer resources and chip area; in the aspect of power consumption, the power consumption in practical application can be effectively reduced due to the reduction of the area of a memory for data storage and the reduction of data operation quantity; therefore, the design of the invention comprehensively improves the working efficiency of image recognition, and realizes lenet network on a chip.
The embodiments of the present invention have been described in detail with reference to the drawings, but the present invention is not limited to the above embodiments, and various changes can be made within the knowledge of those skilled in the art without departing from the spirit of the present invention.
Claims (1)
1. The image recognition method and system based on the compact lenet model are used for realizing feature recognition of a target image and are characterized by comprising the following steps A to G, wherein the steps A to F are realized based on an Input layer Input layers, a first convolution layer C1, a first pooling layer S2, a second convolution layer C3, a second pooling layer S4, a third convolution layer C5 and a full connection layer FullLink which are sequentially connected in series, wherein the first convolution layer C1 is used for executing the step A, the first pooling layer S2 is used for executing the step B, the second convolution layer C3 is used for executing the step C, the second pooling layer S4 is used for executing the step D, the third convolution layer C5 is used for executing the step E, and the full connection layer FullLink is used for executing the step F:
Step A, based on three groups of convolution kernel groups with the size of 5*5, respectively carrying out convolution processing on a target image by applying each convolution kernel group, respectively adding offset data corresponding to each convolution kernel group to the convolution result data obtained by each convolution kernel group, so as to finish processing all pixels on the target image, obtaining 3 first convolution characteristic images corresponding to the target image, and then entering the step B;
step B, carrying out maximum pooling treatment on each first convolution characteristic image by using pooling kernels with the size of 2 x 2 to obtain first pooling characteristic images corresponding to 3 first convolution characteristic images respectively, namely obtaining 3 first pooling characteristic images, and then entering the step C;
Step C, based on two groups of convolution kernel groups with the size of 5*5 convolution kernels, respectively carrying out convolution processing on 3 first pooling feature images by applying 3 convolution kernels in the convolution kernel groups, adding convolution results of the convolution kernels, obtaining the sum of the addition results and offset data corresponding to the convolution kernel groups, so as to finish processing all pixels on the first pooling feature images, obtaining second convolution feature images corresponding to the convolution kernel groups, further obtaining second convolution feature images corresponding to the two convolution kernel groups, namely obtaining 2 second convolution feature images, and then entering the step D;
Step D, carrying out maximum pooling treatment on each second convolution characteristic image by using pooling kernels with the size of 2 x 2 to obtain second pooling characteristic images corresponding to the 2 second convolution characteristic images respectively, namely obtaining 2 second pooling characteristic images, and then entering the step E;
E, based on eleven groups of convolution kernel groups with the size of 5*5, respectively carrying out convolution processing on 2 second pooling feature images by using 2 convolution kernels in the convolution kernel groups, adding convolution results of the convolution kernels, obtaining the sum of the addition results and offset data corresponding to the convolution kernel groups, completing processing of all pixels on the second pooling feature images, obtaining feature data corresponding to the convolution kernel groups, further obtaining feature data corresponding to the eleven groups of convolution kernel groups, namely obtaining eleven feature data, and then entering step F;
Step F, based on ten groups of convolution value groups respectively comprising 11 convolution values, respectively carrying out convolution processing on eleven pieces of characteristic data by applying 11 convolution values in the convolution value groups, adding convolution results of the convolution values, obtaining the sum of the addition result and offset data corresponding to the convolution value groups, obtaining characteristic data corresponding to the convolution value groups, further obtaining result characteristic data corresponding to the ten groups of convolution value groups respectively, namely obtaining ten result characteristic data, and then entering the step G;
Step G, comparing the sizes of ten result characteristic data to obtain maximum result characteristic data serving as a result characteristic corresponding to the target image, and outputting an index of the result characteristic, namely the characteristic corresponding to the target image;
the system comprises an input layer memory, an intermediate layer memory, a weight read-only memory, a bias read-only memory, a convolution module, a controller and a comparator;
The depth of the input layer memory is 1024 and the width of the input layer memory is 8 bits, and the input layer memory is used for storing a target image;
The depth of the intermediate layer memory is 3211, the width of the intermediate layer memory is 32 bits, and the intermediate layer memory is used for storing output results of all layers aiming at the first convolution layer C1, the first pooling layer S2, the second convolution layer C3, the second pooling layer S4, the third convolution layer C5 and the full connection layer FullLink;
The weight read-only memory has a depth of 855 and a width of 17 bits, and is used for storing weights of all layers participating in convolution operation aiming at the first convolution layer C1, the second convolution layer C3, the third convolution layer C5 and the full connection layer FullLink;
The offset read-only memory has the depth of 26 and the width of 17 bits, and is used for storing offset values which participate in addition operation after the convolution operation is executed on each layer aiming at the first convolution layer C1, the second convolution layer C3, the third convolution layer C5 and the full connection layer FullLink;
the convolution module is used for storing convolution operations of the first convolution layer C1, the second convolution layer C3, the third convolution layer C5 and the full connection layer FullLink;
The controller is used for controlling and coordinating the work among the Input layer memory, the middle layer memory, the weight read-only memory, the bias read-only memory and the convolution module, so as to realize the execution of the Input layers, the first convolution layer C1, the first pooling layer S2, the second convolution layer C3, the second pooling layer S4, the third convolution layer C5 and the full connection layer FullLink, and the steps A to F are executed;
The comparator is used for comparing the sizes of the result characteristic data output by the full connection layer FullLink and outputting an index value corresponding to the maximum result characteristic data.
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| CN111986071B (en) * | 2020-08-27 | 2022-11-29 | 苏州浪潮智能科技有限公司 | Picture data processing method, device, equipment and storage medium |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107016175A (en) * | 2017-03-23 | 2017-08-04 | 中国科学院计算技术研究所 | Automatic design method, device and optimization method applicable to neural network processor |
| CN107729854A (en) * | 2017-10-25 | 2018-02-23 | 南京阿凡达机器人科技有限公司 | A kind of gesture identification method of robot, system and robot |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN108537277A (en) * | 2018-04-10 | 2018-09-14 | 湖北工业大学 | A kind of image classification knowledge method for distinguishing |
| CN109753987B (en) * | 2018-04-18 | 2021-08-06 | 新华三信息安全技术有限公司 | File recognition method and feature extraction method |
| CN108613802B (en) * | 2018-05-10 | 2019-06-07 | 重庆大学 | A kind of mechanical failure diagnostic method based on depth mixed network structure |
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Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107016175A (en) * | 2017-03-23 | 2017-08-04 | 中国科学院计算技术研究所 | Automatic design method, device and optimization method applicable to neural network processor |
| CN107729854A (en) * | 2017-10-25 | 2018-02-23 | 南京阿凡达机器人科技有限公司 | A kind of gesture identification method of robot, system and robot |
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