CN110032540A - A kind of artificial intelligence edge calculations equipment - Google Patents

Abstract

This patent application belongs to the field of artificial intelligence, and specifically discloses an artificial intelligence edge computing device, which includes a core board and an interface expansion board for auxiliary functions and interface expansion; the core board is a core board that can work independently of the interface expansion board. The smallest computing system; this solution can have high computing power, low power consumption, rich expansion interfaces, and the hardware adopts a modular design, which can be expanded according to product requirements. It has very good scene applicability and solves various applications of artificial intelligence at present. In this scenario, there is a lack of suitable edge computing platforms and end-to-end intelligence platforms. It provides a usable platform for edge computing, and the platform is highly flexible, especially suitable for edge computing and terminal intelligence in various scenarios, which is conducive to the rapid productization and implementation of edge computing and terminal intelligence in various application scenarios.

Description

An artificial intelligence edge computing device

technical field

The application of the present invention belongs to the field of artificial intelligence, and specifically discloses an artificial intelligence edge computing device.

Background technique

At present, artificial intelligence is developing very fast and has been widely used in security, education, finance, robotics, autonomous driving and other fields. Thanks to the training of a large number of sample data and the growth of processor computing power, artificial intelligence algorithms have also evolved from traditional algorithms to deep learning, and the accuracy of the algorithms has also been continuously improved.

However, because artificial intelligence algorithms have great requirements on computing power, most of the current artificial intelligence algorithms, especially those based on deep learning, require large amounts of data for training and computing, and require very high computing power, and they are all in the cloud. This is done through massive arrays of processors. In many application scenarios, limited by usage scenarios such as communication bandwidth, latency, and privacy, in many cases, AI algorithms need to be implemented on the device side, such as autonomous driving, robotics, home security, UAV visual tracking and obstacle avoidance Etc., the most reasonable and efficient implementation is on-site perception and quick decision-making. Therefore, artificial intelligence based on the device or edge is increasingly valued and implemented by the industry.

At present, the industry's artificial intelligence computing platforms for the terminal side and edge side are limited by the core processor capability and power consumption. The core processor either adopts GPU, ASIC or FPGA, which has a single function, low computing power, and board structure The size is large and the design is inflexible. It can only be used for routine algorithm verification, and the usage scenarios are greatly restricted.

SUMMARY OF THE INVENTION

In view of the above deficiencies, the purpose of the present invention is to provide an artificial intelligence edge computing device, which has high computing power, low power consumption, rich expansion interfaces, adopts modular design in hardware, can be expanded according to product requirements, and has a very good scene. Applicability solves the problem of lack of suitable edge computing platform and terminal intelligence platform in various application scenarios of artificial intelligence.

In order to achieve the above object, the basic scheme of the present invention is:

An artificial intelligence edge computing device, comprising a core board and an interface expansion board for auxiliary functions and interface expansion; the core board is a minimum computing system that can work independently of the interface expansion board, and the core board includes:

AI core processor for computing processing such as image processing, image encoding and decoding, image recognition, speech recognition, and deep learning;

A high-speed storage module used to complete data storage with the AI core processor;

A clock module used to provide an input clock source for the circuit;

The core board power module used to provide power for the circuit;

Image input interface for supporting the input of raw image data collected by the camera sensor;

It is used to connect to the interface expansion board and includes one or more connectors to realize various external interfaces and auxiliary functions of the core board.

The interface expansion board includes:

It is an inter-board interface module used to connect with the core board and realize the connection of various interface signals of the core board AI core processor and each interface function module;

Mainly used for expansion board power module for integrated circuit power supply;

Support 100M/Gigabit adaptive Ethernet interface module;

Support HDMI2.0 protocol, HDMI interface that supports 4k60fps video output;

Support PCIe2.0 protocol, single lane supports PCIe interface with 2.5Gbps rate;

One USB2.0 and one USB3.0 device/host interface;

A wireless communication module for wireless communication and supporting wifi 802.11bgn/ac and Bluetooth functions;

SDIO interface used to support SD card expansion of mass storage and support SDIO3.0 protocol;

It is an audio interface that is used to connect the MIC to collect audio for voice processing, and supports connecting to speakers for voice output;

It is a display interface used to connect to the LCD display and display the processing results of the core computing module or the video captured by the camera through the LCD display;

Multiple UART serial ports, I2C interfaces, and GPIO interfaces that can be used for debugging or interacting with other external modules.

This artificial intelligence edge computing device adopts the ZEUS AIOS operating system. ZEUS AIOS is an intelligent operating system deeply integrated with the platform AI processor, including a multi-layer software architecture:

The basic layer completes the processing of bus and device drivers, file systems, inter-processor communication management and scheduling, and internal storage management of each multi-core heterogeneous processor of the hardware platform. According to different processor functions and performance requirements, it can support a single linux operating system or Linux+RTOS heterogeneous operating system;

The platform layer provides deep learning algorithm frameworks, neural network models, various algorithm SDKs and services, including multimedia services, communication services, graphics services, image acquisition, image processing, computer vision, speech processing and recognition, vision-based positioning and mapping VSLAM et al.

The interface layer is used to connect the platform layer and the application layer, and provide the application layer with the service interface API of various SDK libraries or services of the platform layer, including system management API, multimedia service API, communication service API, display API, AI algorithm SDK API and tools chain.

The application layer is an application for various application scenarios. According to the product requirements and application scenarios, the application layer completes the corresponding product functions by calling the API of the interface layer. For example, smart camera applications, face recognition applications, target recognition applications, service robot applications, etc.

The working principle of this basic scheme is as follows:

The artificial intelligence edge computing device includes two parts: the core board and the interface expansion board. The core board is a minimum computing system that can work independently of the interface expansion board, including AI core processor, high-speed storage module, clock module, power module, image Input interface and expansion interface modules. The AI core processor completes the core image processing, image encoding and decoding, image recognition, speech recognition, deep learning and other computing processing at the core of the platform. The processor can also be other similar AI processors. The high-speed storage module cooperates with the AI core processor to complete data storage, including DDR4 or LPDDR4, eMMC storage or UFS storage, BOOTFLASH, etc. The clock module includes OSC and corresponding matching circuits to provide the input clock source for the circuit, and the power module is the core Each integrated circuit of the board provides corresponding power supply, and the image input interface is the image acquisition interface of the core board, which supports MIPCSI/LVDS and other protocols, and is used for the input of raw image data collected by the camera sensor. The expansion interface module includes one or more connectors, which are used to connect with the interface expansion board to realize the expansion of various external interfaces and auxiliary functions of the core board.

The interface expansion board is used for auxiliary functions and interface expansion, including power module, Ethernet interface, PCIe interface, HDMI interface, USB2.0/3.0 interface, wireless communication module, serial port, LCD display interface, I2C interface and various GPIO, and The inter-board interface module completes the auxiliary control functions and input and output functions required by the edge computing platform. The inter-board interface module is used to connect the core boards to realize the connection of various interface signals of the AI core processor of the core board and the various interface function modules of the board, thereby realizing the expansion of various interfaces. The power module is mainly used for the power supply of other integrated circuits on this board, the Ethernet interface module supports 100M/Gigabit adaptive, the HDMI interface supports HDMI2.0 protocol, supports 4k60fps video output, the PCIe interface supports PCIe2.0 protocol, and a single lane supports 2.5Gbps rate. The interface board supports one USB2.0 and one USB3.0 device/host interface, the wireless communication module is used for wireless communication, supports wifi 802.11bgn/ac and Bluetooth, and the SDIO interface supports SDIO3.0 protocol, which is used to support SD card to expand mass storage , can also be used to extend the connection of modules that support SDIO3.0, the audio interface is mainly used to connect to the MIC to collect audio for voice processing, and to support the connection of speakers for voice output. The processing results, or the video captured by the camera, are displayed on the LCD display. Additionally, multiple UART serial ports, I2C interfaces, and GPIO interfaces are supported, which can be used for debugging or interacting with other external modules. So as to complete the functions of image acquisition and image processing, computer vision processing, deep learning training, inference and decision processing, speech input and speech recognition processing.

The beneficial effects are as follows:

1. This solution proposes an edge computing device for artificial intelligence that divides the functional modules of the AI edge computing platform into different circuit boards for implementation through the principles of design complexity, process requirements, and scalability. The divided AI edge computing platform includes two parts: the core board and the interface expansion board. The core board completes the most important AI computing and processing functions. It is the smallest circuit system for AI computing with stable functions, but the design is complex and requires the production process of the board. High, the board is designed according to the minimum size, and it does not need to be modified according to different scenarios after the design is finalized; the interface expansion board completes the auxiliary expansion function, the design technical complexity and production process requirements are relatively low, and can be adapted to different application scenarios and products. Form, targeted design, including interface expansion, communication, display or mass storage required for various scenarios. The invention integrates the high-speed storage, clock and power supply for completing the core calculation and matching on the core board, and integrates various interface expansion and other adaptation function modules on the interface expansion board. This solution can complete multi-channel image acquisition and input, encoding and decoding, image processing, computer vision algorithm processing, and deep learning. It can complete audio input and voice recognition processing, and can complete voice output. At the same time, through various high-speed interfaces, the interconnection and coordination between the computing platform and other devices can be realized to complete the relevant functions required by the product.

2. Because the AI chip used in the AI core processing module is very complex and requires very high PCB board technology, the core processor also needs to be connected to the supporting high-speed storage such as DDR4, LPDDR4, eMMC, UFS and other storage through high-speed signal lines. These high-speed devices all have very high requirements for circuit design. Generally, more than 6 layers of circuit board design are required, and the layout and wiring requirements of the board are very high, which leads to complex manufacturing process, long production time and high cost. On the other hand, other peripheral circuits supporting the core processing module, including power supplies, external interfaces, communication modules, etc., have relatively low requirements for circuit board design, and at the same time, the process requirements and production costs during manufacturing are relatively lower than those of the AI core. The processing module is lower and the production time is shorter. The traditional method generally designs the core computing part and peripheral auxiliary circuits and interfaces on a single board, which is inappropriate from the perspective of cost, production cycle, and utilization of application scenarios. From the perspective of usage scenarios, the edge computing platform can be widely used in various scenarios, such as robots, intelligent IPC, drones, home security and other fields. Different products in the same field and product structures in different fields are quite different. The requirements for the interface functions of the computing platform are also different. Therefore, an edge computing platform is designed in a modular way. The core computing part is independent as a module, and the auxiliary functions and interface parts are independent as a module. For various application scenarios, the core The calculation part remains stable and unchanged, and the interface module only needs to be customized according to the product requirements of different application scenarios. Therefore, on the one hand, this solution can save product development costs, reduce technical risks, and reduce product production time. On the other hand, it makes computing The platform is extremely flexible and adaptable.

3. In addition to being used for artificial intelligence edge computing, this solution can also be used as a smart camera to complete ultra-high-definition video recording and broadcasting. At the same time, it can also use deep learning algorithms to complete intelligent functions on the collected video, including direct Intelligent video analysis such as face recognition, witness comparison, behavior detection and analysis, target detection and tracking, smile recognition, gesture recognition, vehicle recognition and other functions are completed in the camera. The computing platform of the present invention can also perform multi-channel input video splicing, including 4-channel or 6-channel video splicing, and output panoramic video or 3D video.

4. This solution has high computing power, low power consumption, rich expansion interfaces, and adopts modular design on the hardware, which can be expanded according to product requirements, and has very good scene applicability. There is a lack of suitable edge computing platforms and end-to-end intelligence platforms. It provides a usable platform for edge computing, and the platform is highly flexible, especially suitable for edge computing and terminal intelligence in various scenarios, which is conducive to the rapid productization and implementation of edge computing and terminal intelligence in various application scenarios.

Further, AI core processors include multi-core ARM processors, multi-core GPUs, multi-core neural network processors NNIE and multi-core DSPs, with strong computing power and high integration.

Further, the core board supports two-way MIPI CSI camera sensor image input, and can support eight-way camera sensor image input through expansion.

Further, when performing artificial intelligence image algorithm processing or deep learning processing, the image can also directly input the image data of the camera for processing through the Ethernet port or other interfaces of the expansion board.

Further, the expansion circuit of the SDIO interface is: the pins DAT0, DAT1, DAT2, DAT3, pins CMD, pins CLK, pins CD of the chip U1 of the model KZ7001-13S-D are connected to the SD card slot, and the pins of U1 are connected to the SD card slot. Pins VSS2, GND0, GND1, GND2, GND3 are grounded, the pin VDD of U1 is connected to the first end of capacitor C1, the second end of C1 is connected to the second end of C2, the first end of C2 is connected to the first end of C1 and the resistor The first end of R1 is connected to the ground, the second end of R1 is connected to the ground, the first end of R1 is connected to the gate of the MOS transistor Q1, the source of Q1 is connected to the first end of C3, the second end of C3 is connected to the second end of R3, and the first end of R3 is connected. The terminal is connected to the first terminal of C3 and the 3.3v voltage is connected, the drain of Q1 is connected to the first terminal of R2 and the first terminal of C3, the second terminal of R2 is connected to the collector of the transistor Q2, the emitter of Q2 is grounded, and the The base is connected to the first end of R4, the first end of C4 is connected to the first end of R3, and the second end of C4 is grounded.

Description of drawings

1 is a schematic diagram of an embodiment of the present invention;

Fig. 2 is the expansion circuit diagram of SDIO interface in Fig. 1;

Fig. 3 is the schematic diagram of the core board of the present invention;

4 is a schematic diagram of an interface expansion board of the present invention;

FIG. 5 is a schematic diagram of the AIOS operating system of the present invention.

Detailed ways

The following is further described in detail by specific embodiments:

The embodiment is basically as shown in Figures 1-5:

An artificial intelligence edge computing device, the core board part includes functional modules as AI core processor, high-speed storage, clock module, power supply module, image interface camera sensor interface, and expansion interface module. Connecting to two camera sensors through the camera sensor interface can realize the depth vision of the robot through the AI core processor, and at the same time, it can perform deep learning and image recognition related processing and decision control for the input image of the camera. The core board is connected to the interface expansion board through the expansion interface, so as to realize the connection and control with other modules of the robot. The interface expansion board includes wireless communication module, power module, USB interface, display interface, SDIO interface, audio interface, UART/GPIO/I2C interface, etc. according to the robot application requirements. Among them, the wireless communication module can support wifi and bluetooth communication to realize wireless networking between the robot and the Internet or other control devices. The audio interface supports the acquisition of microphone voice signals. As a human-machine dialogue interface, the collected voice is sent to the core board through the inter-board interface. The AI core processor for speech processing and recognition. The speaker is used to output the robot's response to the human-machine interface voice command, or output various results of the robot's execution, such as music playback, sound playback of video playback, and so on. The USB interface can be used for extended functions of the robot, including battery charging, data transmission and other functions, and the SDIO interface can be used to expand the SD card storage, which can store a large amount of video and voice data recorded by the robot. The display interface can be used to connect to an LCD display screen, and display relevant information on the video collected by the robot camera or as an interface for human-computer interaction; the UART/GPIO/I2C interface can be connected to the motor control module in the robot to control the robot according to the results of core calculations Action, you can also connect led lights and buttons.

The expansion circuit of the SDIO interface is: the pins DAT0, DAT1, DAT2, DAT3 of the chip U1 of the model KZ7001-13S-D, as well as the pins CMD, CLK, and CD are connected to the SD card slot, and the pins of U1 are connected to the SD card slot. VSS2, GND0, GND1, GND2, GND3 are grounded, the pin VDD of U1 is connected to the first end of capacitor C1, the second end of C1 is connected to the second end of C2, the first end of C2 is connected to the first end of C1 and the resistor R1 The first end is connected, the second end of R1 is grounded, the first end of R1 is connected to the gate of the mos tube Q1, the source of Q1 is connected to the first end of C3, the second end of C3 is connected to the second end of R3, and the first end of R3 Connect to the first end of C3 and connect to 3.3vPER voltage at the same time, the drain of Q1 is connected to the first end of R2 and the first end of C3, the second end of R2 is connected to the collector of transistor Q2, the emitter of Q2 is grounded, and the base of Q2 The pole is connected to the first end of R4, the first end of C4 is connected to the first end of R3, and the second end of C4 is grounded.

The above descriptions are only embodiments of the present invention, and common knowledge such as well-known specific structures and characteristics in the solution are not described too much here. It should be pointed out that for those skilled in the art, some modifications and improvements can be made without departing from the structure of the present invention. These should also be regarded as the protection scope of the present invention, and these will not affect the implementation of the present invention. Effectiveness and utility of patents.

Claims (5)

1. an artificial intelligence edge computing device, is characterized in that, comprises core board and the interface expansion board that is used for auxiliary function and interface expansion, and runs on the core board to complete the system management, artificial intelligence algorithm processing and business application of edge computing equipment The operating system AIOS; the core board is a minimum computing system that can work independently of the interface expansion board, and the core board includes: AI core processor for computing processing such as image processing, image encoding and decoding, image recognition, speech recognition, and deep learning; A high-speed storage module used to complete data storage with the AI core processor; A clock module used to provide an input clock source for the circuit; The core board power module used to provide power for the circuit; Image input interface for supporting the input of raw image data collected by the camera sensor; It is used to connect to the interface expansion board and includes one or more connectors to realize various external interfaces and auxiliary functions of the core board. The interface expansion board includes: It is an inter-board interface module used to connect with the core board and realize the connection of various interface signals of the core board AI core processor and each interface function module; Mainly used for expansion board power module for integrated circuit power supply; Support 100M/Gigabit adaptive Ethernet interface module; Support HDMI2.0 protocol, HDMI interface that supports 4k60fps video output; Support PCIe2.0 protocol, single lane supports PCIe interface with 2.5Gbps rate; One USB2.0 and one USB3.0 device/host interface; A wireless communication module for wireless communication that supports wifi 802.11 bgn/ac and bluetooth functions; SDIO interface used to support SD card expansion of mass storage and support SDIO3.0 protocol; It is an audio interface that is used to connect the MIC to collect audio for voice processing, and supports connecting to speakers for voice output; It is a display interface used to connect to the LCD display and display the processing results of the core computing module or the video captured by the camera through the LCD display; Multiple UART serial ports, I2C interfaces and GPIO interfaces that can be used for debugging or interacting with other external modules; The AIOS operating system includes: It is used to complete the processing base layers such as bus and device drivers, file systems, inter-processor communication management and scheduling, and internal storage management of multi-core heterogeneous processors on the hardware platform. According to different processor functions and performance requirements, it can support a single linux operating system And linux+RTOS heterogeneous operating system; Platform layer for providing deep learning algorithm frameworks, neural network models, various algorithm SDKs and services, including multimedia services, communication services, graphics services, image acquisition, image processing, computer vision, speech processing and recognition, and vision-based positioning and mapping VSLAM, etc.; The application layer is used to complete the application functions of various products. The application layer faces various application scenarios. According to the requirements of products and scenarios, the corresponding product functions are completed by calling the API of the interface layer; The interface layer used to provide the application layer with the service interface API calls of various SDK libraries or services of the platform layer, including system management API, multimedia service API, communication service API, display API, AI algorithm SDK API and tool chain. 2 . The artificial intelligence edge computing device according to claim 1 , wherein the AI core processor comprises a multi-core ARM processor, a multi-core GPU, a multi-core neural network processor NNIE and a multi-core DSP. 3 . 3 . The artificial intelligence edge computing device according to claim 1 , wherein the core board supports two-way MIPI CSI camera sensor image input, and can support eight-way camera sensor image input through expansion. 4 . 4. a kind of artificial intelligence edge computing device according to claim 1 is characterized in that, when carrying out artificial intelligence image algorithm processing or deep learning processing, the image can also directly input the camera through the Ethernet port or other interface of the expansion board image data for processing. 5. a kind of artificial intelligence edge computing device according to claim 1 is characterized in that, the expansion circuit of SDIO interface is: model is the pin DAT0, DAT1, DAT2, DAT3 and the lead of the chip U1 of KZ7001-13S-D Pin CMD, pin CLK, pin CD are connected to SD card slot, U1 pins VSS2, GND0, GND1, GND2, GND3 are grounded, U1 pin VDD is connected to the first end of capacitor C1, and the second end of C1 is connected to The second end of C2 is connected to the second end of C2, the first end of C2 is connected to the first end of C1 and the first end of resistor R1 is connected, the second end of R1 is grounded, the first end of R1 is connected to the gate of the mos tube Q1, and the source of Q1 is connected to C3 The first end is connected, the second end of C3 is connected to the second end of R3, the first end of R3 is connected to the first end of C3 and the 3.3v voltage is connected, the drain of Q1 is connected to the first end of R2 and the first end of C3, the The second terminal is connected to the collector of transistor Q2, the emitter of Q2 is grounded, the base of Q2 is connected to the first terminal of R4, the first terminal of C4 is connected to the first terminal of R3, and the second terminal of C4 is grounded.